1; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM 2; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB 3 4; Test add with non-legal types 5 6define void @add_i1(i1 %a, i1 %b) nounwind ssp { 7entry: 8; ARM: add_i1 9; THUMB: add_i1 10 %a.addr = alloca i1, align 4 11 %0 = add i1 %a, %b 12; ARM: add r0, r0, r1 13; THUMB: add r0, r1 14 store i1 %0, i1* %a.addr, align 4 15 ret void 16} 17 18define void @add_i8(i8 %a, i8 %b) nounwind ssp { 19entry: 20; ARM: add_i8 21; THUMB: add_i8 22 %a.addr = alloca i8, align 4 23 %0 = add i8 %a, %b 24; ARM: add r0, r0, r1 25; THUMB: add r0, r1 26 store i8 %0, i8* %a.addr, align 4 27 ret void 28} 29 30define void @add_i16(i16 %a, i16 %b) nounwind ssp { 31entry: 32; ARM: add_i16 33; THUMB: add_i16 34 %a.addr = alloca i16, align 4 35 %0 = add i16 %a, %b 36; ARM: add r0, r0, r1 37; THUMB: add r0, r1 38 store i16 %0, i16* %a.addr, align 4 39 ret void 40} 41 42define void @or_i1(i1 %a, i1 %b) nounwind ssp { 43entry: 44; ARM: or_i1 45; THUMB: or_i1 46 %a.addr = alloca i1, align 4 47 %0 = or i1 %a, %b 48; ARM: orr r0, r0, r1 49; THUMB: orrs r0, r1 50 store i1 %0, i1* %a.addr, align 4 51 ret void 52} 53 54define void @or_i8(i8 %a, i8 %b) nounwind ssp { 55entry: 56; ARM: or_i8 57; THUMB: or_i8 58 %a.addr = alloca i8, align 4 59 %0 = or i8 %a, %b 60; ARM: orr r0, r0, r1 61; THUMB: orrs r0, r1 62 store i8 %0, i8* %a.addr, align 4 63 ret void 64} 65 66define void @or_i16(i16 %a, i16 %b) nounwind ssp { 67entry: 68; ARM: or_i16 69; THUMB: or_i16 70 %a.addr = alloca i16, align 4 71 %0 = or i16 %a, %b 72; ARM: orr r0, r0, r1 73; THUMB: orrs r0, r1 74 store i16 %0, i16* %a.addr, align 4 75 ret void 76} 77