xref: /llvm-project/llvm/test/CodeGen/ARM/fabs-neon.ll (revision 1954f2e924ec4e79a37631fc6d8e37e3ba2e4103)
17d94f3bdSAnton Korobeynikov; RUN: llc < %s -mtriple=armv7-eabi -float-abi=hard -mcpu=cortex-a8 | FileCheck %s
27d94f3bdSAnton Korobeynikov
3f799e3f9SStephen Lin; CHECK-LABEL: test:
47d94f3bdSAnton Korobeynikov; CHECK:         vabs.f32        q0, q0
57d94f3bdSAnton Korobeynikovdefine <4 x float> @test(<4 x float> %a) {
67d94f3bdSAnton Korobeynikov  %foo = call <4 x float> @llvm.fabs.v4f32(<4 x float> %a)
77d94f3bdSAnton Korobeynikov  ret <4 x float> %foo
87d94f3bdSAnton Korobeynikov}
97d94f3bdSAnton Korobeynikovdeclare <4 x float> @llvm.fabs.v4f32(<4 x float> %a)
107d94f3bdSAnton Korobeynikov
11f799e3f9SStephen Lin; CHECK-LABEL: test2:
127d94f3bdSAnton Korobeynikov; CHECK:        vabs.f32        d0, d0
137d94f3bdSAnton Korobeynikovdefine <2 x float> @test2(<2 x float> %a) {
147d94f3bdSAnton Korobeynikov  %foo = call <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
157d94f3bdSAnton Korobeynikov    ret <2 x float> %foo
167d94f3bdSAnton Korobeynikov}
177d94f3bdSAnton Korobeynikovdeclare <2 x float> @llvm.fabs.v2f32(<2 x float> %a)
188e5beb6eSSanjay Patel
198e5beb6eSSanjay Patel; No constant pool loads or vector ops are needed for the fabs of a
208e5beb6eSSanjay Patel; bitcasted integer constant; we should just return integer constants
218e5beb6eSSanjay Patel; that have the sign bits turned off.
228e5beb6eSSanjay Patel;
238e5beb6eSSanjay Patel; So instead of something like this:
248e5beb6eSSanjay Patel; 	mvn	r0, #0
258e5beb6eSSanjay Patel; 	mov	r1, #0
268e5beb6eSSanjay Patel; 	vmov	d16, r1, r0
278e5beb6eSSanjay Patel; 	vabs.f32	d16, d16
288e5beb6eSSanjay Patel; 	vmov	r0, r1, d16
298e5beb6eSSanjay Patel; 	bx	lr
308e5beb6eSSanjay Patel;
318e5beb6eSSanjay Patel; We should generate:
328e5beb6eSSanjay Patel;	mov	r0, #0
338e5beb6eSSanjay Patel;	mvn	r1, #-2147483648
34*1954f2e9SSanjay Patel;	bx	lr
358e5beb6eSSanjay Patel
368e5beb6eSSanjay Pateldefine i64 @fabs_v2f32_1() {
37*1954f2e9SSanjay Patel; CHECK-LABEL: fabs_v2f32_1:
38*1954f2e9SSanjay Patel; CHECK: mvn r1, #-2147483648
39*1954f2e9SSanjay Patel; CHECK: bx lr
40*1954f2e9SSanjay Patel; CHECK-NOT: vabs
418e5beb6eSSanjay Patel %bitcast = bitcast i64 18446744069414584320 to <2 x float> ; 0xFFFF_FFFF_0000_0000
428e5beb6eSSanjay Patel %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
438e5beb6eSSanjay Patel %ret = bitcast <2 x float> %fabs to i64
448e5beb6eSSanjay Patel ret i64 %ret
458e5beb6eSSanjay Patel}
468e5beb6eSSanjay Patel
478e5beb6eSSanjay Pateldefine i64 @fabs_v2f32_2() {
48*1954f2e9SSanjay Patel; CHECK-LABEL: fabs_v2f32_2:
49*1954f2e9SSanjay Patel; CHECK: mvn r0, #-2147483648
50*1954f2e9SSanjay Patel; CHECK: bx lr
51*1954f2e9SSanjay Patel; CHECK-NOT: vabs
528e5beb6eSSanjay Patel %bitcast = bitcast i64 4294967295 to <2 x float> ; 0x0000_0000_FFFF_FFFF
538e5beb6eSSanjay Patel %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)
548e5beb6eSSanjay Patel %ret = bitcast <2 x float> %fabs to i64
558e5beb6eSSanjay Patel ret i64 %ret
568e5beb6eSSanjay Patel}
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