1*7389545dSPierre van Houtryve; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2*7389545dSPierre van Houtryve; RUN: llc < %s -mtriple=armv7--linux-gnueabihf -mattr=+neon | FileCheck %s 3*7389545dSPierre van Houtryve 4*7389545dSPierre van Houtryve; This test case used to crash due to the div by K -> mul expansion in TargetLowering. 5*7389545dSPierre van Houtryve 6*7389545dSPierre van Houtryvedefine <8 x i32> @f1(<8 x i32> %arg) { 7*7389545dSPierre van Houtryve; CHECK-LABEL: f1: 8*7389545dSPierre van Houtryve; CHECK: @ %bb.0: 9*7389545dSPierre van Houtryve; CHECK-NEXT: .save {r4, r5, r6, r7, r11, lr} 10*7389545dSPierre van Houtryve; CHECK-NEXT: push {r4, r5, r6, r7, r11, lr} 11*7389545dSPierre van Houtryve; CHECK-NEXT: vmov r0, r2, d2 12*7389545dSPierre van Houtryve; CHECK-NEXT: movw r4, #60681 13*7389545dSPierre van Houtryve; CHECK-NEXT: vmov lr, r1, d0 14*7389545dSPierre van Houtryve; CHECK-NEXT: movt r4, #46117 15*7389545dSPierre van Houtryve; CHECK-NEXT: vmov r12, r3, d3 16*7389545dSPierre van Houtryve; CHECK-NEXT: smmul r5, r0, r4 17*7389545dSPierre van Houtryve; CHECK-NEXT: smmul r7, r2, r4 18*7389545dSPierre van Houtryve; CHECK-NEXT: smmul r6, r1, r4 19*7389545dSPierre van Houtryve; CHECK-NEXT: asr r2, r5, #4 20*7389545dSPierre van Houtryve; CHECK-NEXT: smmul r1, r3, r4 21*7389545dSPierre van Houtryve; CHECK-NEXT: add r2, r2, r5, lsr #31 22*7389545dSPierre van Houtryve; CHECK-NEXT: vmov r3, r5, d1 23*7389545dSPierre van Houtryve; CHECK-NEXT: smmul r0, lr, r4 24*7389545dSPierre van Houtryve; CHECK-NEXT: vmov.32 d2[0], r2 25*7389545dSPierre van Houtryve; CHECK-NEXT: smmul r5, r5, r4 26*7389545dSPierre van Houtryve; CHECK-NEXT: smmul r3, r3, r4 27*7389545dSPierre van Houtryve; CHECK-NEXT: smmul r4, r12, r4 28*7389545dSPierre van Houtryve; CHECK-NEXT: asr r2, r4, #4 29*7389545dSPierre van Houtryve; CHECK-NEXT: add r2, r2, r4, lsr #31 30*7389545dSPierre van Houtryve; CHECK-NEXT: asr r4, r3, #4 31*7389545dSPierre van Houtryve; CHECK-NEXT: vmov.32 d3[0], r2 32*7389545dSPierre van Houtryve; CHECK-NEXT: add r2, r4, r3, lsr #31 33*7389545dSPierre van Houtryve; CHECK-NEXT: asr r3, r0, #4 34*7389545dSPierre van Houtryve; CHECK-NEXT: add r0, r3, r0, lsr #31 35*7389545dSPierre van Houtryve; CHECK-NEXT: vmov.32 d1[0], r2 36*7389545dSPierre van Houtryve; CHECK-NEXT: asr r2, r5, #4 37*7389545dSPierre van Houtryve; CHECK-NEXT: vmov.32 d0[0], r0 38*7389545dSPierre van Houtryve; CHECK-NEXT: add r0, r2, r5, lsr #31 39*7389545dSPierre van Houtryve; CHECK-NEXT: asr r2, r6, #4 40*7389545dSPierre van Houtryve; CHECK-NEXT: vmov.32 d1[1], r0 41*7389545dSPierre van Houtryve; CHECK-NEXT: add r0, r2, r6, lsr #31 42*7389545dSPierre van Houtryve; CHECK-NEXT: asr r2, r1, #4 43*7389545dSPierre van Houtryve; CHECK-NEXT: vmov.32 d0[1], r0 44*7389545dSPierre van Houtryve; CHECK-NEXT: add r0, r2, r1, lsr #31 45*7389545dSPierre van Houtryve; CHECK-NEXT: asr r1, r7, #4 46*7389545dSPierre van Houtryve; CHECK-NEXT: vmov.32 d3[1], r0 47*7389545dSPierre van Houtryve; CHECK-NEXT: add r0, r1, r7, lsr #31 48*7389545dSPierre van Houtryve; CHECK-NEXT: vmov.32 d2[1], r0 49*7389545dSPierre van Houtryve; CHECK-NEXT: pop {r4, r5, r6, r7, r11, pc} 50*7389545dSPierre van Houtryve %v = sdiv <8 x i32> %arg, <i32 -54, i32 -54, i32 -54, i32 -54, i32 -54, i32 -54, i32 -54, i32 -54> 51*7389545dSPierre van Houtryve ret <8 x i32> %v 52*7389545dSPierre van Houtryve} 53