1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc < %s -mtriple armv7 -O1 | FileCheck %s -check-prefix=CHECK-LE-NORMAL 3; RUN: llc < %s -mtriple armv7 -O1 -combiner-reduce-load-op-store-width-force-narrowing-profitable=1 | FileCheck %s -check-prefix=CHECK-LE-NARROW 4; RUN: llc < %s -mtriple armv7eb -O1 | FileCheck %s -check-prefix=CHECK-BE-NORMAL 5; RUN: llc < %s -mtriple armv7eb -O1 -combiner-reduce-load-op-store-width-force-narrowing-profitable=1 | FileCheck %s -check-prefix=CHECK-BE-NARROW 6 7; This is a reproducer for a bug when DAGCombiner::ReduceLoadOpStoreWidth 8; would end up narrowing the load-op-store sequence into this SDNode sequence 9; for little-endian 10; 11; t18: i32,ch = load<(load (s32) from %ir.p1 + 8, align 8)> t0, t17, undef:i32 12; t20: i32 = or t18, Constant:i32<65534> 13; t21: ch = store<(store (s32) into %ir.p1 + 8, align 8)> t18:1, t20, t17, undef:i32 14; 15; This was wrong since it accesses memory above %ir.p1+9 which is outside the 16; "store size" for the original store. 17; 18; For big-endian we used to hit an assertion due to passing a negative offset 19; to getMemBasePlusOffset (at least after commit 3e1b55cafc95d4ef4, while 20; before that commit we got load/store instructions that accessed memory at a 21; negative offset from %p1). 22; 23define i16 @test(ptr %p1) { 24; CHECK-LE-NORMAL-LABEL: test: 25; CHECK-LE-NORMAL: @ %bb.0: @ %entry 26; CHECK-LE-NORMAL-NEXT: ldrh r1, [r0, #8] 27; CHECK-LE-NORMAL-NEXT: movw r2, #65534 28; CHECK-LE-NORMAL-NEXT: orr r1, r1, r2 29; CHECK-LE-NORMAL-NEXT: strh r1, [r0, #8] 30; CHECK-LE-NORMAL-NEXT: mov r0, #0 31; CHECK-LE-NORMAL-NEXT: bx lr 32; 33; CHECK-LE-NARROW-LABEL: test: 34; CHECK-LE-NARROW: @ %bb.0: @ %entry 35; CHECK-LE-NARROW-NEXT: ldr r1, [r0, #6] 36; CHECK-LE-NARROW-NEXT: orr r1, r1, #16646144 37; CHECK-LE-NARROW-NEXT: orr r1, r1, #-16777216 38; CHECK-LE-NARROW-NEXT: str r1, [r0, #6] 39; CHECK-LE-NARROW-NEXT: mov r0, #0 40; CHECK-LE-NARROW-NEXT: bx lr 41; 42; CHECK-BE-NORMAL-LABEL: test: 43; CHECK-BE-NORMAL: @ %bb.0: @ %entry 44; CHECK-BE-NORMAL-NEXT: ldrh r1, [r0] 45; CHECK-BE-NORMAL-NEXT: movw r2, #65534 46; CHECK-BE-NORMAL-NEXT: orr r1, r1, r2 47; CHECK-BE-NORMAL-NEXT: strh r1, [r0] 48; CHECK-BE-NORMAL-NEXT: mov r0, #0 49; CHECK-BE-NORMAL-NEXT: bx lr 50; 51; CHECK-BE-NARROW-LABEL: test: 52; CHECK-BE-NARROW: @ %bb.0: @ %entry 53; CHECK-BE-NARROW-NEXT: ldr r1, [r0] 54; CHECK-BE-NARROW-NEXT: orr r1, r1, #16646144 55; CHECK-BE-NARROW-NEXT: orr r1, r1, #-16777216 56; CHECK-BE-NARROW-NEXT: str r1, [r0] 57; CHECK-BE-NARROW-NEXT: mov r0, #0 58; CHECK-BE-NARROW-NEXT: bx lr 59entry: 60 %load = load i80, ptr %p1, align 32 61 %mask = shl i80 -1, 65 62 %op = or i80 %load, %mask 63 store i80 %op, ptr %p1, align 32 64 ret i16 0 65} 66 67