xref: /llvm-project/llvm/test/CodeGen/ARM/build-attributes.ll (revision d27a6a70721b356d39c29bcf59fb7969969561fe) 
1; This tests that MC/asm header conversion is smooth and that the
2; build attributes are correct
3
4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE
5; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6
6; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST
7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S
13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast  | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST
17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
20; RUN: llc < %s -mtriple=armv7-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST
21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
22; RUN: llc < %s -mtriple=armv8-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST
23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
30; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE
31; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE
32; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP
33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST
52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
54; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST
55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
57
58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16
59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16
60; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD
61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16
62; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16
63
64; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
65; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0
66; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
67; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
68; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0PLUS
69; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
70; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
71; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M1
72; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
73; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
74; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000
75; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
76; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
77; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
78; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
79; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
80; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
81; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
82; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
83; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
84; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
85; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
86; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
87; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
88; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
89; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
90; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
91; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
92; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
93; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
94; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
95; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
96; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
97; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
98; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
99; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
100; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
101; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
102; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35
103; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST
104; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
105; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
106; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
107; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
108; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
109; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST
110; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
111; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
112; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
113; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
114; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
115; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=EXYNOS-M1
116; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
117; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
118; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
119; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
120; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s  --check-prefix=CORTEX-A7-CHECK
121; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s  --check-prefix=CORTEX-A7-CHECK-FAST
122; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
123; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
124; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
125; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
126; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
127; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
128; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
129; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
130; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=default | FileCheck %s --check-prefix=RELOC-OTHER
131; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
132; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER
133; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE
134; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE
135
136; ARMv8.1a (AArch32)
137; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
138; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
139; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
140; ARMv8a (AArch32)
141; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
142; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
143; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
144; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
145; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
146; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
147; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
148; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
149
150; ARMv7a
151; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
152; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
153; ARMv7r
154; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
155; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
156; ARMv7m
157; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
158; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
159; ARMv6
160; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
161; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
162; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
163; ARMv6k
164; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
165; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
166; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
167; ARMv6m
168; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
169; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
170; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
171; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
172; ARMv5
173; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN
174; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
175
176; XSCALE:      .eabi_attribute 6, 5
177; XSCALE:      .eabi_attribute 8, 1
178; XSCALE:      .eabi_attribute 9, 1
179
180; DYN-ROUNDING: .eabi_attribute 19, 1
181
182; V6:   .eabi_attribute 6, 6
183; V6:   .eabi_attribute 8, 1
184;; We assume round-to-nearest by default (matches GCC)
185; V6-NOT:   .eabi_attribute 19
186;; The default choice made by llc is for a V6 CPU without an FPU.
187;; This is not an interesting detail, but for such CPUs, the default intention is to use
188;; software floating-point support. The choice is not important for targets without
189;; FPU support!
190; V6:   .eabi_attribute 20, 1
191; V6:   .eabi_attribute 21, 1
192; V6-NOT:   .eabi_attribute 22
193; V6:   .eabi_attribute 23, 3
194; V6:   .eabi_attribute 24, 1
195; V6:   .eabi_attribute 25, 1
196; V6-NOT:   .eabi_attribute 27
197; V6-NOT:   .eabi_attribute 28
198; V6-NOT:    .eabi_attribute 36
199; V6:    .eabi_attribute 38, 1
200; V6-NOT:    .eabi_attribute 42
201; V6-NOT:  .eabi_attribute 44
202; V6-NOT:    .eabi_attribute 68
203
204; V6-FAST-NOT:   .eabi_attribute 19
205;; Despite the V6 CPU having no FPU by default, we chose to flush to
206;; positive zero here. There's no hardware support doing this, but the
207;; fast maths software library might.
208; V6-FAST-NOT:   .eabi_attribute 20
209; V6-FAST-NOT:   .eabi_attribute 21
210; V6-FAST-NOT:   .eabi_attribute 22
211; V6-FAST:   .eabi_attribute 23, 1
212
213;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for
214;; V6-M, however we don't model the OS extension so this is fine.
215; V6M:  .eabi_attribute 6, 12
216; V6M-NOT:  .eabi_attribute 7
217; V6M:  .eabi_attribute 8, 0
218; V6M:  .eabi_attribute 9, 1
219; V6M-NOT:   .eabi_attribute 19
220;; The default choice made by llc is for a V6M CPU without an FPU.
221;; This is not an interesting detail, but for such CPUs, the default intention is to use
222;; software floating-point support. The choice is not important for targets without
223;; FPU support!
224; V6M:  .eabi_attribute 20, 1
225; V6M:   .eabi_attribute 21, 1
226; V6M-NOT:   .eabi_attribute 22
227; V6M:   .eabi_attribute 23, 3
228; V6M:  .eabi_attribute 24, 1
229; V6M:  .eabi_attribute 25, 1
230; V6M-NOT:  .eabi_attribute 27
231; V6M-NOT:  .eabi_attribute 28
232; V6M-NOT:  .eabi_attribute 36
233; V6M:  .eabi_attribute 38, 1
234; V6M-NOT:  .eabi_attribute 42
235; V6M-NOT:  .eabi_attribute 44
236; V6M-NOT:  .eabi_attribute 68
237
238; V6M-FAST-NOT:   .eabi_attribute 19
239;; Despite the V6M CPU having no FPU by default, we chose to flush to
240;; positive zero here. There's no hardware support doing this, but the
241;; fast maths software library might.
242; V6M-FAST-NOT:  .eabi_attribute 20
243; V6M-FAST-NOT:   .eabi_attribute 21
244; V6M-FAST-NOT:   .eabi_attribute 22
245; V6M-FAST:   .eabi_attribute 23, 1
246
247; ARM1156T2F-S: .cpu arm1156t2f-s
248; ARM1156T2F-S: .eabi_attribute 6, 8
249; ARM1156T2F-S: .eabi_attribute 8, 1
250; ARM1156T2F-S: .eabi_attribute 9, 2
251; ARM1156T2F-S: .fpu vfpv2
252; ARM1156T2F-S-NOT:   .eabi_attribute 19
253;; We default to IEEE 754 compliance
254; ARM1156T2F-S: .eabi_attribute 20, 1
255; ARM1156T2F-S: .eabi_attribute 21, 1
256; ARM1156T2F-S-NOT: .eabi_attribute 22
257; ARM1156T2F-S: .eabi_attribute 23, 3
258; ARM1156T2F-S: .eabi_attribute 24, 1
259; ARM1156T2F-S: .eabi_attribute 25, 1
260; ARM1156T2F-S-NOT: .eabi_attribute 27
261; ARM1156T2F-S-NOT: .eabi_attribute 28
262; ARM1156T2F-S-NOT: .eabi_attribute 36
263; ARM1156T2F-S: .eabi_attribute 38, 1
264; ARM1156T2F-S-NOT:    .eabi_attribute 42
265; ARM1156T2F-S-NOT:    .eabi_attribute 44
266; ARM1156T2F-S-NOT:    .eabi_attribute 68
267
268; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 19
269;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
270;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
271;; select. LLVM historically picks 0.
272; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
273; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 21
274; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 22
275; ARM1156T2F-S-FAST:   .eabi_attribute 23, 1
276
277; V7M:  .eabi_attribute 6, 10
278; V7M:  .eabi_attribute 7, 77
279; V7M:  .eabi_attribute 8, 0
280; V7M:  .eabi_attribute 9, 2
281; V7M-NOT:   .eabi_attribute 19
282;; The default choice made by llc is for a V7M CPU without an FPU.
283;; This is not an interesting detail, but for such CPUs, the default intention is to use
284;; software floating-point support. The choice is not important for targets without
285;; FPU support!
286; V7M:  .eabi_attribute 20, 1
287; V7M: .eabi_attribute 21, 1
288; V7M-NOT: .eabi_attribute 22
289; V7M: .eabi_attribute 23, 3
290; V7M:  .eabi_attribute 24, 1
291; V7M:  .eabi_attribute 25, 1
292; V7M-NOT:  .eabi_attribute 27
293; V7M-NOT:  .eabi_attribute 28
294; V7M-NOT:  .eabi_attribute 36
295; V7M:  .eabi_attribute 38, 1
296; V7M-NOT:  .eabi_attribute 42
297; V7M-NOT:  .eabi_attribute 44
298; V7M-NOT:  .eabi_attribute 68
299
300; V7M-FAST-NOT:   .eabi_attribute 19
301;; Despite the V7M CPU having no FPU by default, we chose to flush
302;; preserving sign. This matches what the hardware would do in the
303;; architecture revision were to exist on the current target.
304; V7M-FAST:  .eabi_attribute 20, 2
305; V7M-FAST-NOT:   .eabi_attribute 21
306; V7M-FAST-NOT:   .eabi_attribute 22
307; V7M-FAST:   .eabi_attribute 23, 1
308
309; V7:      .syntax unified
310; V7: .eabi_attribute 6, 10
311; V7-NOT:   .eabi_attribute 19
312;; In safe-maths mode we default to an IEEE 754 compliant choice.
313; V7: .eabi_attribute 20, 1
314; V7: .eabi_attribute 21, 1
315; V7-NOT: .eabi_attribute 22
316; V7: .eabi_attribute 23, 3
317; V7: .eabi_attribute 24, 1
318; V7: .eabi_attribute 25, 1
319; V7-NOT: .eabi_attribute 27
320; V7-NOT: .eabi_attribute 28
321; V7-NOT: .eabi_attribute 36
322; V7: .eabi_attribute 38, 1
323; V7-NOT:    .eabi_attribute 42
324; V7-NOT:    .eabi_attribute 44
325; V7-NOT:    .eabi_attribute 68
326
327; V7-FAST-NOT:   .eabi_attribute 19
328;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
329;; denormals to zero preserving the sign.
330; V7-FAST: .eabi_attribute 20, 2
331; V7-FAST-NOT:   .eabi_attribute 21
332; V7-FAST-NOT:   .eabi_attribute 22
333; V7-FAST:   .eabi_attribute 23, 1
334
335; V8:      .syntax unified
336; V8: .eabi_attribute 67, "2.09"
337; V8: .eabi_attribute 6, 14
338; V8-NOT:   .eabi_attribute 19
339; V8: .eabi_attribute 20, 1
340; V8: .eabi_attribute 21, 1
341; V8-NOT: .eabi_attribute 22
342; V8: .eabi_attribute 23, 3
343; V8-NOT: .eabi_attribute 44
344
345; V8-FAST-NOT:   .eabi_attribute 19
346;; The default does have an FPU, and for V8-A, it flushes preserving sign.
347; V8-FAST: .eabi_attribute 20, 2
348; V8-FAST-NOT: .eabi_attribute 21
349; V8-FAST-NOT: .eabi_attribute 22
350; V8-FAST: .eabi_attribute 23, 1
351
352; Vt8:     .syntax unified
353; Vt8: .eabi_attribute 6, 14
354; Vt8-NOT:   .eabi_attribute 19
355; Vt8: .eabi_attribute 20, 1
356; Vt8: .eabi_attribute 21, 1
357; Vt8-NOT: .eabi_attribute 22
358; Vt8: .eabi_attribute 23, 3
359
360; V8-FPARMv8:      .syntax unified
361; V8-FPARMv8: .eabi_attribute 6, 14
362; V8-FPARMv8: .fpu fp-armv8
363
364; V8-NEON:      .syntax unified
365; V8-NEON: .eabi_attribute 6, 14
366; V8-NEON: .fpu neon
367; V8-NEON: .eabi_attribute 12, 3
368
369; V8-FPARMv8-NEON:      .syntax unified
370; V8-FPARMv8-NEON: .eabi_attribute 6, 14
371; V8-FPARMv8-NEON: .fpu neon-fp-armv8
372; V8-FPARMv8-NEON: .eabi_attribute 12, 3
373
374; V8-FPARMv8-NEON-CRYPTO:      .syntax unified
375; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
376; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
377; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
378
379; V8MBASELINE: .syntax unified
380; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline
381; V8MBASELINE: .eabi_attribute 6, 16
382; '7' is Tag_CPU_arch_profile, '77' is 'M'
383; V8MBASELINE: .eabi_attribute 7, 77
384; '8' is Tag_ARM_ISA_use
385; V8MBASELINE: .eabi_attribute 8, 0
386; '9' is Tag_Thumb_ISA_use
387; V8MBASELINE: .eabi_attribute 9, 3
388
389; V8MMAINLINE: .syntax unified
390; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline
391; V8MMAINLINE: .eabi_attribute 6, 17
392; V8MMAINLINE: .eabi_attribute 7, 77
393; V8MMAINLINE: .eabi_attribute 8, 0
394; V8MMAINLINE: .eabi_attribute 9, 3
395; V8MMAINLINE_DSP-NOT: .eabi_attribute 46
396
397; V8MMAINLINE_DSP: .syntax unified
398; V8MBASELINE_DSP: .eabi_attribute 6, 17
399; V8MBASELINE_DSP: .eabi_attribute 7, 77
400; V8MMAINLINE_DSP: .eabi_attribute 8, 0
401; V8MMAINLINE_DSP: .eabi_attribute 9, 3
402; V8MMAINLINE_DSP: .eabi_attribute 46, 1
403
404; Tag_CPU_unaligned_access
405; NO-STRICT-ALIGN: .eabi_attribute 34, 1
406; STRICT-ALIGN: .eabi_attribute 34, 0
407
408; Tag_CPU_arch  'ARMv7'
409; CORTEX-A7-CHECK: .eabi_attribute      6, 10
410; CORTEX-A7-NOFPU: .eabi_attribute      6, 10
411
412; CORTEX-A7-FPUV4: .eabi_attribute      6, 10
413
414; Tag_CPU_arch_profile 'A'
415; CORTEX-A7-CHECK: .eabi_attribute      7, 65
416; CORTEX-A7-NOFPU: .eabi_attribute      7, 65
417; CORTEX-A7-FPUV4: .eabi_attribute      7, 65
418
419; Tag_ARM_ISA_use
420; CORTEX-A7-CHECK: .eabi_attribute      8, 1
421; CORTEX-A7-NOFPU: .eabi_attribute      8, 1
422; CORTEX-A7-FPUV4: .eabi_attribute      8, 1
423
424; Tag_THUMB_ISA_use
425; CORTEX-A7-CHECK: .eabi_attribute      9, 2
426; CORTEX-A7-NOFPU: .eabi_attribute      9, 2
427; CORTEX-A7-FPUV4: .eabi_attribute      9, 2
428
429; CORTEX-A7-CHECK: .fpu neon-vfpv4
430; CORTEX-A7-NOFPU-NOT: .fpu
431; CORTEX-A7-FPUV4: .fpu vfpv4
432
433; CORTEX-A7-CHECK-NOT:   .eabi_attribute 19
434; Tag_ABI_FP_denormal
435;; We default to IEEE 754 compliance
436; CORTEX-A7-CHECK: .eabi_attribute      20, 1
437;; The A7 has VFPv3 support by default, so flush preserving sign.
438; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
439; CORTEX-A7-NOFPU: .eabi_attribute      20, 1
440;; Despite there being no FPU, we chose to flush to zero preserving
441;; sign. This matches what the hardware would do for this architecture
442;; revision.
443; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
444; CORTEX-A7-FPUV4: .eabi_attribute      20, 1
445;; The VFPv4 FPU flushes preserving sign.
446; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
447
448; Tag_ABI_FP_exceptions
449; CORTEX-A7-CHECK: .eabi_attribute      21, 1
450; CORTEX-A7-NOFPU: .eabi_attribute      21, 1
451; CORTEX-A7-FPUV4: .eabi_attribute      21, 1
452
453; Tag_ABI_FP_user_exceptions
454; CORTEX-A7-CHECK-NOT: .eabi_attribute      22
455; CORTEX-A7-NOFPU-NOT: .eabi_attribute      22
456; CORTEX-A7-FPUV4-NOT: .eabi_attribute      22
457
458; Tag_ABI_FP_number_model
459; CORTEX-A7-CHECK: .eabi_attribute      23, 3
460; CORTEX-A7-NOFPU: .eabi_attribute      23, 3
461; CORTEX-A7-FPUV4: .eabi_attribute      23, 3
462
463; Tag_ABI_align_needed
464; CORTEX-A7-CHECK: .eabi_attribute      24, 1
465; CORTEX-A7-NOFPU: .eabi_attribute      24, 1
466; CORTEX-A7-FPUV4: .eabi_attribute      24, 1
467
468; Tag_ABI_align_preserved
469; CORTEX-A7-CHECK: .eabi_attribute      25, 1
470; CORTEX-A7-NOFPU: .eabi_attribute      25, 1
471; CORTEX-A7-FPUV4: .eabi_attribute      25, 1
472
473; Tag_FP_HP_extension
474; CORTEX-A7-CHECK: .eabi_attribute      36, 1
475; CORTEX-A7-NOFPU-NOT: .eabi_attribute  36
476; CORTEX-A7-FPUV4: .eabi_attribute      36, 1
477
478; Tag_FP_16bit_format
479; CORTEX-A7-CHECK: .eabi_attribute      38, 1
480; CORTEX-A7-NOFPU: .eabi_attribute      38, 1
481; CORTEX-A7-FPUV4: .eabi_attribute      38, 1
482
483; Tag_MPextension_use
484; CORTEX-A7-CHECK: .eabi_attribute      42, 1
485; CORTEX-A7-NOFPU: .eabi_attribute      42, 1
486; CORTEX-A7-FPUV4: .eabi_attribute      42, 1
487
488; Tag_DIV_use
489; CORTEX-A7-CHECK: .eabi_attribute      44, 2
490; CORTEX-A7-NOFPU: .eabi_attribute      44, 2
491; CORTEX-A7-FPUV4: .eabi_attribute      44, 2
492
493; Tag_DSP_extension
494; CORTEX-A7-CHECK-NOT: .eabi_attribute      46
495
496; Tag_Virtualization_use
497; CORTEX-A7-CHECK: .eabi_attribute      68, 3
498; CORTEX-A7-NOFPU: .eabi_attribute      68, 3
499; CORTEX-A7-FPUV4: .eabi_attribute      68, 3
500
501; CORTEX-A5-DEFAULT:        .cpu    cortex-a5
502; CORTEX-A5-DEFAULT:        .eabi_attribute 6, 10
503; CORTEX-A5-DEFAULT:        .eabi_attribute 7, 65
504; CORTEX-A5-DEFAULT:        .eabi_attribute 8, 1
505; CORTEX-A5-DEFAULT:        .eabi_attribute 9, 2
506; CORTEX-A5-DEFAULT:        .fpu    neon-vfpv4
507; CORTEX-A5-NOT:   .eabi_attribute 19
508;; We default to IEEE 754 compliance
509; CORTEX-A5-DEFAULT:        .eabi_attribute 20, 1
510; CORTEX-A5-DEFAULT:        .eabi_attribute 21, 1
511; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 22
512; CORTEX-A5-DEFAULT:        .eabi_attribute 23, 3
513; CORTEX-A5-DEFAULT:        .eabi_attribute 24, 1
514; CORTEX-A5-DEFAULT:        .eabi_attribute 25, 1
515; CORTEX-A5-DEFAULT:        .eabi_attribute 42, 1
516; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 44
517; CORTEX-A5-DEFAULT:        .eabi_attribute 68, 1
518
519; CORTEX-A5-DEFAULT-FAST-NOT:   .eabi_attribute 19
520;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
521;; is given.
522; CORTEX-A5-DEFAULT-FAST:        .eabi_attribute 20, 2
523; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21
524; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22
525; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1
526
527; CORTEX-A5-NONEON:        .cpu    cortex-a5
528; CORTEX-A5-NONEON:        .eabi_attribute 6, 10
529; CORTEX-A5-NONEON:        .eabi_attribute 7, 65
530; CORTEX-A5-NONEON:        .eabi_attribute 8, 1
531; CORTEX-A5-NONEON:        .eabi_attribute 9, 2
532; CORTEX-A5-NONEON:        .fpu    vfpv4-d16
533;; We default to IEEE 754 compliance
534; CORTEX-A5-NONEON:        .eabi_attribute 20, 1
535; CORTEX-A5-NONEON:        .eabi_attribute 21, 1
536; CORTEX-A5-NONEON-NOT:    .eabi_attribute 22
537; CORTEX-A5-NONEON:        .eabi_attribute 23, 3
538; CORTEX-A5-NONEON:        .eabi_attribute 24, 1
539; CORTEX-A5-NONEON:        .eabi_attribute 25, 1
540; CORTEX-A5-NONEON:        .eabi_attribute 42, 1
541; CORTEX-A5-NONEON:        .eabi_attribute 68, 1
542
543; CORTEX-A5-NONEON-FAST-NOT:   .eabi_attribute 19
544;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
545;; is given.
546; CORTEX-A5-NONEON-FAST:        .eabi_attribute 20, 2
547; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21
548; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22
549; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1
550
551; CORTEX-A5-NOFPU:        .cpu    cortex-a5
552; CORTEX-A5-NOFPU:        .eabi_attribute 6, 10
553; CORTEX-A5-NOFPU:        .eabi_attribute 7, 65
554; CORTEX-A5-NOFPU:        .eabi_attribute 8, 1
555; CORTEX-A5-NOFPU:        .eabi_attribute 9, 2
556; CORTEX-A5-NOFPU-NOT:    .fpu
557; CORTEX-A5-NOFPU-NOT:   .eabi_attribute 19
558;; We default to IEEE 754 compliance
559; CORTEX-A5-NOFPU:        .eabi_attribute 20, 1
560; CORTEX-A5-NOFPU:        .eabi_attribute 21, 1
561; CORTEX-A5-NOFPU-NOT:    .eabi_attribute 22
562; CORTEX-A5-NOFPU:        .eabi_attribute 23, 3
563; CORTEX-A5-NOFPU:        .eabi_attribute 24, 1
564; CORTEX-A5-NOFPU:        .eabi_attribute 25, 1
565; CORTEX-A5-NOFPU:        .eabi_attribute 42, 1
566; CORTEX-A5-NOFPU:        .eabi_attribute 68, 1
567
568; CORTEX-A5-NOFPU-FAST-NOT:   .eabi_attribute 19
569;; Despite there being no FPU, we chose to flush to zero preserving
570;; sign. This matches what the hardware would do for this architecture
571;; revision.
572; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
573; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21
574; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22
575; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1
576
577; CORTEX-A9-SOFT:  .cpu cortex-a9
578; CORTEX-A9-SOFT:  .eabi_attribute 6, 10
579; CORTEX-A9-SOFT:  .eabi_attribute 7, 65
580; CORTEX-A9-SOFT:  .eabi_attribute 8, 1
581; CORTEX-A9-SOFT:  .eabi_attribute 9, 2
582; CORTEX-A9-SOFT:  .fpu neon
583; CORTEX-A9-SOFT-NOT:   .eabi_attribute 19
584;; We default to IEEE 754 compliance
585; CORTEX-A9-SOFT:  .eabi_attribute 20, 1
586; CORTEX-A9-SOFT:  .eabi_attribute 21, 1
587; CORTEX-A9-SOFT-NOT:  .eabi_attribute 22
588; CORTEX-A9-SOFT:  .eabi_attribute 23, 3
589; CORTEX-A9-SOFT:  .eabi_attribute 24, 1
590; CORTEX-A9-SOFT:  .eabi_attribute 25, 1
591; CORTEX-A9-SOFT-NOT:  .eabi_attribute 27
592; CORTEX-A9-SOFT-NOT:  .eabi_attribute 28
593; CORTEX-A9-SOFT:  .eabi_attribute 36, 1
594; CORTEX-A9-SOFT:  .eabi_attribute 38, 1
595; CORTEX-A9-SOFT:  .eabi_attribute 42, 1
596; CORTEX-A9-SOFT-NOT:  .eabi_attribute 44
597; CORTEX-A9-SOFT:  .eabi_attribute 68, 1
598
599; CORTEX-A9-SOFT-FAST-NOT:   .eabi_attribute 19
600;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when
601;; -ffast-math is specified.
602; CORTEX-A9-SOFT-FAST:  .eabi_attribute 20, 2
603; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21
604; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22
605; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1
606
607; CORTEX-A9-HARD:  .cpu cortex-a9
608; CORTEX-A9-HARD:  .eabi_attribute 6, 10
609; CORTEX-A9-HARD:  .eabi_attribute 7, 65
610; CORTEX-A9-HARD:  .eabi_attribute 8, 1
611; CORTEX-A9-HARD:  .eabi_attribute 9, 2
612; CORTEX-A9-HARD:  .fpu neon
613; CORTEX-A9-HARD-NOT:   .eabi_attribute 19
614;; We default to IEEE 754 compliance
615; CORTEX-A9-HARD:  .eabi_attribute 20, 1
616; CORTEX-A9-HARD:  .eabi_attribute 21, 1
617; CORTEX-A9-HARD-NOT:  .eabi_attribute 22
618; CORTEX-A9-HARD:  .eabi_attribute 23, 3
619; CORTEX-A9-HARD:  .eabi_attribute 24, 1
620; CORTEX-A9-HARD:  .eabi_attribute 25, 1
621; CORTEX-A9-HARD-NOT:  .eabi_attribute 27
622; CORTEX-A9-HARD:  .eabi_attribute 28, 1
623; CORTEX-A9-HARD:  .eabi_attribute 36, 1
624; CORTEX-A9-HARD:  .eabi_attribute 38, 1
625; CORTEX-A9-HARD:  .eabi_attribute 42, 1
626; CORTEX-A9-HARD:  .eabi_attribute 68, 1
627
628; CORTEX-A9-HARD-FAST-NOT:   .eabi_attribute 19
629;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when
630;; -ffast-math is specified.
631; CORTEX-A9-HARD-FAST:  .eabi_attribute 20, 2
632; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 21
633; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 22
634; CORTEX-A9-HARD-FAST:  .eabi_attribute 23, 1
635
636; CORTEX-A12-DEFAULT:  .cpu cortex-a12
637; CORTEX-A12-DEFAULT:  .eabi_attribute 6, 10
638; CORTEX-A12-DEFAULT:  .eabi_attribute 7, 65
639; CORTEX-A12-DEFAULT:  .eabi_attribute 8, 1
640; CORTEX-A12-DEFAULT:  .eabi_attribute 9, 2
641; CORTEX-A12-DEFAULT:  .fpu neon-vfpv4
642; CORTEX-A12-DEFAULT-NOT:   .eabi_attribute 19
643;; We default to IEEE 754 compliance
644; CORTEX-A12-DEFAULT:  .eabi_attribute 20, 1
645; CORTEX-A12-DEFAULT:  .eabi_attribute 21, 1
646; CORTEX-A12-DEFAULT-NOT:  .eabi_attribute 22
647; CORTEX-A12-DEFAULT:  .eabi_attribute 23, 3
648; CORTEX-A12-DEFAULT:  .eabi_attribute 24, 1
649; CORTEX-A12-DEFAULT:  .eabi_attribute 25, 1
650; CORTEX-A12-DEFAULT:  .eabi_attribute 42, 1
651; CORTEX-A12-DEFAULT:  .eabi_attribute 44, 2
652; CORTEX-A12-DEFAULT:  .eabi_attribute 68, 3
653
654; CORTEX-A12-DEFAULT-FAST-NOT:   .eabi_attribute 19
655;; The A12 defaults to a VFPv3 FPU, so it flushes preseving sign when
656;; -ffast-math is specified.
657; CORTEX-A12-DEFAULT-FAST:  .eabi_attribute 20, 2
658; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 21
659; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 22
660; CORTEX-A12-HARD-FAST:  .eabi_attribute 23, 1
661
662; CORTEX-A12-NOFPU:  .cpu cortex-a12
663; CORTEX-A12-NOFPU:  .eabi_attribute 6, 10
664; CORTEX-A12-NOFPU:  .eabi_attribute 7, 65
665; CORTEX-A12-NOFPU:  .eabi_attribute 8, 1
666; CORTEX-A12-NOFPU:  .eabi_attribute 9, 2
667; CORTEX-A12-NOFPU-NOT:  .fpu
668; CORTEX-A12-NOFPU-NOT:   .eabi_attribute 19
669;; We default to IEEE 754 compliance
670; CORTEX-A12-NOFPU:  .eabi_attribute 20, 1
671; CORTEX-A12-NOFPU:  .eabi_attribute 21, 1
672; CORTEX-A12-NOFPU-NOT:  .eabi_attribute 22
673; CORTEX-A12-NOFPU:  .eabi_attribute 23, 3
674; CORTEX-A12-NOFPU:  .eabi_attribute 24, 1
675; CORTEX-A12-NOFPU:  .eabi_attribute 25, 1
676; CORTEX-A12-NOFPU:  .eabi_attribute 42, 1
677; CORTEX-A12-NOFPU:  .eabi_attribute 44, 2
678; CORTEX-A12-NOFPU:  .eabi_attribute 68, 3
679
680; CORTEX-A12-NOFPU-FAST-NOT:   .eabi_attribute 19
681;; Despite there being no FPU, we chose to flush to zero preserving
682;; sign. This matches what the hardware would do for this architecture
683;; revision.
684; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 20, 2
685; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 21
686; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 22
687; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 23, 1
688
689; CORTEX-A15: .cpu cortex-a15
690; CORTEX-A15: .eabi_attribute 6, 10
691; CORTEX-A15: .eabi_attribute 7, 65
692; CORTEX-A15: .eabi_attribute 8, 1
693; CORTEX-A15: .eabi_attribute 9, 2
694; CORTEX-A15: .fpu neon-vfpv4
695; CORTEX-A15-NOT:   .eabi_attribute 19
696;; We default to IEEE 754 compliance
697; CORTEX-A15: .eabi_attribute 20, 1
698; CORTEX-A15: .eabi_attribute 21, 1
699; CORTEX-A15-NOT: .eabi_attribute 22
700; CORTEX-A15: .eabi_attribute 23, 3
701; CORTEX-A15: .eabi_attribute 24, 1
702; CORTEX-A15: .eabi_attribute 25, 1
703; CORTEX-A15-NOT: .eabi_attribute 27
704; CORTEX-A15-NOT: .eabi_attribute 28
705; CORTEX-A15: .eabi_attribute 36, 1
706; CORTEX-A15: .eabi_attribute 38, 1
707; CORTEX-A15: .eabi_attribute 42, 1
708; CORTEX-A15: .eabi_attribute 44, 2
709; CORTEX-A15: .eabi_attribute 68, 3
710
711; CORTEX-A15-FAST-NOT:   .eabi_attribute 19
712;; The A15 defaults to a VFPv3 FPU, so it flushes preseving sign when
713;; -ffast-math is specified.
714; CORTEX-A15-FAST: .eabi_attribute 20, 2
715; CORTEX-A15-FAST-NOT:  .eabi_attribute 21
716; CORTEX-A15-FAST-NOT:  .eabi_attribute 22
717; CORTEX-A15-FAST:  .eabi_attribute 23, 1
718
719; CORTEX-A17-DEFAULT:  .cpu cortex-a17
720; CORTEX-A17-DEFAULT:  .eabi_attribute 6, 10
721; CORTEX-A17-DEFAULT:  .eabi_attribute 7, 65
722; CORTEX-A17-DEFAULT:  .eabi_attribute 8, 1
723; CORTEX-A17-DEFAULT:  .eabi_attribute 9, 2
724; CORTEX-A17-DEFAULT:  .fpu neon-vfpv4
725; CORTEX-A17-DEFAULT-NOT:   .eabi_attribute 19
726;; We default to IEEE 754 compliance
727; CORTEX-A17-DEFAULT:  .eabi_attribute 20, 1
728; CORTEX-A17-DEFAULT:  .eabi_attribute 21, 1
729; CORTEX-A17-DEFAULT-NOT:  .eabi_attribute 22
730; CORTEX-A17-DEFAULT:  .eabi_attribute 23, 3
731; CORTEX-A17-DEFAULT:  .eabi_attribute 24, 1
732; CORTEX-A17-DEFAULT:  .eabi_attribute 25, 1
733; CORTEX-A17-DEFAULT:  .eabi_attribute 42, 1
734; CORTEX-A17-DEFAULT:  .eabi_attribute 44, 2
735; CORTEX-A17-DEFAULT:  .eabi_attribute 68, 3
736
737; CORTEX-A17-FAST-NOT:   .eabi_attribute 19
738;; The A17 defaults to a VFPv3 FPU, so it flushes preseving sign when
739;; -ffast-math is specified.
740; CORTEX-A17-FAST:  .eabi_attribute 20, 2
741; CORTEX-A17-FAST-NOT:  .eabi_attribute 21
742; CORTEX-A17-FAST-NOT:  .eabi_attribute 22
743; CORTEX-A17-FAST:  .eabi_attribute 23, 1
744
745; CORTEX-A17-NOFPU:  .cpu cortex-a17
746; CORTEX-A17-NOFPU:  .eabi_attribute 6, 10
747; CORTEX-A17-NOFPU:  .eabi_attribute 7, 65
748; CORTEX-A17-NOFPU:  .eabi_attribute 8, 1
749; CORTEX-A17-NOFPU:  .eabi_attribute 9, 2
750; CORTEX-A17-NOFPU-NOT:  .fpu
751; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
752;; We default to IEEE 754 compliance
753; CORTEX-A17-NOFPU:  .eabi_attribute 20, 1
754; CORTEX-A17-NOFPU:  .eabi_attribute 21, 1
755; CORTEX-A17-NOFPU-NOT:  .eabi_attribute 22
756; CORTEX-A17-NOFPU:  .eabi_attribute 23, 3
757; CORTEX-A17-NOFPU:  .eabi_attribute 24, 1
758; CORTEX-A17-NOFPU:  .eabi_attribute 25, 1
759; CORTEX-A17-NOFPU:  .eabi_attribute 42, 1
760; CORTEX-A17-NOFPU:  .eabi_attribute 44, 2
761; CORTEX-A17-NOFPU:  .eabi_attribute 68, 3
762
763; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
764;; Despite there being no FPU, we chose to flush to zero preserving
765;; sign. This matches what the hardware would do for this architecture
766;; revision.
767; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 20, 2
768; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 21
769; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 22
770; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 23, 1
771
772; CORTEX-M0:  .cpu cortex-m0
773; CORTEX-M0:  .eabi_attribute 6, 12
774; CORTEX-M0-NOT:  .eabi_attribute 7
775; CORTEX-M0:  .eabi_attribute 8, 0
776; CORTEX-M0:  .eabi_attribute 9, 1
777; CORTEX-M0-NOT:   .eabi_attribute 19
778;; We default to IEEE 754 compliance
779; CORTEX-M0:  .eabi_attribute 20, 1
780; CORTEX-M0:  .eabi_attribute 21, 1
781; CORTEX-M0-NOT:  .eabi_attribute 22
782; CORTEX-M0:  .eabi_attribute 23, 3
783; CORTEX-M0: .eabi_attribute 34, 0
784; CORTEX-M0:  .eabi_attribute 24, 1
785; CORTEX-M0:  .eabi_attribute 25, 1
786; CORTEX-M0-NOT:  .eabi_attribute 27
787; CORTEX-M0-NOT:  .eabi_attribute 28
788; CORTEX-M0-NOT:  .eabi_attribute 36
789; CORTEX-M0:  .eabi_attribute 38, 1
790; CORTEX-M0-NOT:  .eabi_attribute 42
791; CORTEX-M0-NOT:  .eabi_attribute 44
792; CORTEX-M0-NOT:  .eabi_attribute 68
793
794; CORTEX-M0-FAST-NOT:   .eabi_attribute 19
795;; Despite the M0 CPU having no FPU in this scenario, we chose to
796;; flush to positive zero here. There's no hardware support doing
797;; this, but the fast maths software library might and such behaviour
798;; would match hardware support on this architecture revision if it
799;; existed.
800; CORTEX-M0-FAST-NOT:  .eabi_attribute 20
801; CORTEX-M0-FAST-NOT:  .eabi_attribute 21
802; CORTEX-M0-FAST-NOT:  .eabi_attribute 22
803; CORTEX-M0-FAST:  .eabi_attribute 23, 1
804
805; CORTEX-M0PLUS:  .cpu cortex-m0plus
806; CORTEX-M0PLUS:  .eabi_attribute 6, 12
807; CORTEX-M0PLUS-NOT:  .eabi_attribute 7
808; CORTEX-M0PLUS:  .eabi_attribute 8, 0
809; CORTEX-M0PLUS:  .eabi_attribute 9, 1
810; CORTEX-M0PLUS-NOT:   .eabi_attribute 19
811;; We default to IEEE 754 compliance
812; CORTEX-M0PLUS:  .eabi_attribute 20, 1
813; CORTEX-M0PLUS:  .eabi_attribute 21, 1
814; CORTEX-M0PLUS-NOT:  .eabi_attribute 22
815; CORTEX-M0PLUS:  .eabi_attribute 23, 3
816; CORTEX-M0PLUS:  .eabi_attribute 24, 1
817; CORTEX-M0PLUS:  .eabi_attribute 25, 1
818; CORTEX-M0PLUS-NOT:  .eabi_attribute 27
819; CORTEX-M0PLUS-NOT:  .eabi_attribute 28
820; CORTEX-M0PLUS-NOT:  .eabi_attribute 36
821; CORTEX-M0PLUS:  .eabi_attribute 38, 1
822; CORTEX-M0PLUS-NOT:  .eabi_attribute 42
823; CORTEX-M0PLUS-NOT:  .eabi_attribute 44
824; CORTEX-M0PLUS-NOT:  .eabi_attribute 68
825
826; CORTEX-M0PLUS-FAST-NOT:   .eabi_attribute 19
827;; Despite the M0+ CPU having no FPU in this scenario, we chose to
828;; flush to positive zero here. There's no hardware support doing
829;; this, but the fast maths software library might and such behaviour
830;; would match hardware support on this architecture revision if it
831;; existed.
832; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 20
833; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 21
834; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 22
835; CORTEX-M0PLUS-FAST:  .eabi_attribute 23, 1
836
837; CORTEX-M1:  .cpu cortex-m1
838; CORTEX-M1:  .eabi_attribute 6, 12
839; CORTEX-M1-NOT:  .eabi_attribute 7
840; CORTEX-M1:  .eabi_attribute 8, 0
841; CORTEX-M1:  .eabi_attribute 9, 1
842; CORTEX-M1-NOT:   .eabi_attribute 19
843;; We default to IEEE 754 compliance
844; CORTEX-M1:  .eabi_attribute 20, 1
845; CORTEX-M1:  .eabi_attribute 21, 1
846; CORTEX-M1-NOT:  .eabi_attribute 22
847; CORTEX-M1:  .eabi_attribute 23, 3
848; CORTEX-M1:  .eabi_attribute 24, 1
849; CORTEX-M1:  .eabi_attribute 25, 1
850; CORTEX-M1-NOT:  .eabi_attribute 27
851; CORTEX-M1-NOT:  .eabi_attribute 28
852; CORTEX-M1-NOT:  .eabi_attribute 36
853; CORTEX-M1:  .eabi_attribute 38, 1
854; CORTEX-M1-NOT:  .eabi_attribute 42
855; CORTEX-M1-NOT:  .eabi_attribute 44
856; CORTEX-M1-NOT:  .eabi_attribute 68
857
858; CORTEX-M1-FAST-NOT:   .eabi_attribute 19
859;; Despite the M1 CPU having no FPU in this scenario, we chose to
860;; flush to positive zero here. There's no hardware support doing
861;; this, but the fast maths software library might and such behaviour
862;; would match hardware support on this architecture revision if it
863;; existed.
864; CORTEX-M1-FAST-NOT:  .eabi_attribute 20
865; CORTEX-M1-FAST-NOT:  .eabi_attribute 21
866; CORTEX-M1-FAST-NOT:  .eabi_attribute 22
867; CORTEX-M1-FAST:  .eabi_attribute 23, 1
868
869; SC000:  .cpu sc000
870; SC000:  .eabi_attribute 6, 12
871; SC000-NOT:  .eabi_attribute 7
872; SC000:  .eabi_attribute 8, 0
873; SC000:  .eabi_attribute 9, 1
874; SC000-NOT:   .eabi_attribute 19
875;; We default to IEEE 754 compliance
876; SC000:  .eabi_attribute 20, 1
877; SC000:  .eabi_attribute 21, 1
878; SC000-NOT:  .eabi_attribute 22
879; SC000:  .eabi_attribute 23, 3
880; SC000:  .eabi_attribute 24, 1
881; SC000:  .eabi_attribute 25, 1
882; SC000-NOT:  .eabi_attribute 27
883; SC000-NOT:  .eabi_attribute 28
884; SC000-NOT:  .eabi_attribute 36
885; SC000:  .eabi_attribute 38, 1
886; SC000-NOT:  .eabi_attribute 42
887; SC000-NOT:  .eabi_attribute 44
888; SC000-NOT:  .eabi_attribute 68
889
890; SC000-FAST-NOT:   .eabi_attribute 19
891;; Despite the SC000 CPU having no FPU in this scenario, we chose to
892;; flush to positive zero here. There's no hardware support doing
893;; this, but the fast maths software library might and such behaviour
894;; would match hardware support on this architecture revision if it
895;; existed.
896; SC000-FAST-NOT:  .eabi_attribute 20
897; SC000-FAST-NOT:  .eabi_attribute 21
898; SC000-FAST-NOT:  .eabi_attribute 22
899; SC000-FAST:  .eabi_attribute 23, 1
900
901; CORTEX-M3:  .cpu cortex-m3
902; CORTEX-M3:  .eabi_attribute 6, 10
903; CORTEX-M3:  .eabi_attribute 7, 77
904; CORTEX-M3:  .eabi_attribute 8, 0
905; CORTEX-M3:  .eabi_attribute 9, 2
906; CORTEX-M3-NOT:   .eabi_attribute 19
907;; We default to IEEE 754 compliance
908; CORTEX-M3:  .eabi_attribute 20, 1
909; CORTEX-M3:  .eabi_attribute 21, 1
910; CORTEX-M3-NOT:  .eabi_attribute 22
911; CORTEX-M3:  .eabi_attribute 23, 3
912; CORTEX-M3:  .eabi_attribute 24, 1
913; CORTEX-M3:  .eabi_attribute 25, 1
914; CORTEX-M3-NOT:  .eabi_attribute 27
915; CORTEX-M3-NOT:  .eabi_attribute 28
916; CORTEX-M3-NOT:  .eabi_attribute 36
917; CORTEX-M3:  .eabi_attribute 38, 1
918; CORTEX-M3-NOT:  .eabi_attribute 42
919; CORTEX-M3-NOT:  .eabi_attribute 44
920; CORTEX-M3-NOT:  .eabi_attribute 68
921
922; CORTEX-M3-FAST-NOT:   .eabi_attribute 19
923;; Despite there being no FPU, we chose to flush to zero preserving
924;; sign. This matches what the hardware would do for this architecture
925;; revision.
926; CORTEX-M3-FAST:  .eabi_attribute 20, 2
927; CORTEX-M3-FAST-NOT:  .eabi_attribute 21
928; CORTEX-M3-FAST-NOT:  .eabi_attribute 22
929; CORTEX-M3-FAST:  .eabi_attribute 23, 1
930
931; SC300:  .cpu sc300
932; SC300:  .eabi_attribute 6, 10
933; SC300:  .eabi_attribute 7, 77
934; SC300:  .eabi_attribute 8, 0
935; SC300:  .eabi_attribute 9, 2
936; SC300-NOT:   .eabi_attribute 19
937;; We default to IEEE 754 compliance
938; SC300:  .eabi_attribute 20, 1
939; SC300:  .eabi_attribute 21, 1
940; SC300-NOT:  .eabi_attribute 22
941; SC300:  .eabi_attribute 23, 3
942; SC300:  .eabi_attribute 24, 1
943; SC300:  .eabi_attribute 25, 1
944; SC300-NOT:  .eabi_attribute 27
945; SC300-NOT:  .eabi_attribute 28
946; SC300-NOT:  .eabi_attribute 36
947; SC300:  .eabi_attribute 38, 1
948; SC300-NOT:  .eabi_attribute 42
949; SC300-NOT:  .eabi_attribute 44
950; SC300-NOT:  .eabi_attribute 68
951
952; SC300-FAST-NOT:   .eabi_attribute 19
953;; Despite there being no FPU, we chose to flush to zero preserving
954;; sign. This matches what the hardware would do for this architecture
955;; revision.
956; SC300-FAST:  .eabi_attribute 20, 2
957; SC300-FAST-NOT:  .eabi_attribute 21
958; SC300-FAST-NOT:  .eabi_attribute 22
959; SC300-FAST:  .eabi_attribute 23, 1
960
961; CORTEX-M4-SOFT:  .cpu cortex-m4
962; CORTEX-M4-SOFT:  .eabi_attribute 6, 13
963; CORTEX-M4-SOFT:  .eabi_attribute 7, 77
964; CORTEX-M4-SOFT:  .eabi_attribute 8, 0
965; CORTEX-M4-SOFT:  .eabi_attribute 9, 2
966; CORTEX-M4-SOFT:  .fpu fpv4-sp-d16
967; CORTEX-M4-SOFT-NOT:   .eabi_attribute 19
968;; We default to IEEE 754 compliance
969; CORTEX-M4-SOFT:  .eabi_attribute 20, 1
970; CORTEX-M4-SOFT:  .eabi_attribute 21, 1
971; CORTEX-M4-SOFT-NOT:  .eabi_attribute 22
972; CORTEX-M4-SOFT:  .eabi_attribute 23, 3
973; CORTEX-M4-SOFT:  .eabi_attribute 24, 1
974; CORTEX-M4-SOFT:  .eabi_attribute 25, 1
975; CORTEX-M4-SOFT:  .eabi_attribute 27, 1
976; CORTEX-M4-SOFT-NOT:  .eabi_attribute 28
977; CORTEX-M4-SOFT:  .eabi_attribute 36, 1
978; CORTEX-M4-SOFT:  .eabi_attribute 38, 1
979; CORTEX-M4-SOFT-NOT:  .eabi_attribute 42
980; CORTEX-M4-SOFT-NOT:  .eabi_attribute 44
981; CORTEX-M4-SOFT-NOT:  .eabi_attribute 68
982
983; CORTEX-M4-SOFT-FAST-NOT:   .eabi_attribute 19
984;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when
985;; -ffast-math is specified.
986; CORTEX-M4-SOFT-FAST:  .eabi_attribute 20, 2
987; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 21
988; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 22
989; CORTEX-M4-SOFT-FAST:  .eabi_attribute 23, 1
990
991; CORTEX-M4-HARD:  .cpu cortex-m4
992; CORTEX-M4-HARD:  .eabi_attribute 6, 13
993; CORTEX-M4-HARD:  .eabi_attribute 7, 77
994; CORTEX-M4-HARD:  .eabi_attribute 8, 0
995; CORTEX-M4-HARD:  .eabi_attribute 9, 2
996; CORTEX-M4-HARD:  .fpu fpv4-sp-d16
997; CORTEX-M4-HARD-NOT:   .eabi_attribute 19
998;; We default to IEEE 754 compliance
999; CORTEX-M4-HARD:  .eabi_attribute 20, 1
1000; CORTEX-M4-HARD:  .eabi_attribute 21, 1
1001; CORTEX-M4-HARD-NOT:  .eabi_attribute 22
1002; CORTEX-M4-HARD:  .eabi_attribute 23, 3
1003; CORTEX-M4-HARD:  .eabi_attribute 24, 1
1004; CORTEX-M4-HARD:  .eabi_attribute 25, 1
1005; CORTEX-M4-HARD:  .eabi_attribute 27, 1
1006; CORTEX-M4-HARD:  .eabi_attribute 28, 1
1007; CORTEX-M4-HARD:  .eabi_attribute 36, 1
1008; CORTEX-M4-HARD:  .eabi_attribute 38, 1
1009; CORTEX-M4-HARD-NOT:  .eabi_attribute 42
1010; CORTEX-M4-HARD-NOT:  .eabi_attribute 44
1011; CORTEX-M4-HARD-NOT:  .eabi_attribute 68
1012
1013; CORTEX-M4-HARD-FAST-NOT:   .eabi_attribute 19
1014;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when
1015;; -ffast-math is specified.
1016; CORTEX-M4-HARD-FAST:  .eabi_attribute 20, 2
1017; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 21
1018; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 22
1019; CORTEX-M4-HARD-FAST:  .eabi_attribute 23, 1
1020
1021; CORTEX-M7:  .cpu    cortex-m7
1022; CORTEX-M7:  .eabi_attribute 6, 13
1023; CORTEX-M7:  .eabi_attribute 7, 77
1024; CORTEX-M7:  .eabi_attribute 8, 0
1025; CORTEX-M7:  .eabi_attribute 9, 2
1026; CORTEX-M7-SOFT-NOT: .fpu
1027; CORTEX-M7-SINGLE:  .fpu fpv5-sp-d16
1028; CORTEX-M7-DOUBLE:  .fpu fpv5-d16
1029; CORTEX-M7:  .eabi_attribute 17, 1
1030; CORTEX-M7-NOT:   .eabi_attribute 19
1031;; We default to IEEE 754 compliance
1032; CORTEX-M7:  .eabi_attribute 20, 1
1033; CORTEX-M7:  .eabi_attribute 21, 1
1034; CORTEX-M7-NOT:  .eabi_attribute 22
1035; CORTEX-M7:  .eabi_attribute 23, 3
1036; CORTEX-M7:  .eabi_attribute 24, 1
1037; CORTEX-M7:  .eabi_attribute 25, 1
1038; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
1039; CORTEX-M7-SINGLE:  .eabi_attribute 27, 1
1040; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
1041; CORTEX-M7:  .eabi_attribute 36, 1
1042; CORTEX-M7:  .eabi_attribute 38, 1
1043; CORTEX-M7-NOT:  .eabi_attribute 44
1044; CORTEX-M7:  .eabi_attribute 14, 0
1045
1046; CORTEX-M7-NOFPU-FAST-NOT:   .eabi_attribute 19
1047;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1048; CORTEX-M7-FAST:  .eabi_attribute 20, 2
1049;; Despite there being no FPU, we chose to flush to zero preserving
1050;; sign. This matches what the hardware would do for this architecture
1051;; revision.
1052; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
1053; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 21
1054; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 22
1055; CORTEX-M7-NOFPU-FAST:  .eabi_attribute 23, 1
1056
1057; CORTEX-R4:  .cpu cortex-r4
1058; CORTEX-R4:  .eabi_attribute 6, 10
1059; CORTEX-R4:  .eabi_attribute 7, 82
1060; CORTEX-R4:  .eabi_attribute 8, 1
1061; CORTEX-R4:  .eabi_attribute 9, 2
1062; CORTEX-R4-NOT:  .fpu vfpv3-d16
1063; CORTEX-R4-NOT:   .eabi_attribute 19
1064;; We default to IEEE 754 compliance
1065; CORTEX-R4:  .eabi_attribute 20, 1
1066; CORTEX-R4:  .eabi_attribute 21, 1
1067; CORTEX-R4-NOT:  .eabi_attribute 22
1068; CORTEX-R4:  .eabi_attribute 23, 3
1069; CORTEX-R4:  .eabi_attribute 24, 1
1070; CORTEX-R4:  .eabi_attribute 25, 1
1071; CORTEX-R4-NOT:  .eabi_attribute 28
1072; CORTEX-R4-NOT:  .eabi_attribute 36
1073; CORTEX-R4:  .eabi_attribute 38, 1
1074; CORTEX-R4-NOT:  .eabi_attribute 42
1075; CORTEX-R4-NOT:  .eabi_attribute 44
1076; CORTEX-R4-NOT:  .eabi_attribute 68
1077
1078; CORTEX-R4F:  .cpu cortex-r4f
1079; CORTEX-R4F:  .eabi_attribute 6, 10
1080; CORTEX-R4F:  .eabi_attribute 7, 82
1081; CORTEX-R4F:  .eabi_attribute 8, 1
1082; CORTEX-R4F:  .eabi_attribute 9, 2
1083; CORTEX-R4F:  .fpu vfpv3-d16
1084; CORTEX-R4F-NOT:   .eabi_attribute 19
1085;; We default to IEEE 754 compliance
1086; CORTEX-R4F:  .eabi_attribute 20, 1
1087; CORTEX-R4F:  .eabi_attribute 21, 1
1088; CORTEX-R4F-NOT:  .eabi_attribute 22
1089; CORTEX-R4F:  .eabi_attribute 23, 3
1090; CORTEX-R4F:  .eabi_attribute 24, 1
1091; CORTEX-R4F:  .eabi_attribute 25, 1
1092; CORTEX-R4F-NOT:  .eabi_attribute 27, 1
1093; CORTEX-R4F-NOT:  .eabi_attribute 28
1094; CORTEX-R4F-NOT:  .eabi_attribute 36
1095; CORTEX-R4F:  .eabi_attribute 38, 1
1096; CORTEX-R4F-NOT:  .eabi_attribute 42
1097; CORTEX-R4F-NOT:  .eabi_attribute 44
1098; CORTEX-R4F-NOT:  .eabi_attribute 68
1099
1100; CORTEX-R5:  .cpu cortex-r5
1101; CORTEX-R5:  .eabi_attribute 6, 10
1102; CORTEX-R5:  .eabi_attribute 7, 82
1103; CORTEX-R5:  .eabi_attribute 8, 1
1104; CORTEX-R5:  .eabi_attribute 9, 2
1105; CORTEX-R5:  .fpu vfpv3-d16
1106; CORTEX-R5-NOT:   .eabi_attribute 19
1107;; We default to IEEE 754 compliance
1108; CORTEX-R5:  .eabi_attribute 20, 1
1109; CORTEX-R5:  .eabi_attribute 21, 1
1110; CORTEX-R5-NOT:  .eabi_attribute 22
1111; CORTEX-R5:  .eabi_attribute 23, 3
1112; CORTEX-R5:  .eabi_attribute 24, 1
1113; CORTEX-R5:  .eabi_attribute 25, 1
1114; CORTEX-R5-NOT:  .eabi_attribute 27, 1
1115; CORTEX-R5-NOT:  .eabi_attribute 28
1116; CORTEX-R5-NOT:  .eabi_attribute 36
1117; CORTEX-R5:  .eabi_attribute 38, 1
1118; CORTEX-R5-NOT:  .eabi_attribute 42
1119; CORTEX-R5:  .eabi_attribute 44, 2
1120; CORTEX-R5-NOT:  .eabi_attribute 68
1121
1122; CORTEX-R5-FAST-NOT:   .eabi_attribute 19
1123;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
1124; CORTEX-R5-FAST:  .eabi_attribute 20, 2
1125; CORTEX-R5-FAST-NOT:  .eabi_attribute 21
1126; CORTEX-R5-FAST-NOT:  .eabi_attribute 22
1127; CORTEX-R5-FAST:  .eabi_attribute 23, 1
1128
1129; CORTEX-R7:  .cpu cortex-r7
1130; CORTEX-R7:  .eabi_attribute 6, 10
1131; CORTEX-R7:  .eabi_attribute 7, 82
1132; CORTEX-R7:  .eabi_attribute 8, 1
1133; CORTEX-R7:  .eabi_attribute 9, 2
1134; CORTEX-R7:  .fpu vfpv3xd
1135; CORTEX-R7-NOT:   .eabi_attribute 19
1136;; We default to IEEE 754 compliance
1137; CORTEX-R7:  .eabi_attribute 20, 1
1138; CORTEX-R7:  .eabi_attribute 21, 1
1139; CORTEX-R7-NOT:  .eabi_attribute 22
1140; CORTEX-R7:  .eabi_attribute 23, 3
1141; CORTEX-R7:  .eabi_attribute 24, 1
1142; CORTEX-R7:  .eabi_attribute 25, 1
1143; CORTEX-R7:  .eabi_attribute 27, 1
1144; CORTEX-R7-NOT:  .eabi_attribute 28
1145; CORTEX-R7:  .eabi_attribute 36, 1
1146; CORTEX-R7:  .eabi_attribute 38, 1
1147; CORTEX-R7:  .eabi_attribute 42, 1
1148; CORTEX-R7:  .eabi_attribute 44, 2
1149; CORTEX-R7-NOT:  .eabi_attribute 68
1150
1151; CORTEX-R7-FAST-NOT:   .eabi_attribute 19
1152;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
1153; CORTEX-R7-FAST:  .eabi_attribute 20, 2
1154; CORTEX-R7-FAST-NOT:  .eabi_attribute 21
1155; CORTEX-R7-FAST-NOT:  .eabi_attribute 22
1156; CORTEX-R7-FAST:  .eabi_attribute 23, 1
1157
1158; CORTEX-A35:  .cpu cortex-a35
1159; CORTEX-A35:  .eabi_attribute 6, 14
1160; CORTEX-A35:  .eabi_attribute 7, 65
1161; CORTEX-A35:  .eabi_attribute 8, 1
1162; CORTEX-A35:  .eabi_attribute 9, 2
1163; CORTEX-A35:  .fpu crypto-neon-fp-armv8
1164; CORTEX-A35:  .eabi_attribute 12, 3
1165; CORTEX-A35-NOT:   .eabi_attribute 19
1166;; We default to IEEE 754 compliance
1167; CORTEX-A35:  .eabi_attribute 20, 1
1168; CORTEX-A35:  .eabi_attribute 21, 1
1169; CORTEX-A35-NOT:  .eabi_attribute 22
1170; CORTEX-A35:  .eabi_attribute 23, 3
1171; CORTEX-A35:  .eabi_attribute 24, 1
1172; CORTEX-A35:  .eabi_attribute 25, 1
1173; CORTEX-A35-NOT:  .eabi_attribute 27
1174; CORTEX-A35-NOT:  .eabi_attribute 28
1175; CORTEX-A35:  .eabi_attribute 36, 1
1176; CORTEX-A35:  .eabi_attribute 38, 1
1177; CORTEX-A35:  .eabi_attribute 42, 1
1178; CORTEX-A35-NOT:  .eabi_attribute 44
1179; CORTEX-A35:  .eabi_attribute 68, 3
1180
1181; CORTEX-A35-FAST-NOT:   .eabi_attribute 19
1182;; The A35 has the ARMv8 FP unit, which always flushes preserving sign.
1183; CORTEX-A35-FAST:  .eabi_attribute 20, 2
1184; CORTEX-A35-FAST-NOT:  .eabi_attribute 21
1185; CORTEX-A35-FAST-NOT:  .eabi_attribute 22
1186; CORTEX-A35-FAST:  .eabi_attribute 23, 1
1187
1188; CORTEX-A53:  .cpu cortex-a53
1189; CORTEX-A53:  .eabi_attribute 6, 14
1190; CORTEX-A53:  .eabi_attribute 7, 65
1191; CORTEX-A53:  .eabi_attribute 8, 1
1192; CORTEX-A53:  .eabi_attribute 9, 2
1193; CORTEX-A53:  .fpu crypto-neon-fp-armv8
1194; CORTEX-A53:  .eabi_attribute 12, 3
1195; CORTEX-A53-NOT:   .eabi_attribute 19
1196;; We default to IEEE 754 compliance
1197; CORTEX-A53:  .eabi_attribute 20, 1
1198; CORTEX-A53:  .eabi_attribute 21, 1
1199; CORTEX-A53-NOT:  .eabi_attribute 22
1200; CORTEX-A53:  .eabi_attribute 23, 3
1201; CORTEX-A53:  .eabi_attribute 24, 1
1202; CORTEX-A53:  .eabi_attribute 25, 1
1203; CORTEX-A53-NOT:  .eabi_attribute 27
1204; CORTEX-A53-NOT:  .eabi_attribute 28
1205; CORTEX-A53:  .eabi_attribute 36, 1
1206; CORTEX-A53:  .eabi_attribute 38, 1
1207; CORTEX-A53:  .eabi_attribute 42, 1
1208; CORTEX-A53-NOT:  .eabi_attribute 44
1209; CORTEX-A53:  .eabi_attribute 68, 3
1210
1211; CORTEX-A53-FAST-NOT:   .eabi_attribute 19
1212;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1213; CORTEX-A53-FAST:  .eabi_attribute 20, 2
1214; CORTEX-A53-FAST-NOT:  .eabi_attribute 21
1215; CORTEX-A53-FAST-NOT:  .eabi_attribute 22
1216; CORTEX-A53-FAST:  .eabi_attribute 23, 1
1217
1218; CORTEX-A57:  .cpu cortex-a57
1219; CORTEX-A57:  .eabi_attribute 6, 14
1220; CORTEX-A57:  .eabi_attribute 7, 65
1221; CORTEX-A57:  .eabi_attribute 8, 1
1222; CORTEX-A57:  .eabi_attribute 9, 2
1223; CORTEX-A57:  .fpu crypto-neon-fp-armv8
1224; CORTEX-A57:  .eabi_attribute 12, 3
1225; CORTEX-A57-NOT:   .eabi_attribute 19
1226;; We default to IEEE 754 compliance
1227; CORTEX-A57:  .eabi_attribute 20, 1
1228; CORTEX-A57:  .eabi_attribute 21, 1
1229; CORTEX-A57-NOT:  .eabi_attribute 22
1230; CORTEX-A57:  .eabi_attribute 23, 3
1231; CORTEX-A57:  .eabi_attribute 24, 1
1232; CORTEX-A57:  .eabi_attribute 25, 1
1233; CORTEX-A57-NOT:  .eabi_attribute 27
1234; CORTEX-A57-NOT:  .eabi_attribute 28
1235; CORTEX-A57:  .eabi_attribute 36, 1
1236; CORTEX-A57:  .eabi_attribute 38, 1
1237; CORTEX-A57:  .eabi_attribute 42, 1
1238; CORTEX-A57-NOT:  .eabi_attribute 44
1239; CORTEX-A57:  .eabi_attribute 68, 3
1240
1241; CORTEX-A57-FAST-NOT:   .eabi_attribute 19
1242;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1243; CORTEX-A57-FAST:  .eabi_attribute 20, 2
1244; CORTEX-A57-FAST-NOT:  .eabi_attribute 21
1245; CORTEX-A57-FAST-NOT:  .eabi_attribute 22
1246; CORTEX-A57-FAST:  .eabi_attribute 23, 1
1247
1248; CORTEX-A72:  .cpu cortex-a72
1249; CORTEX-A72:  .eabi_attribute 6, 14
1250; CORTEX-A72:  .eabi_attribute 7, 65
1251; CORTEX-A72:  .eabi_attribute 8, 1
1252; CORTEX-A72:  .eabi_attribute 9, 2
1253; CORTEX-A72:  .fpu crypto-neon-fp-armv8
1254; CORTEX-A72:  .eabi_attribute 12, 3
1255; CORTEX-A72-NOT:   .eabi_attribute 19
1256;; We default to IEEE 754 compliance
1257; CORTEX-A72:  .eabi_attribute 20, 1
1258; CORTEX-A72:  .eabi_attribute 21, 1
1259; CORTEX-A72-NOT:  .eabi_attribute 22
1260; CORTEX-A72:  .eabi_attribute 23, 3
1261; CORTEX-A72:  .eabi_attribute 24, 1
1262; CORTEX-A72:  .eabi_attribute 25, 1
1263; CORTEX-A72-NOT:  .eabi_attribute 27
1264; CORTEX-A72-NOT:  .eabi_attribute 28
1265; CORTEX-A72:  .eabi_attribute 36, 1
1266; CORTEX-A72:  .eabi_attribute 38, 1
1267; CORTEX-A72:  .eabi_attribute 42, 1
1268; CORTEX-A72-NOT:  .eabi_attribute 44
1269; CORTEX-A72:  .eabi_attribute 68, 3
1270
1271; CORTEX-A72-FAST-NOT:   .eabi_attribute 19
1272;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1273; CORTEX-A72-FAST:  .eabi_attribute 20, 2
1274; CORTEX-A72-FAST-NOT:  .eabi_attribute 21
1275; CORTEX-A72-FAST-NOT:  .eabi_attribute 22
1276; CORTEX-A72-FAST:  .eabi_attribute 23, 1
1277
1278; EXYNOS-M1:  .cpu exynos-m1
1279; EXYNOS-M1:  .eabi_attribute 6, 14
1280; EXYNOS-M1:  .eabi_attribute 7, 65
1281; EXYNOS-M1:  .eabi_attribute 8, 1
1282; EXYNOS-M1:  .eabi_attribute 9, 2
1283; EXYNOS-M1:  .fpu crypto-neon-fp-armv8
1284; EXYNOS-M1:  .eabi_attribute 12, 3
1285; EXYNOS-M1-NOT:   .eabi_attribute 19
1286;; We default to IEEE 754 compliance
1287; EXYNOS-M1:  .eabi_attribute 20, 1
1288; EXYNOS-M1:  .eabi_attribute 21, 1
1289; EXYNOS-M1-NOT:  .eabi_attribute 22
1290; EXYNOS-M1:  .eabi_attribute 23, 3
1291; EXYNOS-M1:  .eabi_attribute 24, 1
1292; EXYNOS-M1:  .eabi_attribute 25, 1
1293; EXYNOS-M1-NOT:  .eabi_attribute 27
1294; EXYNOS-M1-NOT:  .eabi_attribute 28
1295; EXYNOS-M1:  .eabi_attribute 36, 1
1296; EXYNOS-M1:  .eabi_attribute 38, 1
1297; EXYNOS-M1:  .eabi_attribute 42, 1
1298; EXYNOS-M1-NOT:  .eabi_attribute 44
1299; EXYNOS-M15:  .eabi_attribute 68, 3
1300
1301; EXYNOS-M1-FAST-NOT:   .eabi_attribute 19
1302;; The exynos-m1 has the ARMv8 FP unit, which always flushes preserving sign.
1303; EXYNOS-M1-FAST:  .eabi_attribute 20, 2
1304; EXYNOS-M1-FAST-NOT:  .eabi_attribute 21
1305; EXYNOS-M1-FAST-NOT:  .eabi_attribute 22
1306; EXYNOS-M1-FAST:  .eabi_attribute 23, 1
1307
1308; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
1309; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
1310; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
1311; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16
1312; GENERIC-FPU-NEON-FP16: .fpu neon-fp16
1313
1314; GENERIC-ARMV8_1-A:  .eabi_attribute 6, 14
1315; GENERIC-ARMV8_1-A:  .eabi_attribute 7, 65
1316; GENERIC-ARMV8_1-A:  .eabi_attribute 8, 1
1317; GENERIC-ARMV8_1-A:  .eabi_attribute 9, 2
1318; GENERIC-ARMV8_1-A:  .fpu crypto-neon-fp-armv8
1319; GENERIC-ARMV8_1-A:  .eabi_attribute 12, 4
1320; GENERIC-ARMV8_1-A-NOT:   .eabi_attribute 19
1321;; We default to IEEE 754 compliance
1322; GENERIC-ARMV8_1-A:  .eabi_attribute 20, 1
1323; GENERIC-ARMV8_1-A:  .eabi_attribute 21, 1
1324; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 22
1325; GENERIC-ARMV8_1-A:  .eabi_attribute 23, 3
1326; GENERIC-ARMV8_1-A:  .eabi_attribute 24, 1
1327; GENERIC-ARMV8_1-A:  .eabi_attribute 25, 1
1328; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 27
1329; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 28
1330; GENERIC-ARMV8_1-A:  .eabi_attribute 36, 1
1331; GENERIC-ARMV8_1-A:  .eabi_attribute 38, 1
1332; GENERIC-ARMV8_1-A:  .eabi_attribute 42, 1
1333; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 44
1334; GENERIC-ARMV8_1-A:  .eabi_attribute 68, 3
1335
1336; GENERIC-ARMV8_1-A-FAST-NOT:   .eabi_attribute 19
1337;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign.
1338; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 20, 2
1339; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 21
1340; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 22
1341; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 23, 1
1342
1343; RELOC-PIC:  .eabi_attribute 15, 1
1344; RELOC-PIC:  .eabi_attribute 16, 1
1345; RELOC-PIC:  .eabi_attribute 17, 2
1346; RELOC-OTHER:  .eabi_attribute 17, 1
1347
1348; PCS-R9-USE:  .eabi_attribute 14, 0
1349; PCS-R9-RESERVE:  .eabi_attribute 14, 3
1350
1351define i32 @f(i64 %z) {
1352    ret i32 0
1353}
1354