xref: /llvm-project/llvm/test/CodeGen/ARM/build-attributes.ll (revision a7385ebf78eeaf0206bf0a6ac2252e219c308a01) 
1; This tests that MC/asm header conversion is smooth and that the
2; build attributes are correct
3
4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE
5; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6
6; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST
7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S
13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast  | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST
17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
20; RUN: llc < %s -mtriple=armv7-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST
21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
22; RUN: llc < %s -mtriple=armv8-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST
23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
30; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
31; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
32; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST
49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST
52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
54
55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16
56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16
57; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD
58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16
59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16
60
61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
62; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0
63; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
64; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
65; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0PLUS
66; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
67; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
68; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M1
69; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
70; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
71; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000
72; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
73; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
74; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
75; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
76; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
77; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
78; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
79; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
80; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
81; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
82; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
83; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
84; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
85; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
86; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
87; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
88; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
89; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
90; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
91; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
92; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
93; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
94; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
95; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
96; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
97; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
98; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
99; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35
100; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST
101; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
102; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
103; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
104; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
105; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
106; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST
107; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
108; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
109; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
110; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
111; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
112; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=EXYNOS-M1
113; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
114; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
115; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
116; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
117; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s  --check-prefix=CORTEX-A7-CHECK
118; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s  --check-prefix=CORTEX-A7-CHECK-FAST
119; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
120; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
121; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
122; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
123; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
124; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
125; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
126; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
127; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=default | FileCheck %s --check-prefix=RELOC-OTHER
128; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
129; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER
130; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE
131; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE
132
133; ARMv8.1a (AArch32)
134; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
135; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
136; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
137; ARMv8a (AArch32)
138; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
139; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
140; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
141; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
142; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
143; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
144; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
145; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
146
147; ARMv7a
148; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
149; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
150; ARMv7r
151; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
152; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
153; ARMv7m
154; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
155; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
156; ARMv6
157; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
158; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
159; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
160; ARMv6k
161; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
162; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
163; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
164; ARMv6m
165; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
166; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
167; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
168; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
169; ARMv5
170; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN
171; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
172
173; XSCALE:      .eabi_attribute 6, 5
174; XSCALE:      .eabi_attribute 8, 1
175; XSCALE:      .eabi_attribute 9, 1
176
177; DYN-ROUNDING: .eabi_attribute 19, 1
178
179; V6:   .eabi_attribute 6, 6
180; V6:   .eabi_attribute 8, 1
181;; We assume round-to-nearest by default (matches GCC)
182; V6-NOT:   .eabi_attribute 19
183;; The default choice made by llc is for a V6 CPU without an FPU.
184;; This is not an interesting detail, but for such CPUs, the default intention is to use
185;; software floating-point support. The choice is not important for targets without
186;; FPU support!
187; V6:   .eabi_attribute 20, 1
188; V6:   .eabi_attribute 21, 1
189; V6-NOT:   .eabi_attribute 22
190; V6:   .eabi_attribute 23, 3
191; V6:   .eabi_attribute 24, 1
192; V6:   .eabi_attribute 25, 1
193; V6-NOT:   .eabi_attribute 27
194; V6-NOT:   .eabi_attribute 28
195; V6-NOT:    .eabi_attribute 36
196; V6:    .eabi_attribute 38, 1
197; V6-NOT:    .eabi_attribute 42
198; V6-NOT:  .eabi_attribute 44
199; V6-NOT:    .eabi_attribute 68
200
201; V6-FAST-NOT:   .eabi_attribute 19
202;; Despite the V6 CPU having no FPU by default, we chose to flush to
203;; positive zero here. There's no hardware support doing this, but the
204;; fast maths software library might.
205; V6-FAST-NOT:   .eabi_attribute 20
206; V6-FAST-NOT:   .eabi_attribute 21
207; V6-FAST-NOT:   .eabi_attribute 22
208; V6-FAST:   .eabi_attribute 23, 1
209
210;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for
211;; V6-M, however we don't model the OS extension so this is fine.
212; V6M:  .eabi_attribute 6, 12
213; V6M-NOT:  .eabi_attribute 7
214; V6M:  .eabi_attribute 8, 0
215; V6M:  .eabi_attribute 9, 1
216; V6M-NOT:   .eabi_attribute 19
217;; The default choice made by llc is for a V6M CPU without an FPU.
218;; This is not an interesting detail, but for such CPUs, the default intention is to use
219;; software floating-point support. The choice is not important for targets without
220;; FPU support!
221; V6M:  .eabi_attribute 20, 1
222; V6M:   .eabi_attribute 21, 1
223; V6M-NOT:   .eabi_attribute 22
224; V6M:   .eabi_attribute 23, 3
225; V6M:  .eabi_attribute 24, 1
226; V6M:  .eabi_attribute 25, 1
227; V6M-NOT:  .eabi_attribute 27
228; V6M-NOT:  .eabi_attribute 28
229; V6M-NOT:  .eabi_attribute 36
230; V6M:  .eabi_attribute 38, 1
231; V6M-NOT:  .eabi_attribute 42
232; V6M-NOT:  .eabi_attribute 44
233; V6M-NOT:  .eabi_attribute 68
234
235; V6M-FAST-NOT:   .eabi_attribute 19
236;; Despite the V6M CPU having no FPU by default, we chose to flush to
237;; positive zero here. There's no hardware support doing this, but the
238;; fast maths software library might.
239; V6M-FAST-NOT:  .eabi_attribute 20
240; V6M-FAST-NOT:   .eabi_attribute 21
241; V6M-FAST-NOT:   .eabi_attribute 22
242; V6M-FAST:   .eabi_attribute 23, 1
243
244; ARM1156T2F-S: .cpu arm1156t2f-s
245; ARM1156T2F-S: .eabi_attribute 6, 8
246; ARM1156T2F-S: .eabi_attribute 8, 1
247; ARM1156T2F-S: .eabi_attribute 9, 2
248; ARM1156T2F-S: .fpu vfpv2
249; ARM1156T2F-S-NOT:   .eabi_attribute 19
250;; We default to IEEE 754 compliance
251; ARM1156T2F-S: .eabi_attribute 20, 1
252; ARM1156T2F-S: .eabi_attribute 21, 1
253; ARM1156T2F-S-NOT: .eabi_attribute 22
254; ARM1156T2F-S: .eabi_attribute 23, 3
255; ARM1156T2F-S: .eabi_attribute 24, 1
256; ARM1156T2F-S: .eabi_attribute 25, 1
257; ARM1156T2F-S-NOT: .eabi_attribute 27
258; ARM1156T2F-S-NOT: .eabi_attribute 28
259; ARM1156T2F-S-NOT: .eabi_attribute 36
260; ARM1156T2F-S: .eabi_attribute 38, 1
261; ARM1156T2F-S-NOT:    .eabi_attribute 42
262; ARM1156T2F-S-NOT:    .eabi_attribute 44
263; ARM1156T2F-S-NOT:    .eabi_attribute 68
264
265; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 19
266;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
267;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
268;; select. LLVM historically picks 0.
269; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
270; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 21
271; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 22
272; ARM1156T2F-S-FAST:   .eabi_attribute 23, 1
273
274; V7M:  .eabi_attribute 6, 10
275; V7M:  .eabi_attribute 7, 77
276; V7M:  .eabi_attribute 8, 0
277; V7M:  .eabi_attribute 9, 2
278; V7M-NOT:   .eabi_attribute 19
279;; The default choice made by llc is for a V7M CPU without an FPU.
280;; This is not an interesting detail, but for such CPUs, the default intention is to use
281;; software floating-point support. The choice is not important for targets without
282;; FPU support!
283; V7M:  .eabi_attribute 20, 1
284; V7M: .eabi_attribute 21, 1
285; V7M-NOT: .eabi_attribute 22
286; V7M: .eabi_attribute 23, 3
287; V7M:  .eabi_attribute 24, 1
288; V7M:  .eabi_attribute 25, 1
289; V7M-NOT:  .eabi_attribute 27
290; V7M-NOT:  .eabi_attribute 28
291; V7M-NOT:  .eabi_attribute 36
292; V7M:  .eabi_attribute 38, 1
293; V7M-NOT:  .eabi_attribute 42
294; V7M-NOT:  .eabi_attribute 44
295; V7M-NOT:  .eabi_attribute 68
296
297; V7M-FAST-NOT:   .eabi_attribute 19
298;; Despite the V7M CPU having no FPU by default, we chose to flush
299;; preserving sign. This matches what the hardware would do in the
300;; architecture revision were to exist on the current target.
301; V7M-FAST:  .eabi_attribute 20, 2
302; V7M-FAST-NOT:   .eabi_attribute 21
303; V7M-FAST-NOT:   .eabi_attribute 22
304; V7M-FAST:   .eabi_attribute 23, 1
305
306; V7:      .syntax unified
307; V7: .eabi_attribute 6, 10
308; V7-NOT:   .eabi_attribute 19
309;; In safe-maths mode we default to an IEEE 754 compliant choice.
310; V7: .eabi_attribute 20, 1
311; V7: .eabi_attribute 21, 1
312; V7-NOT: .eabi_attribute 22
313; V7: .eabi_attribute 23, 3
314; V7: .eabi_attribute 24, 1
315; V7: .eabi_attribute 25, 1
316; V7-NOT: .eabi_attribute 27
317; V7-NOT: .eabi_attribute 28
318; V7-NOT: .eabi_attribute 36
319; V7: .eabi_attribute 38, 1
320; V7-NOT:    .eabi_attribute 42
321; V7-NOT:    .eabi_attribute 44
322; V7-NOT:    .eabi_attribute 68
323
324; V7-FAST-NOT:   .eabi_attribute 19
325;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
326;; denormals to zero preserving the sign.
327; V7-FAST: .eabi_attribute 20, 2
328; V7-FAST-NOT:   .eabi_attribute 21
329; V7-FAST-NOT:   .eabi_attribute 22
330; V7-FAST:   .eabi_attribute 23, 1
331
332; V8:      .syntax unified
333; V8: .eabi_attribute 67, "2.09"
334; V8: .eabi_attribute 6, 14
335; V8-NOT:   .eabi_attribute 19
336; V8: .eabi_attribute 20, 1
337; V8: .eabi_attribute 21, 1
338; V8-NOT: .eabi_attribute 22
339; V8: .eabi_attribute 23, 3
340; V8-NOT: .eabi_attribute 44
341
342; V8-FAST-NOT:   .eabi_attribute 19
343;; The default does have an FPU, and for V8-A, it flushes preserving sign.
344; V8-FAST: .eabi_attribute 20, 2
345; V8-FAST-NOT: .eabi_attribute 21
346; V8-FAST-NOT: .eabi_attribute 22
347; V8-FAST: .eabi_attribute 23, 1
348
349; Vt8:     .syntax unified
350; Vt8: .eabi_attribute 6, 14
351; Vt8-NOT:   .eabi_attribute 19
352; Vt8: .eabi_attribute 20, 1
353; Vt8: .eabi_attribute 21, 1
354; Vt8-NOT: .eabi_attribute 22
355; Vt8: .eabi_attribute 23, 3
356
357; V8-FPARMv8:      .syntax unified
358; V8-FPARMv8: .eabi_attribute 6, 14
359; V8-FPARMv8: .fpu fp-armv8
360
361; V8-NEON:      .syntax unified
362; V8-NEON: .eabi_attribute 6, 14
363; V8-NEON: .fpu neon
364; V8-NEON: .eabi_attribute 12, 3
365
366; V8-FPARMv8-NEON:      .syntax unified
367; V8-FPARMv8-NEON: .eabi_attribute 6, 14
368; V8-FPARMv8-NEON: .fpu neon-fp-armv8
369; V8-FPARMv8-NEON: .eabi_attribute 12, 3
370
371; V8-FPARMv8-NEON-CRYPTO:      .syntax unified
372; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
373; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
374; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
375
376; Tag_CPU_unaligned_access
377; NO-STRICT-ALIGN: .eabi_attribute 34, 1
378; STRICT-ALIGN: .eabi_attribute 34, 0
379
380; Tag_CPU_arch  'ARMv7'
381; CORTEX-A7-CHECK: .eabi_attribute      6, 10
382; CORTEX-A7-NOFPU: .eabi_attribute      6, 10
383
384; CORTEX-A7-FPUV4: .eabi_attribute      6, 10
385
386; Tag_CPU_arch_profile 'A'
387; CORTEX-A7-CHECK: .eabi_attribute      7, 65
388; CORTEX-A7-NOFPU: .eabi_attribute      7, 65
389; CORTEX-A7-FPUV4: .eabi_attribute      7, 65
390
391; Tag_ARM_ISA_use
392; CORTEX-A7-CHECK: .eabi_attribute      8, 1
393; CORTEX-A7-NOFPU: .eabi_attribute      8, 1
394; CORTEX-A7-FPUV4: .eabi_attribute      8, 1
395
396; Tag_THUMB_ISA_use
397; CORTEX-A7-CHECK: .eabi_attribute      9, 2
398; CORTEX-A7-NOFPU: .eabi_attribute      9, 2
399; CORTEX-A7-FPUV4: .eabi_attribute      9, 2
400
401; CORTEX-A7-CHECK: .fpu neon-vfpv4
402; CORTEX-A7-NOFPU-NOT: .fpu
403; CORTEX-A7-FPUV4: .fpu vfpv4
404
405; CORTEX-A7-CHECK-NOT:   .eabi_attribute 19
406; Tag_ABI_FP_denormal
407;; We default to IEEE 754 compliance
408; CORTEX-A7-CHECK: .eabi_attribute      20, 1
409;; The A7 has VFPv3 support by default, so flush preserving sign.
410; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
411; CORTEX-A7-NOFPU: .eabi_attribute      20, 1
412;; Despite there being no FPU, we chose to flush to zero preserving
413;; sign. This matches what the hardware would do for this architecture
414;; revision.
415; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
416; CORTEX-A7-FPUV4: .eabi_attribute      20, 1
417;; The VFPv4 FPU flushes preserving sign.
418; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
419
420; Tag_ABI_FP_exceptions
421; CORTEX-A7-CHECK: .eabi_attribute      21, 1
422; CORTEX-A7-NOFPU: .eabi_attribute      21, 1
423; CORTEX-A7-FPUV4: .eabi_attribute      21, 1
424
425; Tag_ABI_FP_user_exceptions
426; CORTEX-A7-CHECK-NOT: .eabi_attribute      22
427; CORTEX-A7-NOFPU-NOT: .eabi_attribute      22
428; CORTEX-A7-FPUV4-NOT: .eabi_attribute      22
429
430; Tag_ABI_FP_number_model
431; CORTEX-A7-CHECK: .eabi_attribute      23, 3
432; CORTEX-A7-NOFPU: .eabi_attribute      23, 3
433; CORTEX-A7-FPUV4: .eabi_attribute      23, 3
434
435; Tag_ABI_align_needed
436; CORTEX-A7-CHECK: .eabi_attribute      24, 1
437; CORTEX-A7-NOFPU: .eabi_attribute      24, 1
438; CORTEX-A7-FPUV4: .eabi_attribute      24, 1
439
440; Tag_ABI_align_preserved
441; CORTEX-A7-CHECK: .eabi_attribute      25, 1
442; CORTEX-A7-NOFPU: .eabi_attribute      25, 1
443; CORTEX-A7-FPUV4: .eabi_attribute      25, 1
444
445; Tag_FP_HP_extension
446; CORTEX-A7-CHECK: .eabi_attribute      36, 1
447; CORTEX-A7-NOFPU-NOT: .eabi_attribute  36
448; CORTEX-A7-FPUV4: .eabi_attribute      36, 1
449
450; Tag_FP_16bit_format
451; CORTEX-A7-CHECK: .eabi_attribute      38, 1
452; CORTEX-A7-NOFPU: .eabi_attribute      38, 1
453; CORTEX-A7-FPUV4: .eabi_attribute      38, 1
454
455; Tag_MPextension_use
456; CORTEX-A7-CHECK: .eabi_attribute      42, 1
457; CORTEX-A7-NOFPU: .eabi_attribute      42, 1
458; CORTEX-A7-FPUV4: .eabi_attribute      42, 1
459
460; Tag_DIV_use
461; CORTEX-A7-CHECK: .eabi_attribute      44, 2
462; CORTEX-A7-NOFPU: .eabi_attribute      44, 2
463; CORTEX-A7-FPUV4: .eabi_attribute      44, 2
464
465; Tag_Virtualization_use
466; CORTEX-A7-CHECK: .eabi_attribute      68, 3
467; CORTEX-A7-NOFPU: .eabi_attribute      68, 3
468; CORTEX-A7-FPUV4: .eabi_attribute      68, 3
469
470; CORTEX-A5-DEFAULT:        .cpu    cortex-a5
471; CORTEX-A5-DEFAULT:        .eabi_attribute 6, 10
472; CORTEX-A5-DEFAULT:        .eabi_attribute 7, 65
473; CORTEX-A5-DEFAULT:        .eabi_attribute 8, 1
474; CORTEX-A5-DEFAULT:        .eabi_attribute 9, 2
475; CORTEX-A5-DEFAULT:        .fpu    neon-vfpv4
476; CORTEX-A5-NOT:   .eabi_attribute 19
477;; We default to IEEE 754 compliance
478; CORTEX-A5-DEFAULT:        .eabi_attribute 20, 1
479; CORTEX-A5-DEFAULT:        .eabi_attribute 21, 1
480; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 22
481; CORTEX-A5-DEFAULT:        .eabi_attribute 23, 3
482; CORTEX-A5-DEFAULT:        .eabi_attribute 24, 1
483; CORTEX-A5-DEFAULT:        .eabi_attribute 25, 1
484; CORTEX-A5-DEFAULT:        .eabi_attribute 42, 1
485; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 44
486; CORTEX-A5-DEFAULT:        .eabi_attribute 68, 1
487
488; CORTEX-A5-DEFAULT-FAST-NOT:   .eabi_attribute 19
489;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
490;; is given.
491; CORTEX-A5-DEFAULT-FAST:        .eabi_attribute 20, 2
492; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21
493; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22
494; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1
495
496; CORTEX-A5-NONEON:        .cpu    cortex-a5
497; CORTEX-A5-NONEON:        .eabi_attribute 6, 10
498; CORTEX-A5-NONEON:        .eabi_attribute 7, 65
499; CORTEX-A5-NONEON:        .eabi_attribute 8, 1
500; CORTEX-A5-NONEON:        .eabi_attribute 9, 2
501; CORTEX-A5-NONEON:        .fpu    vfpv4-d16
502;; We default to IEEE 754 compliance
503; CORTEX-A5-NONEON:        .eabi_attribute 20, 1
504; CORTEX-A5-NONEON:        .eabi_attribute 21, 1
505; CORTEX-A5-NONEON-NOT:    .eabi_attribute 22
506; CORTEX-A5-NONEON:        .eabi_attribute 23, 3
507; CORTEX-A5-NONEON:        .eabi_attribute 24, 1
508; CORTEX-A5-NONEON:        .eabi_attribute 25, 1
509; CORTEX-A5-NONEON:        .eabi_attribute 42, 1
510; CORTEX-A5-NONEON:        .eabi_attribute 68, 1
511
512; CORTEX-A5-NONEON-FAST-NOT:   .eabi_attribute 19
513;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
514;; is given.
515; CORTEX-A5-NONEON-FAST:        .eabi_attribute 20, 2
516; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21
517; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22
518; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1
519
520; CORTEX-A5-NOFPU:        .cpu    cortex-a5
521; CORTEX-A5-NOFPU:        .eabi_attribute 6, 10
522; CORTEX-A5-NOFPU:        .eabi_attribute 7, 65
523; CORTEX-A5-NOFPU:        .eabi_attribute 8, 1
524; CORTEX-A5-NOFPU:        .eabi_attribute 9, 2
525; CORTEX-A5-NOFPU-NOT:    .fpu
526; CORTEX-A5-NOFPU-NOT:   .eabi_attribute 19
527;; We default to IEEE 754 compliance
528; CORTEX-A5-NOFPU:        .eabi_attribute 20, 1
529; CORTEX-A5-NOFPU:        .eabi_attribute 21, 1
530; CORTEX-A5-NOFPU-NOT:    .eabi_attribute 22
531; CORTEX-A5-NOFPU:        .eabi_attribute 23, 3
532; CORTEX-A5-NOFPU:        .eabi_attribute 24, 1
533; CORTEX-A5-NOFPU:        .eabi_attribute 25, 1
534; CORTEX-A5-NOFPU:        .eabi_attribute 42, 1
535; CORTEX-A5-NOFPU:        .eabi_attribute 68, 1
536
537; CORTEX-A5-NOFPU-FAST-NOT:   .eabi_attribute 19
538;; Despite there being no FPU, we chose to flush to zero preserving
539;; sign. This matches what the hardware would do for this architecture
540;; revision.
541; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
542; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21
543; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22
544; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1
545
546; CORTEX-A9-SOFT:  .cpu cortex-a9
547; CORTEX-A9-SOFT:  .eabi_attribute 6, 10
548; CORTEX-A9-SOFT:  .eabi_attribute 7, 65
549; CORTEX-A9-SOFT:  .eabi_attribute 8, 1
550; CORTEX-A9-SOFT:  .eabi_attribute 9, 2
551; CORTEX-A9-SOFT:  .fpu neon
552; CORTEX-A9-SOFT-NOT:   .eabi_attribute 19
553;; We default to IEEE 754 compliance
554; CORTEX-A9-SOFT:  .eabi_attribute 20, 1
555; CORTEX-A9-SOFT:  .eabi_attribute 21, 1
556; CORTEX-A9-SOFT-NOT:  .eabi_attribute 22
557; CORTEX-A9-SOFT:  .eabi_attribute 23, 3
558; CORTEX-A9-SOFT:  .eabi_attribute 24, 1
559; CORTEX-A9-SOFT:  .eabi_attribute 25, 1
560; CORTEX-A9-SOFT-NOT:  .eabi_attribute 27
561; CORTEX-A9-SOFT-NOT:  .eabi_attribute 28
562; CORTEX-A9-SOFT:  .eabi_attribute 36, 1
563; CORTEX-A9-SOFT:  .eabi_attribute 38, 1
564; CORTEX-A9-SOFT:  .eabi_attribute 42, 1
565; CORTEX-A9-SOFT-NOT:  .eabi_attribute 44
566; CORTEX-A9-SOFT:  .eabi_attribute 68, 1
567
568; CORTEX-A9-SOFT-FAST-NOT:   .eabi_attribute 19
569;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when
570;; -ffast-math is specified.
571; CORTEX-A9-SOFT-FAST:  .eabi_attribute 20, 2
572; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21
573; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22
574; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1
575
576; CORTEX-A9-HARD:  .cpu cortex-a9
577; CORTEX-A9-HARD:  .eabi_attribute 6, 10
578; CORTEX-A9-HARD:  .eabi_attribute 7, 65
579; CORTEX-A9-HARD:  .eabi_attribute 8, 1
580; CORTEX-A9-HARD:  .eabi_attribute 9, 2
581; CORTEX-A9-HARD:  .fpu neon
582; CORTEX-A9-HARD-NOT:   .eabi_attribute 19
583;; We default to IEEE 754 compliance
584; CORTEX-A9-HARD:  .eabi_attribute 20, 1
585; CORTEX-A9-HARD:  .eabi_attribute 21, 1
586; CORTEX-A9-HARD-NOT:  .eabi_attribute 22
587; CORTEX-A9-HARD:  .eabi_attribute 23, 3
588; CORTEX-A9-HARD:  .eabi_attribute 24, 1
589; CORTEX-A9-HARD:  .eabi_attribute 25, 1
590; CORTEX-A9-HARD-NOT:  .eabi_attribute 27
591; CORTEX-A9-HARD:  .eabi_attribute 28, 1
592; CORTEX-A9-HARD:  .eabi_attribute 36, 1
593; CORTEX-A9-HARD:  .eabi_attribute 38, 1
594; CORTEX-A9-HARD:  .eabi_attribute 42, 1
595; CORTEX-A9-HARD:  .eabi_attribute 68, 1
596
597; CORTEX-A9-HARD-FAST-NOT:   .eabi_attribute 19
598;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when
599;; -ffast-math is specified.
600; CORTEX-A9-HARD-FAST:  .eabi_attribute 20, 2
601; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 21
602; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 22
603; CORTEX-A9-HARD-FAST:  .eabi_attribute 23, 1
604
605; CORTEX-A12-DEFAULT:  .cpu cortex-a12
606; CORTEX-A12-DEFAULT:  .eabi_attribute 6, 10
607; CORTEX-A12-DEFAULT:  .eabi_attribute 7, 65
608; CORTEX-A12-DEFAULT:  .eabi_attribute 8, 1
609; CORTEX-A12-DEFAULT:  .eabi_attribute 9, 2
610; CORTEX-A12-DEFAULT:  .fpu neon-vfpv4
611; CORTEX-A12-DEFAULT-NOT:   .eabi_attribute 19
612;; We default to IEEE 754 compliance
613; CORTEX-A12-DEFAULT:  .eabi_attribute 20, 1
614; CORTEX-A12-DEFAULT:  .eabi_attribute 21, 1
615; CORTEX-A12-DEFAULT-NOT:  .eabi_attribute 22
616; CORTEX-A12-DEFAULT:  .eabi_attribute 23, 3
617; CORTEX-A12-DEFAULT:  .eabi_attribute 24, 1
618; CORTEX-A12-DEFAULT:  .eabi_attribute 25, 1
619; CORTEX-A12-DEFAULT:  .eabi_attribute 42, 1
620; CORTEX-A12-DEFAULT:  .eabi_attribute 44, 2
621; CORTEX-A12-DEFAULT:  .eabi_attribute 68, 3
622
623; CORTEX-A12-DEFAULT-FAST-NOT:   .eabi_attribute 19
624;; The A12 defaults to a VFPv3 FPU, so it flushes preseving sign when
625;; -ffast-math is specified.
626; CORTEX-A12-DEFAULT-FAST:  .eabi_attribute 20, 2
627; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 21
628; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 22
629; CORTEX-A12-HARD-FAST:  .eabi_attribute 23, 1
630
631; CORTEX-A12-NOFPU:  .cpu cortex-a12
632; CORTEX-A12-NOFPU:  .eabi_attribute 6, 10
633; CORTEX-A12-NOFPU:  .eabi_attribute 7, 65
634; CORTEX-A12-NOFPU:  .eabi_attribute 8, 1
635; CORTEX-A12-NOFPU:  .eabi_attribute 9, 2
636; CORTEX-A12-NOFPU-NOT:  .fpu
637; CORTEX-A12-NOFPU-NOT:   .eabi_attribute 19
638;; We default to IEEE 754 compliance
639; CORTEX-A12-NOFPU:  .eabi_attribute 20, 1
640; CORTEX-A12-NOFPU:  .eabi_attribute 21, 1
641; CORTEX-A12-NOFPU-NOT:  .eabi_attribute 22
642; CORTEX-A12-NOFPU:  .eabi_attribute 23, 3
643; CORTEX-A12-NOFPU:  .eabi_attribute 24, 1
644; CORTEX-A12-NOFPU:  .eabi_attribute 25, 1
645; CORTEX-A12-NOFPU:  .eabi_attribute 42, 1
646; CORTEX-A12-NOFPU:  .eabi_attribute 44, 2
647; CORTEX-A12-NOFPU:  .eabi_attribute 68, 3
648
649; CORTEX-A12-NOFPU-FAST-NOT:   .eabi_attribute 19
650;; Despite there being no FPU, we chose to flush to zero preserving
651;; sign. This matches what the hardware would do for this architecture
652;; revision.
653; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 20, 2
654; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 21
655; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 22
656; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 23, 1
657
658; CORTEX-A15: .cpu cortex-a15
659; CORTEX-A15: .eabi_attribute 6, 10
660; CORTEX-A15: .eabi_attribute 7, 65
661; CORTEX-A15: .eabi_attribute 8, 1
662; CORTEX-A15: .eabi_attribute 9, 2
663; CORTEX-A15: .fpu neon-vfpv4
664; CORTEX-A15-NOT:   .eabi_attribute 19
665;; We default to IEEE 754 compliance
666; CORTEX-A15: .eabi_attribute 20, 1
667; CORTEX-A15: .eabi_attribute 21, 1
668; CORTEX-A15-NOT: .eabi_attribute 22
669; CORTEX-A15: .eabi_attribute 23, 3
670; CORTEX-A15: .eabi_attribute 24, 1
671; CORTEX-A15: .eabi_attribute 25, 1
672; CORTEX-A15-NOT: .eabi_attribute 27
673; CORTEX-A15-NOT: .eabi_attribute 28
674; CORTEX-A15: .eabi_attribute 36, 1
675; CORTEX-A15: .eabi_attribute 38, 1
676; CORTEX-A15: .eabi_attribute 42, 1
677; CORTEX-A15: .eabi_attribute 44, 2
678; CORTEX-A15: .eabi_attribute 68, 3
679
680; CORTEX-A15-FAST-NOT:   .eabi_attribute 19
681;; The A15 defaults to a VFPv3 FPU, so it flushes preseving sign when
682;; -ffast-math is specified.
683; CORTEX-A15-FAST: .eabi_attribute 20, 2
684; CORTEX-A15-FAST-NOT:  .eabi_attribute 21
685; CORTEX-A15-FAST-NOT:  .eabi_attribute 22
686; CORTEX-A15-FAST:  .eabi_attribute 23, 1
687
688; CORTEX-A17-DEFAULT:  .cpu cortex-a17
689; CORTEX-A17-DEFAULT:  .eabi_attribute 6, 10
690; CORTEX-A17-DEFAULT:  .eabi_attribute 7, 65
691; CORTEX-A17-DEFAULT:  .eabi_attribute 8, 1
692; CORTEX-A17-DEFAULT:  .eabi_attribute 9, 2
693; CORTEX-A17-DEFAULT:  .fpu neon-vfpv4
694; CORTEX-A17-DEFAULT-NOT:   .eabi_attribute 19
695;; We default to IEEE 754 compliance
696; CORTEX-A17-DEFAULT:  .eabi_attribute 20, 1
697; CORTEX-A17-DEFAULT:  .eabi_attribute 21, 1
698; CORTEX-A17-DEFAULT-NOT:  .eabi_attribute 22
699; CORTEX-A17-DEFAULT:  .eabi_attribute 23, 3
700; CORTEX-A17-DEFAULT:  .eabi_attribute 24, 1
701; CORTEX-A17-DEFAULT:  .eabi_attribute 25, 1
702; CORTEX-A17-DEFAULT:  .eabi_attribute 42, 1
703; CORTEX-A17-DEFAULT:  .eabi_attribute 44, 2
704; CORTEX-A17-DEFAULT:  .eabi_attribute 68, 3
705
706; CORTEX-A17-FAST-NOT:   .eabi_attribute 19
707;; The A17 defaults to a VFPv3 FPU, so it flushes preseving sign when
708;; -ffast-math is specified.
709; CORTEX-A17-FAST:  .eabi_attribute 20, 2
710; CORTEX-A17-FAST-NOT:  .eabi_attribute 21
711; CORTEX-A17-FAST-NOT:  .eabi_attribute 22
712; CORTEX-A17-FAST:  .eabi_attribute 23, 1
713
714; CORTEX-A17-NOFPU:  .cpu cortex-a17
715; CORTEX-A17-NOFPU:  .eabi_attribute 6, 10
716; CORTEX-A17-NOFPU:  .eabi_attribute 7, 65
717; CORTEX-A17-NOFPU:  .eabi_attribute 8, 1
718; CORTEX-A17-NOFPU:  .eabi_attribute 9, 2
719; CORTEX-A17-NOFPU-NOT:  .fpu
720; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
721;; We default to IEEE 754 compliance
722; CORTEX-A17-NOFPU:  .eabi_attribute 20, 1
723; CORTEX-A17-NOFPU:  .eabi_attribute 21, 1
724; CORTEX-A17-NOFPU-NOT:  .eabi_attribute 22
725; CORTEX-A17-NOFPU:  .eabi_attribute 23, 3
726; CORTEX-A17-NOFPU:  .eabi_attribute 24, 1
727; CORTEX-A17-NOFPU:  .eabi_attribute 25, 1
728; CORTEX-A17-NOFPU:  .eabi_attribute 42, 1
729; CORTEX-A17-NOFPU:  .eabi_attribute 44, 2
730; CORTEX-A17-NOFPU:  .eabi_attribute 68, 3
731
732; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
733;; Despite there being no FPU, we chose to flush to zero preserving
734;; sign. This matches what the hardware would do for this architecture
735;; revision.
736; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 20, 2
737; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 21
738; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 22
739; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 23, 1
740
741; CORTEX-M0:  .cpu cortex-m0
742; CORTEX-M0:  .eabi_attribute 6, 12
743; CORTEX-M0-NOT:  .eabi_attribute 7
744; CORTEX-M0:  .eabi_attribute 8, 0
745; CORTEX-M0:  .eabi_attribute 9, 1
746; CORTEX-M0-NOT:   .eabi_attribute 19
747;; We default to IEEE 754 compliance
748; CORTEX-M0:  .eabi_attribute 20, 1
749; CORTEX-M0:  .eabi_attribute 21, 1
750; CORTEX-M0-NOT:  .eabi_attribute 22
751; CORTEX-M0:  .eabi_attribute 23, 3
752; CORTEX-M0: .eabi_attribute 34, 0
753; CORTEX-M0:  .eabi_attribute 24, 1
754; CORTEX-M0:  .eabi_attribute 25, 1
755; CORTEX-M0-NOT:  .eabi_attribute 27
756; CORTEX-M0-NOT:  .eabi_attribute 28
757; CORTEX-M0-NOT:  .eabi_attribute 36
758; CORTEX-M0:  .eabi_attribute 38, 1
759; CORTEX-M0-NOT:  .eabi_attribute 42
760; CORTEX-M0-NOT:  .eabi_attribute 44
761; CORTEX-M0-NOT:  .eabi_attribute 68
762
763; CORTEX-M0-FAST-NOT:   .eabi_attribute 19
764;; Despite the M0 CPU having no FPU in this scenario, we chose to
765;; flush to positive zero here. There's no hardware support doing
766;; this, but the fast maths software library might and such behaviour
767;; would match hardware support on this architecture revision if it
768;; existed.
769; CORTEX-M0-FAST-NOT:  .eabi_attribute 20
770; CORTEX-M0-FAST-NOT:  .eabi_attribute 21
771; CORTEX-M0-FAST-NOT:  .eabi_attribute 22
772; CORTEX-M0-FAST:  .eabi_attribute 23, 1
773
774; CORTEX-M0PLUS:  .cpu cortex-m0plus
775; CORTEX-M0PLUS:  .eabi_attribute 6, 12
776; CORTEX-M0PLUS-NOT:  .eabi_attribute 7
777; CORTEX-M0PLUS:  .eabi_attribute 8, 0
778; CORTEX-M0PLUS:  .eabi_attribute 9, 1
779; CORTEX-M0PLUS-NOT:   .eabi_attribute 19
780;; We default to IEEE 754 compliance
781; CORTEX-M0PLUS:  .eabi_attribute 20, 1
782; CORTEX-M0PLUS:  .eabi_attribute 21, 1
783; CORTEX-M0PLUS-NOT:  .eabi_attribute 22
784; CORTEX-M0PLUS:  .eabi_attribute 23, 3
785; CORTEX-M0PLUS:  .eabi_attribute 24, 1
786; CORTEX-M0PLUS:  .eabi_attribute 25, 1
787; CORTEX-M0PLUS-NOT:  .eabi_attribute 27
788; CORTEX-M0PLUS-NOT:  .eabi_attribute 28
789; CORTEX-M0PLUS-NOT:  .eabi_attribute 36
790; CORTEX-M0PLUS:  .eabi_attribute 38, 1
791; CORTEX-M0PLUS-NOT:  .eabi_attribute 42
792; CORTEX-M0PLUS-NOT:  .eabi_attribute 44
793; CORTEX-M0PLUS-NOT:  .eabi_attribute 68
794
795; CORTEX-M0PLUS-FAST-NOT:   .eabi_attribute 19
796;; Despite the M0+ CPU having no FPU in this scenario, we chose to
797;; flush to positive zero here. There's no hardware support doing
798;; this, but the fast maths software library might and such behaviour
799;; would match hardware support on this architecture revision if it
800;; existed.
801; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 20
802; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 21
803; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 22
804; CORTEX-M0PLUS-FAST:  .eabi_attribute 23, 1
805
806; CORTEX-M1:  .cpu cortex-m1
807; CORTEX-M1:  .eabi_attribute 6, 12
808; CORTEX-M1-NOT:  .eabi_attribute 7
809; CORTEX-M1:  .eabi_attribute 8, 0
810; CORTEX-M1:  .eabi_attribute 9, 1
811; CORTEX-M1-NOT:   .eabi_attribute 19
812;; We default to IEEE 754 compliance
813; CORTEX-M1:  .eabi_attribute 20, 1
814; CORTEX-M1:  .eabi_attribute 21, 1
815; CORTEX-M1-NOT:  .eabi_attribute 22
816; CORTEX-M1:  .eabi_attribute 23, 3
817; CORTEX-M1:  .eabi_attribute 24, 1
818; CORTEX-M1:  .eabi_attribute 25, 1
819; CORTEX-M1-NOT:  .eabi_attribute 27
820; CORTEX-M1-NOT:  .eabi_attribute 28
821; CORTEX-M1-NOT:  .eabi_attribute 36
822; CORTEX-M1:  .eabi_attribute 38, 1
823; CORTEX-M1-NOT:  .eabi_attribute 42
824; CORTEX-M1-NOT:  .eabi_attribute 44
825; CORTEX-M1-NOT:  .eabi_attribute 68
826
827; CORTEX-M1-FAST-NOT:   .eabi_attribute 19
828;; Despite the M1 CPU having no FPU in this scenario, we chose to
829;; flush to positive zero here. There's no hardware support doing
830;; this, but the fast maths software library might and such behaviour
831;; would match hardware support on this architecture revision if it
832;; existed.
833; CORTEX-M1-FAST-NOT:  .eabi_attribute 20
834; CORTEX-M1-FAST-NOT:  .eabi_attribute 21
835; CORTEX-M1-FAST-NOT:  .eabi_attribute 22
836; CORTEX-M1-FAST:  .eabi_attribute 23, 1
837
838; SC000:  .cpu sc000
839; SC000:  .eabi_attribute 6, 12
840; SC000-NOT:  .eabi_attribute 7
841; SC000:  .eabi_attribute 8, 0
842; SC000:  .eabi_attribute 9, 1
843; SC000-NOT:   .eabi_attribute 19
844;; We default to IEEE 754 compliance
845; SC000:  .eabi_attribute 20, 1
846; SC000:  .eabi_attribute 21, 1
847; SC000-NOT:  .eabi_attribute 22
848; SC000:  .eabi_attribute 23, 3
849; SC000:  .eabi_attribute 24, 1
850; SC000:  .eabi_attribute 25, 1
851; SC000-NOT:  .eabi_attribute 27
852; SC000-NOT:  .eabi_attribute 28
853; SC000-NOT:  .eabi_attribute 36
854; SC000:  .eabi_attribute 38, 1
855; SC000-NOT:  .eabi_attribute 42
856; SC000-NOT:  .eabi_attribute 44
857; SC000-NOT:  .eabi_attribute 68
858
859; SC000-FAST-NOT:   .eabi_attribute 19
860;; Despite the SC000 CPU having no FPU in this scenario, we chose to
861;; flush to positive zero here. There's no hardware support doing
862;; this, but the fast maths software library might and such behaviour
863;; would match hardware support on this architecture revision if it
864;; existed.
865; SC000-FAST-NOT:  .eabi_attribute 20
866; SC000-FAST-NOT:  .eabi_attribute 21
867; SC000-FAST-NOT:  .eabi_attribute 22
868; SC000-FAST:  .eabi_attribute 23, 1
869
870; CORTEX-M3:  .cpu cortex-m3
871; CORTEX-M3:  .eabi_attribute 6, 10
872; CORTEX-M3:  .eabi_attribute 7, 77
873; CORTEX-M3:  .eabi_attribute 8, 0
874; CORTEX-M3:  .eabi_attribute 9, 2
875; CORTEX-M3-NOT:   .eabi_attribute 19
876;; We default to IEEE 754 compliance
877; CORTEX-M3:  .eabi_attribute 20, 1
878; CORTEX-M3:  .eabi_attribute 21, 1
879; CORTEX-M3-NOT:  .eabi_attribute 22
880; CORTEX-M3:  .eabi_attribute 23, 3
881; CORTEX-M3:  .eabi_attribute 24, 1
882; CORTEX-M3:  .eabi_attribute 25, 1
883; CORTEX-M3-NOT:  .eabi_attribute 27
884; CORTEX-M3-NOT:  .eabi_attribute 28
885; CORTEX-M3-NOT:  .eabi_attribute 36
886; CORTEX-M3:  .eabi_attribute 38, 1
887; CORTEX-M3-NOT:  .eabi_attribute 42
888; CORTEX-M3-NOT:  .eabi_attribute 44
889; CORTEX-M3-NOT:  .eabi_attribute 68
890
891; CORTEX-M3-FAST-NOT:   .eabi_attribute 19
892;; Despite there being no FPU, we chose to flush to zero preserving
893;; sign. This matches what the hardware would do for this architecture
894;; revision.
895; CORTEX-M3-FAST:  .eabi_attribute 20, 2
896; CORTEX-M3-FAST-NOT:  .eabi_attribute 21
897; CORTEX-M3-FAST-NOT:  .eabi_attribute 22
898; CORTEX-M3-FAST:  .eabi_attribute 23, 1
899
900; SC300:  .cpu sc300
901; SC300:  .eabi_attribute 6, 10
902; SC300:  .eabi_attribute 7, 77
903; SC300:  .eabi_attribute 8, 0
904; SC300:  .eabi_attribute 9, 2
905; SC300-NOT:   .eabi_attribute 19
906;; We default to IEEE 754 compliance
907; SC300:  .eabi_attribute 20, 1
908; SC300:  .eabi_attribute 21, 1
909; SC300-NOT:  .eabi_attribute 22
910; SC300:  .eabi_attribute 23, 3
911; SC300:  .eabi_attribute 24, 1
912; SC300:  .eabi_attribute 25, 1
913; SC300-NOT:  .eabi_attribute 27
914; SC300-NOT:  .eabi_attribute 28
915; SC300-NOT:  .eabi_attribute 36
916; SC300:  .eabi_attribute 38, 1
917; SC300-NOT:  .eabi_attribute 42
918; SC300-NOT:  .eabi_attribute 44
919; SC300-NOT:  .eabi_attribute 68
920
921; SC300-FAST-NOT:   .eabi_attribute 19
922;; Despite there being no FPU, we chose to flush to zero preserving
923;; sign. This matches what the hardware would do for this architecture
924;; revision.
925; SC300-FAST:  .eabi_attribute 20, 2
926; SC300-FAST-NOT:  .eabi_attribute 21
927; SC300-FAST-NOT:  .eabi_attribute 22
928; SC300-FAST:  .eabi_attribute 23, 1
929
930; CORTEX-M4-SOFT:  .cpu cortex-m4
931; CORTEX-M4-SOFT:  .eabi_attribute 6, 13
932; CORTEX-M4-SOFT:  .eabi_attribute 7, 77
933; CORTEX-M4-SOFT:  .eabi_attribute 8, 0
934; CORTEX-M4-SOFT:  .eabi_attribute 9, 2
935; CORTEX-M4-SOFT:  .fpu fpv4-sp-d16
936; CORTEX-M4-SOFT-NOT:   .eabi_attribute 19
937;; We default to IEEE 754 compliance
938; CORTEX-M4-SOFT:  .eabi_attribute 20, 1
939; CORTEX-M4-SOFT:  .eabi_attribute 21, 1
940; CORTEX-M4-SOFT-NOT:  .eabi_attribute 22
941; CORTEX-M4-SOFT:  .eabi_attribute 23, 3
942; CORTEX-M4-SOFT:  .eabi_attribute 24, 1
943; CORTEX-M4-SOFT:  .eabi_attribute 25, 1
944; CORTEX-M4-SOFT:  .eabi_attribute 27, 1
945; CORTEX-M4-SOFT-NOT:  .eabi_attribute 28
946; CORTEX-M4-SOFT:  .eabi_attribute 36, 1
947; CORTEX-M4-SOFT:  .eabi_attribute 38, 1
948; CORTEX-M4-SOFT-NOT:  .eabi_attribute 42
949; CORTEX-M4-SOFT-NOT:  .eabi_attribute 44
950; CORTEX-M4-SOFT-NOT:  .eabi_attribute 68
951
952; CORTEX-M4-SOFT-FAST-NOT:   .eabi_attribute 19
953;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when
954;; -ffast-math is specified.
955; CORTEX-M4-SOFT-FAST:  .eabi_attribute 20, 2
956; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 21
957; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 22
958; CORTEX-M4-SOFT-FAST:  .eabi_attribute 23, 1
959
960; CORTEX-M4-HARD:  .cpu cortex-m4
961; CORTEX-M4-HARD:  .eabi_attribute 6, 13
962; CORTEX-M4-HARD:  .eabi_attribute 7, 77
963; CORTEX-M4-HARD:  .eabi_attribute 8, 0
964; CORTEX-M4-HARD:  .eabi_attribute 9, 2
965; CORTEX-M4-HARD:  .fpu fpv4-sp-d16
966; CORTEX-M4-HARD-NOT:   .eabi_attribute 19
967;; We default to IEEE 754 compliance
968; CORTEX-M4-HARD:  .eabi_attribute 20, 1
969; CORTEX-M4-HARD:  .eabi_attribute 21, 1
970; CORTEX-M4-HARD-NOT:  .eabi_attribute 22
971; CORTEX-M4-HARD:  .eabi_attribute 23, 3
972; CORTEX-M4-HARD:  .eabi_attribute 24, 1
973; CORTEX-M4-HARD:  .eabi_attribute 25, 1
974; CORTEX-M4-HARD:  .eabi_attribute 27, 1
975; CORTEX-M4-HARD:  .eabi_attribute 28, 1
976; CORTEX-M4-HARD:  .eabi_attribute 36, 1
977; CORTEX-M4-HARD:  .eabi_attribute 38, 1
978; CORTEX-M4-HARD-NOT:  .eabi_attribute 42
979; CORTEX-M4-HARD-NOT:  .eabi_attribute 44
980; CORTEX-M4-HARD-NOT:  .eabi_attribute 68
981
982; CORTEX-M4-HARD-FAST-NOT:   .eabi_attribute 19
983;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when
984;; -ffast-math is specified.
985; CORTEX-M4-HARD-FAST:  .eabi_attribute 20, 2
986; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 21
987; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 22
988; CORTEX-M4-HARD-FAST:  .eabi_attribute 23, 1
989
990; CORTEX-M7:  .cpu    cortex-m7
991; CORTEX-M7:  .eabi_attribute 6, 13
992; CORTEX-M7:  .eabi_attribute 7, 77
993; CORTEX-M7:  .eabi_attribute 8, 0
994; CORTEX-M7:  .eabi_attribute 9, 2
995; CORTEX-M7-SOFT-NOT: .fpu
996; CORTEX-M7-SINGLE:  .fpu fpv5-sp-d16
997; CORTEX-M7-DOUBLE:  .fpu fpv5-d16
998; CORTEX-M7:  .eabi_attribute 17, 1
999; CORTEX-M7-NOT:   .eabi_attribute 19
1000;; We default to IEEE 754 compliance
1001; CORTEX-M7:  .eabi_attribute 20, 1
1002; CORTEX-M7:  .eabi_attribute 21, 1
1003; CORTEX-M7-NOT:  .eabi_attribute 22
1004; CORTEX-M7:  .eabi_attribute 23, 3
1005; CORTEX-M7:  .eabi_attribute 24, 1
1006; CORTEX-M7:  .eabi_attribute 25, 1
1007; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
1008; CORTEX-M7-SINGLE:  .eabi_attribute 27, 1
1009; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
1010; CORTEX-M7:  .eabi_attribute 36, 1
1011; CORTEX-M7:  .eabi_attribute 38, 1
1012; CORTEX-M7-NOT:  .eabi_attribute 44
1013; CORTEX-M7:  .eabi_attribute 14, 0
1014
1015; CORTEX-M7-NOFPU-FAST-NOT:   .eabi_attribute 19
1016;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1017; CORTEX-M7-FAST:  .eabi_attribute 20, 2
1018;; Despite there being no FPU, we chose to flush to zero preserving
1019;; sign. This matches what the hardware would do for this architecture
1020;; revision.
1021; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
1022; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 21
1023; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 22
1024; CORTEX-M7-NOFPU-FAST:  .eabi_attribute 23, 1
1025
1026; CORTEX-R4:  .cpu cortex-r4
1027; CORTEX-R4:  .eabi_attribute 6, 10
1028; CORTEX-R4:  .eabi_attribute 7, 82
1029; CORTEX-R4:  .eabi_attribute 8, 1
1030; CORTEX-R4:  .eabi_attribute 9, 2
1031; CORTEX-R4-NOT:  .fpu vfpv3-d16
1032; CORTEX-R4-NOT:   .eabi_attribute 19
1033;; We default to IEEE 754 compliance
1034; CORTEX-R4:  .eabi_attribute 20, 1
1035; CORTEX-R4:  .eabi_attribute 21, 1
1036; CORTEX-R4-NOT:  .eabi_attribute 22
1037; CORTEX-R4:  .eabi_attribute 23, 3
1038; CORTEX-R4:  .eabi_attribute 24, 1
1039; CORTEX-R4:  .eabi_attribute 25, 1
1040; CORTEX-R4-NOT:  .eabi_attribute 28
1041; CORTEX-R4-NOT:  .eabi_attribute 36
1042; CORTEX-R4:  .eabi_attribute 38, 1
1043; CORTEX-R4-NOT:  .eabi_attribute 42
1044; CORTEX-R4-NOT:  .eabi_attribute 44
1045; CORTEX-R4-NOT:  .eabi_attribute 68
1046
1047; CORTEX-R4F:  .cpu cortex-r4f
1048; CORTEX-R4F:  .eabi_attribute 6, 10
1049; CORTEX-R4F:  .eabi_attribute 7, 82
1050; CORTEX-R4F:  .eabi_attribute 8, 1
1051; CORTEX-R4F:  .eabi_attribute 9, 2
1052; CORTEX-R4F:  .fpu vfpv3-d16
1053; CORTEX-R4F-NOT:   .eabi_attribute 19
1054;; We default to IEEE 754 compliance
1055; CORTEX-R4F:  .eabi_attribute 20, 1
1056; CORTEX-R4F:  .eabi_attribute 21, 1
1057; CORTEX-R4F-NOT:  .eabi_attribute 22
1058; CORTEX-R4F:  .eabi_attribute 23, 3
1059; CORTEX-R4F:  .eabi_attribute 24, 1
1060; CORTEX-R4F:  .eabi_attribute 25, 1
1061; CORTEX-R4F-NOT:  .eabi_attribute 27, 1
1062; CORTEX-R4F-NOT:  .eabi_attribute 28
1063; CORTEX-R4F-NOT:  .eabi_attribute 36
1064; CORTEX-R4F:  .eabi_attribute 38, 1
1065; CORTEX-R4F-NOT:  .eabi_attribute 42
1066; CORTEX-R4F-NOT:  .eabi_attribute 44
1067; CORTEX-R4F-NOT:  .eabi_attribute 68
1068
1069; CORTEX-R5:  .cpu cortex-r5
1070; CORTEX-R5:  .eabi_attribute 6, 10
1071; CORTEX-R5:  .eabi_attribute 7, 82
1072; CORTEX-R5:  .eabi_attribute 8, 1
1073; CORTEX-R5:  .eabi_attribute 9, 2
1074; CORTEX-R5:  .fpu vfpv3-d16
1075; CORTEX-R5-NOT:   .eabi_attribute 19
1076;; We default to IEEE 754 compliance
1077; CORTEX-R5:  .eabi_attribute 20, 1
1078; CORTEX-R5:  .eabi_attribute 21, 1
1079; CORTEX-R5-NOT:  .eabi_attribute 22
1080; CORTEX-R5:  .eabi_attribute 23, 3
1081; CORTEX-R5:  .eabi_attribute 24, 1
1082; CORTEX-R5:  .eabi_attribute 25, 1
1083; CORTEX-R5-NOT:  .eabi_attribute 27, 1
1084; CORTEX-R5-NOT:  .eabi_attribute 28
1085; CORTEX-R5-NOT:  .eabi_attribute 36
1086; CORTEX-R5:  .eabi_attribute 38, 1
1087; CORTEX-R5-NOT:  .eabi_attribute 42
1088; CORTEX-R5:  .eabi_attribute 44, 2
1089; CORTEX-R5-NOT:  .eabi_attribute 68
1090
1091; CORTEX-R5-FAST-NOT:   .eabi_attribute 19
1092;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
1093; CORTEX-R5-FAST:  .eabi_attribute 20, 2
1094; CORTEX-R5-FAST-NOT:  .eabi_attribute 21
1095; CORTEX-R5-FAST-NOT:  .eabi_attribute 22
1096; CORTEX-R5-FAST:  .eabi_attribute 23, 1
1097
1098; CORTEX-R7:  .cpu cortex-r7
1099; CORTEX-R7:  .eabi_attribute 6, 10
1100; CORTEX-R7:  .eabi_attribute 7, 82
1101; CORTEX-R7:  .eabi_attribute 8, 1
1102; CORTEX-R7:  .eabi_attribute 9, 2
1103; CORTEX-R7:  .fpu vfpv3xd
1104; CORTEX-R7-NOT:   .eabi_attribute 19
1105;; We default to IEEE 754 compliance
1106; CORTEX-R7:  .eabi_attribute 20, 1
1107; CORTEX-R7:  .eabi_attribute 21, 1
1108; CORTEX-R7-NOT:  .eabi_attribute 22
1109; CORTEX-R7:  .eabi_attribute 23, 3
1110; CORTEX-R7:  .eabi_attribute 24, 1
1111; CORTEX-R7:  .eabi_attribute 25, 1
1112; CORTEX-R7:  .eabi_attribute 27, 1
1113; CORTEX-R7-NOT:  .eabi_attribute 28
1114; CORTEX-R7:  .eabi_attribute 36, 1
1115; CORTEX-R7:  .eabi_attribute 38, 1
1116; CORTEX-R7:  .eabi_attribute 42, 1
1117; CORTEX-R7:  .eabi_attribute 44, 2
1118; CORTEX-R7-NOT:  .eabi_attribute 68
1119
1120; CORTEX-R7-FAST-NOT:   .eabi_attribute 19
1121;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
1122; CORTEX-R7-FAST:  .eabi_attribute 20, 2
1123; CORTEX-R7-FAST-NOT:  .eabi_attribute 21
1124; CORTEX-R7-FAST-NOT:  .eabi_attribute 22
1125; CORTEX-R7-FAST:  .eabi_attribute 23, 1
1126
1127; CORTEX-A35:  .cpu cortex-a35
1128; CORTEX-A35:  .eabi_attribute 6, 14
1129; CORTEX-A35:  .eabi_attribute 7, 65
1130; CORTEX-A35:  .eabi_attribute 8, 1
1131; CORTEX-A35:  .eabi_attribute 9, 2
1132; CORTEX-A35:  .fpu crypto-neon-fp-armv8
1133; CORTEX-A35:  .eabi_attribute 12, 3
1134; CORTEX-A35-NOT:   .eabi_attribute 19
1135;; We default to IEEE 754 compliance
1136; CORTEX-A35:  .eabi_attribute 20, 1
1137; CORTEX-A35:  .eabi_attribute 21, 1
1138; CORTEX-A35-NOT:  .eabi_attribute 22
1139; CORTEX-A35:  .eabi_attribute 23, 3
1140; CORTEX-A35:  .eabi_attribute 24, 1
1141; CORTEX-A35:  .eabi_attribute 25, 1
1142; CORTEX-A35-NOT:  .eabi_attribute 27
1143; CORTEX-A35-NOT:  .eabi_attribute 28
1144; CORTEX-A35:  .eabi_attribute 36, 1
1145; CORTEX-A35:  .eabi_attribute 38, 1
1146; CORTEX-A35:  .eabi_attribute 42, 1
1147; CORTEX-A35-NOT:  .eabi_attribute 44
1148; CORTEX-A35:  .eabi_attribute 68, 3
1149
1150; CORTEX-A35-FAST-NOT:   .eabi_attribute 19
1151;; The A35 has the ARMv8 FP unit, which always flushes preserving sign.
1152; CORTEX-A35-FAST:  .eabi_attribute 20, 2
1153; CORTEX-A35-FAST-NOT:  .eabi_attribute 21
1154; CORTEX-A35-FAST-NOT:  .eabi_attribute 22
1155; CORTEX-A35-FAST:  .eabi_attribute 23, 1
1156
1157; CORTEX-A53:  .cpu cortex-a53
1158; CORTEX-A53:  .eabi_attribute 6, 14
1159; CORTEX-A53:  .eabi_attribute 7, 65
1160; CORTEX-A53:  .eabi_attribute 8, 1
1161; CORTEX-A53:  .eabi_attribute 9, 2
1162; CORTEX-A53:  .fpu crypto-neon-fp-armv8
1163; CORTEX-A53:  .eabi_attribute 12, 3
1164; CORTEX-A53-NOT:   .eabi_attribute 19
1165;; We default to IEEE 754 compliance
1166; CORTEX-A53:  .eabi_attribute 20, 1
1167; CORTEX-A53:  .eabi_attribute 21, 1
1168; CORTEX-A53-NOT:  .eabi_attribute 22
1169; CORTEX-A53:  .eabi_attribute 23, 3
1170; CORTEX-A53:  .eabi_attribute 24, 1
1171; CORTEX-A53:  .eabi_attribute 25, 1
1172; CORTEX-A53-NOT:  .eabi_attribute 27
1173; CORTEX-A53-NOT:  .eabi_attribute 28
1174; CORTEX-A53:  .eabi_attribute 36, 1
1175; CORTEX-A53:  .eabi_attribute 38, 1
1176; CORTEX-A53:  .eabi_attribute 42, 1
1177; CORTEX-A53-NOT:  .eabi_attribute 44
1178; CORTEX-A53:  .eabi_attribute 68, 3
1179
1180; CORTEX-A53-FAST-NOT:   .eabi_attribute 19
1181;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1182; CORTEX-A53-FAST:  .eabi_attribute 20, 2
1183; CORTEX-A53-FAST-NOT:  .eabi_attribute 21
1184; CORTEX-A53-FAST-NOT:  .eabi_attribute 22
1185; CORTEX-A53-FAST:  .eabi_attribute 23, 1
1186
1187; CORTEX-A57:  .cpu cortex-a57
1188; CORTEX-A57:  .eabi_attribute 6, 14
1189; CORTEX-A57:  .eabi_attribute 7, 65
1190; CORTEX-A57:  .eabi_attribute 8, 1
1191; CORTEX-A57:  .eabi_attribute 9, 2
1192; CORTEX-A57:  .fpu crypto-neon-fp-armv8
1193; CORTEX-A57:  .eabi_attribute 12, 3
1194; CORTEX-A57-NOT:   .eabi_attribute 19
1195;; We default to IEEE 754 compliance
1196; CORTEX-A57:  .eabi_attribute 20, 1
1197; CORTEX-A57:  .eabi_attribute 21, 1
1198; CORTEX-A57-NOT:  .eabi_attribute 22
1199; CORTEX-A57:  .eabi_attribute 23, 3
1200; CORTEX-A57:  .eabi_attribute 24, 1
1201; CORTEX-A57:  .eabi_attribute 25, 1
1202; CORTEX-A57-NOT:  .eabi_attribute 27
1203; CORTEX-A57-NOT:  .eabi_attribute 28
1204; CORTEX-A57:  .eabi_attribute 36, 1
1205; CORTEX-A57:  .eabi_attribute 38, 1
1206; CORTEX-A57:  .eabi_attribute 42, 1
1207; CORTEX-A57-NOT:  .eabi_attribute 44
1208; CORTEX-A57:  .eabi_attribute 68, 3
1209
1210; CORTEX-A57-FAST-NOT:   .eabi_attribute 19
1211;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1212; CORTEX-A57-FAST:  .eabi_attribute 20, 2
1213; CORTEX-A57-FAST-NOT:  .eabi_attribute 21
1214; CORTEX-A57-FAST-NOT:  .eabi_attribute 22
1215; CORTEX-A57-FAST:  .eabi_attribute 23, 1
1216
1217; CORTEX-A72:  .cpu cortex-a72
1218; CORTEX-A72:  .eabi_attribute 6, 14
1219; CORTEX-A72:  .eabi_attribute 7, 65
1220; CORTEX-A72:  .eabi_attribute 8, 1
1221; CORTEX-A72:  .eabi_attribute 9, 2
1222; CORTEX-A72:  .fpu crypto-neon-fp-armv8
1223; CORTEX-A72:  .eabi_attribute 12, 3
1224; CORTEX-A72-NOT:   .eabi_attribute 19
1225;; We default to IEEE 754 compliance
1226; CORTEX-A72:  .eabi_attribute 20, 1
1227; CORTEX-A72:  .eabi_attribute 21, 1
1228; CORTEX-A72-NOT:  .eabi_attribute 22
1229; CORTEX-A72:  .eabi_attribute 23, 3
1230; CORTEX-A72:  .eabi_attribute 24, 1
1231; CORTEX-A72:  .eabi_attribute 25, 1
1232; CORTEX-A72-NOT:  .eabi_attribute 27
1233; CORTEX-A72-NOT:  .eabi_attribute 28
1234; CORTEX-A72:  .eabi_attribute 36, 1
1235; CORTEX-A72:  .eabi_attribute 38, 1
1236; CORTEX-A72:  .eabi_attribute 42, 1
1237; CORTEX-A72-NOT:  .eabi_attribute 44
1238; CORTEX-A72:  .eabi_attribute 68, 3
1239
1240; CORTEX-A72-FAST-NOT:   .eabi_attribute 19
1241;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1242; CORTEX-A72-FAST:  .eabi_attribute 20, 2
1243; CORTEX-A72-FAST-NOT:  .eabi_attribute 21
1244; CORTEX-A72-FAST-NOT:  .eabi_attribute 22
1245; CORTEX-A72-FAST:  .eabi_attribute 23, 1
1246
1247; EXYNOS-M1:  .cpu exynos-m1
1248; EXYNOS-M1:  .eabi_attribute 6, 14
1249; EXYNOS-M1:  .eabi_attribute 7, 65
1250; EXYNOS-M1:  .eabi_attribute 8, 1
1251; EXYNOS-M1:  .eabi_attribute 9, 2
1252; EXYNOS-M1:  .fpu crypto-neon-fp-armv8
1253; EXYNOS-M1:  .eabi_attribute 12, 3
1254; EXYNOS-M1-NOT:   .eabi_attribute 19
1255;; We default to IEEE 754 compliance
1256; EXYNOS-M1:  .eabi_attribute 20, 1
1257; EXYNOS-M1:  .eabi_attribute 21, 1
1258; EXYNOS-M1-NOT:  .eabi_attribute 22
1259; EXYNOS-M1:  .eabi_attribute 23, 3
1260; EXYNOS-M1:  .eabi_attribute 24, 1
1261; EXYNOS-M1:  .eabi_attribute 25, 1
1262; EXYNOS-M1-NOT:  .eabi_attribute 27
1263; EXYNOS-M1-NOT:  .eabi_attribute 28
1264; EXYNOS-M1:  .eabi_attribute 36, 1
1265; EXYNOS-M1:  .eabi_attribute 38, 1
1266; EXYNOS-M1:  .eabi_attribute 42, 1
1267; EXYNOS-M1-NOT:  .eabi_attribute 44
1268; EXYNOS-M15:  .eabi_attribute 68, 3
1269
1270; EXYNOS-M1-FAST-NOT:   .eabi_attribute 19
1271;; The exynos-m1 has the ARMv8 FP unit, which always flushes preserving sign.
1272; EXYNOS-M1-FAST:  .eabi_attribute 20, 2
1273; EXYNOS-M1-FAST-NOT:  .eabi_attribute 21
1274; EXYNOS-M1-FAST-NOT:  .eabi_attribute 22
1275; EXYNOS-M1-FAST:  .eabi_attribute 23, 1
1276
1277; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
1278; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
1279; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
1280; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16
1281; GENERIC-FPU-NEON-FP16: .fpu neon-fp16
1282
1283; GENERIC-ARMV8_1-A:  .eabi_attribute 6, 14
1284; GENERIC-ARMV8_1-A:  .eabi_attribute 7, 65
1285; GENERIC-ARMV8_1-A:  .eabi_attribute 8, 1
1286; GENERIC-ARMV8_1-A:  .eabi_attribute 9, 2
1287; GENERIC-ARMV8_1-A:  .fpu crypto-neon-fp-armv8
1288; GENERIC-ARMV8_1-A:  .eabi_attribute 12, 4
1289; GENERIC-ARMV8_1-A-NOT:   .eabi_attribute 19
1290;; We default to IEEE 754 compliance
1291; GENERIC-ARMV8_1-A:  .eabi_attribute 20, 1
1292; GENERIC-ARMV8_1-A:  .eabi_attribute 21, 1
1293; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 22
1294; GENERIC-ARMV8_1-A:  .eabi_attribute 23, 3
1295; GENERIC-ARMV8_1-A:  .eabi_attribute 24, 1
1296; GENERIC-ARMV8_1-A:  .eabi_attribute 25, 1
1297; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 27
1298; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 28
1299; GENERIC-ARMV8_1-A:  .eabi_attribute 36, 1
1300; GENERIC-ARMV8_1-A:  .eabi_attribute 38, 1
1301; GENERIC-ARMV8_1-A:  .eabi_attribute 42, 1
1302; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 44
1303; GENERIC-ARMV8_1-A:  .eabi_attribute 68, 3
1304
1305; GENERIC-ARMV8_1-A-FAST-NOT:   .eabi_attribute 19
1306;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign.
1307; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 20, 2
1308; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 21
1309; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 22
1310; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 23, 1
1311
1312; RELOC-PIC:  .eabi_attribute 15, 1
1313; RELOC-PIC:  .eabi_attribute 16, 1
1314; RELOC-PIC:  .eabi_attribute 17, 2
1315; RELOC-OTHER:  .eabi_attribute 17, 1
1316
1317; PCS-R9-USE:  .eabi_attribute 14, 0
1318; PCS-R9-RESERVE:  .eabi_attribute 14, 3
1319
1320define i32 @f(i64 %z) {
1321    ret i32 0
1322}
1323