xref: /llvm-project/llvm/test/CodeGen/ARM/build-attributes.ll (revision 8c34dd82575920209d18f9fb93634886f7edbe26) 
1; This tests that MC/asm header conversion is smooth and that the
2; build attributes are correct
3
4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE
5; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6
6; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST
7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S
13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast  | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST
17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
20; RUN: llc < %s -mtriple=armv7-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST
21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
22; RUN: llc < %s -mtriple=armv8-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST
23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
30; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE
31; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE
32; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP
33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-SOFT-FAST
41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A8-HARD
42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-HARD-FAST
43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
54; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
57; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST
58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
60; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST
61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
62; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
63
64; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16
65; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16
66; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD
67; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16
68; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16
69
70; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
71; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0
72; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
73; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
74; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0PLUS
75; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
76; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
77; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M1
78; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
79; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
80; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000
81; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
82; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
83; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
84; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
85; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
86; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
87; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
88; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
89; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
90; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
91; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
92; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
93; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
94; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
95; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
96; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
97; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
98; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
99; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
100; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
101; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
102; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
103; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
104; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
105; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
106; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
107; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
108; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8
109; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST
110; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
111; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=CORTEX-A32
112; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A32-FAST
113; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
114; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35
115; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST
116; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
117; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
118; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
119; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
120; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
121; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST
122; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
123; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
124; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
125; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
126; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
127; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=EXYNOS-M1
128; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
129; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
130; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
131; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
132; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s  --check-prefix=CORTEX-A7-CHECK
133; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s  --check-prefix=CORTEX-A7-CHECK-FAST
134; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
135; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
136; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
137; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
138; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
139; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
140; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
141; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
142; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
143; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER
144; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE
145; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE
146
147; ARMv8.1a (AArch32)
148; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
149; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
150; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
151; ARMv8a (AArch32)
152; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
153; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
154; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
155; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
156; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
157; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
158; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
159; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
160; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
161; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
162
163; ARMv7a
164; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
165; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
166; ARMv7r
167; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
168; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
169; ARMv7m
170; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
171; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
172; ARMv6
173; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
174; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
175; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
176; ARMv6k
177; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
178; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
179; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
180; ARMv6m
181; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
182; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
183; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
184; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
185; ARMv5
186; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN
187; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
188
189; XSCALE:      .eabi_attribute 6, 5
190; XSCALE:      .eabi_attribute 8, 1
191; XSCALE:      .eabi_attribute 9, 1
192
193; DYN-ROUNDING: .eabi_attribute 19, 1
194
195; V6:   .eabi_attribute 6, 6
196; V6:   .eabi_attribute 8, 1
197;; We assume round-to-nearest by default (matches GCC)
198; V6-NOT:   .eabi_attribute 19
199;; The default choice made by llc is for a V6 CPU without an FPU.
200;; This is not an interesting detail, but for such CPUs, the default intention is to use
201;; software floating-point support. The choice is not important for targets without
202;; FPU support!
203; V6:   .eabi_attribute 20, 1
204; V6:   .eabi_attribute 21, 1
205; V6-NOT:   .eabi_attribute 22
206; V6:   .eabi_attribute 23, 3
207; V6:   .eabi_attribute 24, 1
208; V6:   .eabi_attribute 25, 1
209; V6-NOT:   .eabi_attribute 27
210; V6-NOT:   .eabi_attribute 28
211; V6-NOT:    .eabi_attribute 36
212; V6:    .eabi_attribute 38, 1
213; V6-NOT:    .eabi_attribute 42
214; V6-NOT:  .eabi_attribute 44
215; V6-NOT:    .eabi_attribute 68
216
217; V6-FAST-NOT:   .eabi_attribute 19
218;; Despite the V6 CPU having no FPU by default, we chose to flush to
219;; positive zero here. There's no hardware support doing this, but the
220;; fast maths software library might.
221; V6-FAST-NOT:   .eabi_attribute 20
222; V6-FAST-NOT:   .eabi_attribute 21
223; V6-FAST-NOT:   .eabi_attribute 22
224; V6-FAST:   .eabi_attribute 23, 1
225
226;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for
227;; V6-M, however we don't model the OS extension so this is fine.
228; V6M:  .eabi_attribute 6, 12
229; V6M-NOT:  .eabi_attribute 7
230; V6M:  .eabi_attribute 8, 0
231; V6M:  .eabi_attribute 9, 1
232; V6M-NOT:   .eabi_attribute 19
233;; The default choice made by llc is for a V6M CPU without an FPU.
234;; This is not an interesting detail, but for such CPUs, the default intention is to use
235;; software floating-point support. The choice is not important for targets without
236;; FPU support!
237; V6M:  .eabi_attribute 20, 1
238; V6M:   .eabi_attribute 21, 1
239; V6M-NOT:   .eabi_attribute 22
240; V6M:   .eabi_attribute 23, 3
241; V6M:  .eabi_attribute 24, 1
242; V6M:  .eabi_attribute 25, 1
243; V6M-NOT:  .eabi_attribute 27
244; V6M-NOT:  .eabi_attribute 28
245; V6M-NOT:  .eabi_attribute 36
246; V6M:  .eabi_attribute 38, 1
247; V6M-NOT:  .eabi_attribute 42
248; V6M-NOT:  .eabi_attribute 44
249; V6M-NOT:  .eabi_attribute 68
250
251; V6M-FAST-NOT:   .eabi_attribute 19
252;; Despite the V6M CPU having no FPU by default, we chose to flush to
253;; positive zero here. There's no hardware support doing this, but the
254;; fast maths software library might.
255; V6M-FAST-NOT:  .eabi_attribute 20
256; V6M-FAST-NOT:   .eabi_attribute 21
257; V6M-FAST-NOT:   .eabi_attribute 22
258; V6M-FAST:   .eabi_attribute 23, 1
259
260; ARM1156T2F-S: .cpu arm1156t2f-s
261; ARM1156T2F-S: .eabi_attribute 6, 8
262; ARM1156T2F-S: .eabi_attribute 8, 1
263; ARM1156T2F-S: .eabi_attribute 9, 2
264; ARM1156T2F-S: .fpu vfpv2
265; ARM1156T2F-S-NOT:   .eabi_attribute 19
266;; We default to IEEE 754 compliance
267; ARM1156T2F-S: .eabi_attribute 20, 1
268; ARM1156T2F-S: .eabi_attribute 21, 1
269; ARM1156T2F-S-NOT: .eabi_attribute 22
270; ARM1156T2F-S: .eabi_attribute 23, 3
271; ARM1156T2F-S: .eabi_attribute 24, 1
272; ARM1156T2F-S: .eabi_attribute 25, 1
273; ARM1156T2F-S-NOT: .eabi_attribute 27
274; ARM1156T2F-S-NOT: .eabi_attribute 28
275; ARM1156T2F-S-NOT: .eabi_attribute 36
276; ARM1156T2F-S: .eabi_attribute 38, 1
277; ARM1156T2F-S-NOT:    .eabi_attribute 42
278; ARM1156T2F-S-NOT:    .eabi_attribute 44
279; ARM1156T2F-S-NOT:    .eabi_attribute 68
280
281; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 19
282;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
283;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
284;; select. LLVM historically picks 0.
285; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
286; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 21
287; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 22
288; ARM1156T2F-S-FAST:   .eabi_attribute 23, 1
289
290; V7M:  .eabi_attribute 6, 10
291; V7M:  .eabi_attribute 7, 77
292; V7M:  .eabi_attribute 8, 0
293; V7M:  .eabi_attribute 9, 2
294; V7M-NOT:   .eabi_attribute 19
295;; The default choice made by llc is for a V7M CPU without an FPU.
296;; This is not an interesting detail, but for such CPUs, the default intention is to use
297;; software floating-point support. The choice is not important for targets without
298;; FPU support!
299; V7M:  .eabi_attribute 20, 1
300; V7M: .eabi_attribute 21, 1
301; V7M-NOT: .eabi_attribute 22
302; V7M: .eabi_attribute 23, 3
303; V7M:  .eabi_attribute 24, 1
304; V7M:  .eabi_attribute 25, 1
305; V7M-NOT:  .eabi_attribute 27
306; V7M-NOT:  .eabi_attribute 28
307; V7M-NOT:  .eabi_attribute 36
308; V7M:  .eabi_attribute 38, 1
309; V7M-NOT:  .eabi_attribute 42
310; V7M-NOT:  .eabi_attribute 44
311; V7M-NOT:  .eabi_attribute 68
312
313; V7M-FAST-NOT:   .eabi_attribute 19
314;; Despite the V7M CPU having no FPU by default, we chose to flush
315;; preserving sign. This matches what the hardware would do in the
316;; architecture revision were to exist on the current target.
317; V7M-FAST:  .eabi_attribute 20, 2
318; V7M-FAST-NOT:   .eabi_attribute 21
319; V7M-FAST-NOT:   .eabi_attribute 22
320; V7M-FAST:   .eabi_attribute 23, 1
321
322; V7:      .syntax unified
323; V7: .eabi_attribute 6, 10
324; V7-NOT:   .eabi_attribute 19
325;; In safe-maths mode we default to an IEEE 754 compliant choice.
326; V7: .eabi_attribute 20, 1
327; V7: .eabi_attribute 21, 1
328; V7-NOT: .eabi_attribute 22
329; V7: .eabi_attribute 23, 3
330; V7: .eabi_attribute 24, 1
331; V7: .eabi_attribute 25, 1
332; V7-NOT: .eabi_attribute 27
333; V7-NOT: .eabi_attribute 28
334; V7-NOT: .eabi_attribute 36
335; V7: .eabi_attribute 38, 1
336; V7-NOT:    .eabi_attribute 42
337; V7-NOT:    .eabi_attribute 44
338; V7-NOT:    .eabi_attribute 68
339
340; V7-FAST-NOT:   .eabi_attribute 19
341;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
342;; denormals to zero preserving the sign.
343; V7-FAST: .eabi_attribute 20, 2
344; V7-FAST-NOT:   .eabi_attribute 21
345; V7-FAST-NOT:   .eabi_attribute 22
346; V7-FAST:   .eabi_attribute 23, 1
347
348; V8:      .syntax unified
349; V8: .eabi_attribute 67, "2.09"
350; V8: .eabi_attribute 6, 14
351; V8-NOT:   .eabi_attribute 19
352; V8: .eabi_attribute 20, 1
353; V8: .eabi_attribute 21, 1
354; V8-NOT: .eabi_attribute 22
355; V8: .eabi_attribute 23, 3
356; V8-NOT: .eabi_attribute 44
357
358; V8-FAST-NOT:   .eabi_attribute 19
359;; The default does have an FPU, and for V8-A, it flushes preserving sign.
360; V8-FAST: .eabi_attribute 20, 2
361; V8-FAST-NOT: .eabi_attribute 21
362; V8-FAST-NOT: .eabi_attribute 22
363; V8-FAST: .eabi_attribute 23, 1
364
365; Vt8:     .syntax unified
366; Vt8: .eabi_attribute 6, 14
367; Vt8-NOT:   .eabi_attribute 19
368; Vt8: .eabi_attribute 20, 1
369; Vt8: .eabi_attribute 21, 1
370; Vt8-NOT: .eabi_attribute 22
371; Vt8: .eabi_attribute 23, 3
372
373; V8-FPARMv8:      .syntax unified
374; V8-FPARMv8: .eabi_attribute 6, 14
375; V8-FPARMv8: .fpu fp-armv8
376
377; V8-NEON:      .syntax unified
378; V8-NEON: .eabi_attribute 6, 14
379; V8-NEON: .fpu neon
380; V8-NEON: .eabi_attribute 12, 3
381
382; V8-FPARMv8-NEON:      .syntax unified
383; V8-FPARMv8-NEON: .eabi_attribute 6, 14
384; V8-FPARMv8-NEON: .fpu neon-fp-armv8
385; V8-FPARMv8-NEON: .eabi_attribute 12, 3
386
387; V8-FPARMv8-NEON-CRYPTO:      .syntax unified
388; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
389; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
390; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
391
392; V8MBASELINE: .syntax unified
393; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline
394; V8MBASELINE: .eabi_attribute 6, 16
395; '7' is Tag_CPU_arch_profile, '77' is 'M'
396; V8MBASELINE: .eabi_attribute 7, 77
397; '8' is Tag_ARM_ISA_use
398; V8MBASELINE: .eabi_attribute 8, 0
399; '9' is Tag_Thumb_ISA_use
400; V8MBASELINE: .eabi_attribute 9, 3
401
402; V8MMAINLINE: .syntax unified
403; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline
404; V8MMAINLINE: .eabi_attribute 6, 17
405; V8MMAINLINE: .eabi_attribute 7, 77
406; V8MMAINLINE: .eabi_attribute 8, 0
407; V8MMAINLINE: .eabi_attribute 9, 3
408; V8MMAINLINE_DSP-NOT: .eabi_attribute 46
409
410; V8MMAINLINE_DSP: .syntax unified
411; V8MBASELINE_DSP: .eabi_attribute 6, 17
412; V8MBASELINE_DSP: .eabi_attribute 7, 77
413; V8MMAINLINE_DSP: .eabi_attribute 8, 0
414; V8MMAINLINE_DSP: .eabi_attribute 9, 3
415; V8MMAINLINE_DSP: .eabi_attribute 46, 1
416
417; Tag_CPU_unaligned_access
418; NO-STRICT-ALIGN: .eabi_attribute 34, 1
419; STRICT-ALIGN: .eabi_attribute 34, 0
420
421; Tag_CPU_arch  'ARMv7'
422; CORTEX-A7-CHECK: .eabi_attribute      6, 10
423; CORTEX-A7-NOFPU: .eabi_attribute      6, 10
424
425; CORTEX-A7-FPUV4: .eabi_attribute      6, 10
426
427; Tag_CPU_arch_profile 'A'
428; CORTEX-A7-CHECK: .eabi_attribute      7, 65
429; CORTEX-A7-NOFPU: .eabi_attribute      7, 65
430; CORTEX-A7-FPUV4: .eabi_attribute      7, 65
431
432; Tag_ARM_ISA_use
433; CORTEX-A7-CHECK: .eabi_attribute      8, 1
434; CORTEX-A7-NOFPU: .eabi_attribute      8, 1
435; CORTEX-A7-FPUV4: .eabi_attribute      8, 1
436
437; Tag_THUMB_ISA_use
438; CORTEX-A7-CHECK: .eabi_attribute      9, 2
439; CORTEX-A7-NOFPU: .eabi_attribute      9, 2
440; CORTEX-A7-FPUV4: .eabi_attribute      9, 2
441
442; CORTEX-A7-CHECK: .fpu neon-vfpv4
443; CORTEX-A7-NOFPU-NOT: .fpu
444; CORTEX-A7-FPUV4: .fpu vfpv4
445
446; CORTEX-A7-CHECK-NOT:   .eabi_attribute 19
447; Tag_ABI_FP_denormal
448;; We default to IEEE 754 compliance
449; CORTEX-A7-CHECK: .eabi_attribute      20, 1
450;; The A7 has VFPv3 support by default, so flush preserving sign.
451; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
452; CORTEX-A7-NOFPU: .eabi_attribute      20, 1
453;; Despite there being no FPU, we chose to flush to zero preserving
454;; sign. This matches what the hardware would do for this architecture
455;; revision.
456; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
457; CORTEX-A7-FPUV4: .eabi_attribute      20, 1
458;; The VFPv4 FPU flushes preserving sign.
459; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
460
461; Tag_ABI_FP_exceptions
462; CORTEX-A7-CHECK: .eabi_attribute      21, 1
463; CORTEX-A7-NOFPU: .eabi_attribute      21, 1
464; CORTEX-A7-FPUV4: .eabi_attribute      21, 1
465
466; Tag_ABI_FP_user_exceptions
467; CORTEX-A7-CHECK-NOT: .eabi_attribute      22
468; CORTEX-A7-NOFPU-NOT: .eabi_attribute      22
469; CORTEX-A7-FPUV4-NOT: .eabi_attribute      22
470
471; Tag_ABI_FP_number_model
472; CORTEX-A7-CHECK: .eabi_attribute      23, 3
473; CORTEX-A7-NOFPU: .eabi_attribute      23, 3
474; CORTEX-A7-FPUV4: .eabi_attribute      23, 3
475
476; Tag_ABI_align_needed
477; CORTEX-A7-CHECK: .eabi_attribute      24, 1
478; CORTEX-A7-NOFPU: .eabi_attribute      24, 1
479; CORTEX-A7-FPUV4: .eabi_attribute      24, 1
480
481; Tag_ABI_align_preserved
482; CORTEX-A7-CHECK: .eabi_attribute      25, 1
483; CORTEX-A7-NOFPU: .eabi_attribute      25, 1
484; CORTEX-A7-FPUV4: .eabi_attribute      25, 1
485
486; Tag_FP_HP_extension
487; CORTEX-A7-CHECK: .eabi_attribute      36, 1
488; CORTEX-A7-NOFPU-NOT: .eabi_attribute  36
489; CORTEX-A7-FPUV4: .eabi_attribute      36, 1
490
491; Tag_FP_16bit_format
492; CORTEX-A7-CHECK: .eabi_attribute      38, 1
493; CORTEX-A7-NOFPU: .eabi_attribute      38, 1
494; CORTEX-A7-FPUV4: .eabi_attribute      38, 1
495
496; Tag_MPextension_use
497; CORTEX-A7-CHECK: .eabi_attribute      42, 1
498; CORTEX-A7-NOFPU: .eabi_attribute      42, 1
499; CORTEX-A7-FPUV4: .eabi_attribute      42, 1
500
501; Tag_DIV_use
502; CORTEX-A7-CHECK: .eabi_attribute      44, 2
503; CORTEX-A7-NOFPU: .eabi_attribute      44, 2
504; CORTEX-A7-FPUV4: .eabi_attribute      44, 2
505
506; Tag_DSP_extension
507; CORTEX-A7-CHECK-NOT: .eabi_attribute      46
508
509; Tag_Virtualization_use
510; CORTEX-A7-CHECK: .eabi_attribute      68, 3
511; CORTEX-A7-NOFPU: .eabi_attribute      68, 3
512; CORTEX-A7-FPUV4: .eabi_attribute      68, 3
513
514; CORTEX-A5-DEFAULT:        .cpu    cortex-a5
515; CORTEX-A5-DEFAULT:        .eabi_attribute 6, 10
516; CORTEX-A5-DEFAULT:        .eabi_attribute 7, 65
517; CORTEX-A5-DEFAULT:        .eabi_attribute 8, 1
518; CORTEX-A5-DEFAULT:        .eabi_attribute 9, 2
519; CORTEX-A5-DEFAULT:        .fpu    neon-vfpv4
520; CORTEX-A5-NOT:   .eabi_attribute 19
521;; We default to IEEE 754 compliance
522; CORTEX-A5-DEFAULT:        .eabi_attribute 20, 1
523; CORTEX-A5-DEFAULT:        .eabi_attribute 21, 1
524; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 22
525; CORTEX-A5-DEFAULT:        .eabi_attribute 23, 3
526; CORTEX-A5-DEFAULT:        .eabi_attribute 24, 1
527; CORTEX-A5-DEFAULT:        .eabi_attribute 25, 1
528; CORTEX-A5-DEFAULT:        .eabi_attribute 42, 1
529; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 44
530; CORTEX-A5-DEFAULT:        .eabi_attribute 68, 1
531
532; CORTEX-A5-DEFAULT-FAST-NOT:   .eabi_attribute 19
533;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math
534;; is given.
535; CORTEX-A5-DEFAULT-FAST:        .eabi_attribute 20, 2
536; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21
537; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22
538; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1
539
540; CORTEX-A5-NONEON:        .cpu    cortex-a5
541; CORTEX-A5-NONEON:        .eabi_attribute 6, 10
542; CORTEX-A5-NONEON:        .eabi_attribute 7, 65
543; CORTEX-A5-NONEON:        .eabi_attribute 8, 1
544; CORTEX-A5-NONEON:        .eabi_attribute 9, 2
545; CORTEX-A5-NONEON:        .fpu    vfpv4-d16
546;; We default to IEEE 754 compliance
547; CORTEX-A5-NONEON:        .eabi_attribute 20, 1
548; CORTEX-A5-NONEON:        .eabi_attribute 21, 1
549; CORTEX-A5-NONEON-NOT:    .eabi_attribute 22
550; CORTEX-A5-NONEON:        .eabi_attribute 23, 3
551; CORTEX-A5-NONEON:        .eabi_attribute 24, 1
552; CORTEX-A5-NONEON:        .eabi_attribute 25, 1
553; CORTEX-A5-NONEON:        .eabi_attribute 42, 1
554; CORTEX-A5-NONEON:        .eabi_attribute 68, 1
555
556; CORTEX-A5-NONEON-FAST-NOT:   .eabi_attribute 19
557;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
558;; is given.
559; CORTEX-A5-NONEON-FAST:        .eabi_attribute 20, 2
560; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21
561; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22
562; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1
563
564; CORTEX-A5-NOFPU:        .cpu    cortex-a5
565; CORTEX-A5-NOFPU:        .eabi_attribute 6, 10
566; CORTEX-A5-NOFPU:        .eabi_attribute 7, 65
567; CORTEX-A5-NOFPU:        .eabi_attribute 8, 1
568; CORTEX-A5-NOFPU:        .eabi_attribute 9, 2
569; CORTEX-A5-NOFPU-NOT:    .fpu
570; CORTEX-A5-NOFPU-NOT:   .eabi_attribute 19
571;; We default to IEEE 754 compliance
572; CORTEX-A5-NOFPU:        .eabi_attribute 20, 1
573; CORTEX-A5-NOFPU:        .eabi_attribute 21, 1
574; CORTEX-A5-NOFPU-NOT:    .eabi_attribute 22
575; CORTEX-A5-NOFPU:        .eabi_attribute 23, 3
576; CORTEX-A5-NOFPU:        .eabi_attribute 24, 1
577; CORTEX-A5-NOFPU:        .eabi_attribute 25, 1
578; CORTEX-A5-NOFPU:        .eabi_attribute 42, 1
579; CORTEX-A5-NOFPU:        .eabi_attribute 68, 1
580
581; CORTEX-A5-NOFPU-FAST-NOT:   .eabi_attribute 19
582;; Despite there being no FPU, we chose to flush to zero preserving
583;; sign. This matches what the hardware would do for this architecture
584;; revision.
585; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
586; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21
587; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22
588; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1
589
590; CORTEX-A8-SOFT:  .cpu cortex-a8
591; CORTEX-A8-SOFT:  .eabi_attribute 6, 10
592; CORTEX-A8-SOFT:  .eabi_attribute 7, 65
593; CORTEX-A8-SOFT:  .eabi_attribute 8, 1
594; CORTEX-A8-SOFT:  .eabi_attribute 9, 2
595; CORTEX-A8-SOFT:  .fpu neon
596; CORTEX-A8-SOFT-NOT:   .eabi_attribute 19
597;; We default to IEEE 754 compliance
598; CORTEX-A8-SOFT:  .eabi_attribute 20, 1
599; CORTEX-A8-SOFT:  .eabi_attribute 21, 1
600; CORTEX-A8-SOFT-NOT:  .eabi_attribute 22
601; CORTEX-A8-SOFT:  .eabi_attribute 23, 3
602; CORTEX-A8-SOFT:  .eabi_attribute 24, 1
603; CORTEX-A8-SOFT:  .eabi_attribute 25, 1
604; CORTEX-A8-SOFT-NOT:  .eabi_attribute 27
605; CORTEX-A8-SOFT-NOT:  .eabi_attribute 28
606; CORTEX-A8-SOFT-NOT:  .eabi_attribute 36, 1
607; CORTEX-A8-SOFT:  .eabi_attribute 38, 1
608; CORTEX-A8-SOFT-NOT:  .eabi_attribute 42, 1
609; CORTEX-A8-SOFT-NOT:  .eabi_attribute 44
610; CORTEX-A8-SOFT:  .eabi_attribute 68, 1
611
612; CORTEX-A9-SOFT:  .cpu cortex-a9
613; CORTEX-A9-SOFT:  .eabi_attribute 6, 10
614; CORTEX-A9-SOFT:  .eabi_attribute 7, 65
615; CORTEX-A9-SOFT:  .eabi_attribute 8, 1
616; CORTEX-A9-SOFT:  .eabi_attribute 9, 2
617; CORTEX-A9-SOFT:  .fpu neon
618; CORTEX-A9-SOFT-NOT:   .eabi_attribute 19
619;; We default to IEEE 754 compliance
620; CORTEX-A9-SOFT:  .eabi_attribute 20, 1
621; CORTEX-A9-SOFT:  .eabi_attribute 21, 1
622; CORTEX-A9-SOFT-NOT:  .eabi_attribute 22
623; CORTEX-A9-SOFT:  .eabi_attribute 23, 3
624; CORTEX-A9-SOFT:  .eabi_attribute 24, 1
625; CORTEX-A9-SOFT:  .eabi_attribute 25, 1
626; CORTEX-A9-SOFT-NOT:  .eabi_attribute 27
627; CORTEX-A9-SOFT-NOT:  .eabi_attribute 28
628; CORTEX-A9-SOFT:  .eabi_attribute 36, 1
629; CORTEX-A9-SOFT:  .eabi_attribute 38, 1
630; CORTEX-A9-SOFT:  .eabi_attribute 42, 1
631; CORTEX-A9-SOFT-NOT:  .eabi_attribute 44
632; CORTEX-A9-SOFT:  .eabi_attribute 68, 1
633
634; CORTEX-A8-SOFT-FAST-NOT:   .eabi_attribute 19
635; CORTEX-A9-SOFT-FAST-NOT:   .eabi_attribute 19
636;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
637;; -ffast-math is specified.
638; CORTEX-A8-SOFT-FAST:  .eabi_attribute 20, 2
639; CORTEX-A9-SOFT-FAST:  .eabi_attribute 20, 2
640; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21
641; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22
642; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1
643
644; CORTEX-A8-HARD:  .cpu cortex-a8
645; CORTEX-A8-HARD:  .eabi_attribute 6, 10
646; CORTEX-A8-HARD:  .eabi_attribute 7, 65
647; CORTEX-A8-HARD:  .eabi_attribute 8, 1
648; CORTEX-A8-HARD:  .eabi_attribute 9, 2
649; CORTEX-A8-HARD:  .fpu neon
650; CORTEX-A8-HARD-NOT:   .eabi_attribute 19
651;; We default to IEEE 754 compliance
652; CORTEX-A8-HARD:  .eabi_attribute 20, 1
653; CORTEX-A8-HARD:  .eabi_attribute 21, 1
654; CORTEX-A8-HARD-NOT:  .eabi_attribute 22
655; CORTEX-A8-HARD:  .eabi_attribute 23, 3
656; CORTEX-A8-HARD:  .eabi_attribute 24, 1
657; CORTEX-A8-HARD:  .eabi_attribute 25, 1
658; CORTEX-A8-HARD-NOT:  .eabi_attribute 27
659; CORTEX-A8-HARD:  .eabi_attribute 28, 1
660; CORTEX-A8-HARD-NOT:  .eabi_attribute 36, 1
661; CORTEX-A8-HARD:  .eabi_attribute 38, 1
662; CORTEX-A8-HARD-NOT:  .eabi_attribute 42, 1
663; CORTEX-A8-HARD:  .eabi_attribute 68, 1
664
665
666
667; CORTEX-A9-HARD:  .cpu cortex-a9
668; CORTEX-A9-HARD:  .eabi_attribute 6, 10
669; CORTEX-A9-HARD:  .eabi_attribute 7, 65
670; CORTEX-A9-HARD:  .eabi_attribute 8, 1
671; CORTEX-A9-HARD:  .eabi_attribute 9, 2
672; CORTEX-A9-HARD:  .fpu neon
673; CORTEX-A9-HARD-NOT:   .eabi_attribute 19
674;; We default to IEEE 754 compliance
675; CORTEX-A9-HARD:  .eabi_attribute 20, 1
676; CORTEX-A9-HARD:  .eabi_attribute 21, 1
677; CORTEX-A9-HARD-NOT:  .eabi_attribute 22
678; CORTEX-A9-HARD:  .eabi_attribute 23, 3
679; CORTEX-A9-HARD:  .eabi_attribute 24, 1
680; CORTEX-A9-HARD:  .eabi_attribute 25, 1
681; CORTEX-A9-HARD-NOT:  .eabi_attribute 27
682; CORTEX-A9-HARD:  .eabi_attribute 28, 1
683; CORTEX-A9-HARD:  .eabi_attribute 36, 1
684; CORTEX-A9-HARD:  .eabi_attribute 38, 1
685; CORTEX-A9-HARD:  .eabi_attribute 42, 1
686; CORTEX-A9-HARD:  .eabi_attribute 68, 1
687
688; CORTEX-A8-HARD-FAST-NOT:   .eabi_attribute 19
689;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when
690;; -ffast-math is specified.
691; CORTEX-A8-HARD-FAST:  .eabi_attribute 20, 2
692; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 21
693; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 22
694; CORTEX-A8-HARD-FAST:  .eabi_attribute 23, 1
695
696; CORTEX-A9-HARD-FAST-NOT:   .eabi_attribute 19
697;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
698;; -ffast-math is specified.
699; CORTEX-A9-HARD-FAST:  .eabi_attribute 20, 2
700; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 21
701; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 22
702; CORTEX-A9-HARD-FAST:  .eabi_attribute 23, 1
703
704; CORTEX-A12-DEFAULT:  .cpu cortex-a12
705; CORTEX-A12-DEFAULT:  .eabi_attribute 6, 10
706; CORTEX-A12-DEFAULT:  .eabi_attribute 7, 65
707; CORTEX-A12-DEFAULT:  .eabi_attribute 8, 1
708; CORTEX-A12-DEFAULT:  .eabi_attribute 9, 2
709; CORTEX-A12-DEFAULT:  .fpu neon-vfpv4
710; CORTEX-A12-DEFAULT-NOT:   .eabi_attribute 19
711;; We default to IEEE 754 compliance
712; CORTEX-A12-DEFAULT:  .eabi_attribute 20, 1
713; CORTEX-A12-DEFAULT:  .eabi_attribute 21, 1
714; CORTEX-A12-DEFAULT-NOT:  .eabi_attribute 22
715; CORTEX-A12-DEFAULT:  .eabi_attribute 23, 3
716; CORTEX-A12-DEFAULT:  .eabi_attribute 24, 1
717; CORTEX-A12-DEFAULT:  .eabi_attribute 25, 1
718; CORTEX-A12-DEFAULT:  .eabi_attribute 42, 1
719; CORTEX-A12-DEFAULT:  .eabi_attribute 44, 2
720; CORTEX-A12-DEFAULT:  .eabi_attribute 68, 3
721
722; CORTEX-A12-DEFAULT-FAST-NOT:   .eabi_attribute 19
723;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when
724;; -ffast-math is specified.
725; CORTEX-A12-DEFAULT-FAST:  .eabi_attribute 20, 2
726; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 21
727; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 22
728; CORTEX-A12-HARD-FAST:  .eabi_attribute 23, 1
729
730; CORTEX-A12-NOFPU:  .cpu cortex-a12
731; CORTEX-A12-NOFPU:  .eabi_attribute 6, 10
732; CORTEX-A12-NOFPU:  .eabi_attribute 7, 65
733; CORTEX-A12-NOFPU:  .eabi_attribute 8, 1
734; CORTEX-A12-NOFPU:  .eabi_attribute 9, 2
735; CORTEX-A12-NOFPU-NOT:  .fpu
736; CORTEX-A12-NOFPU-NOT:   .eabi_attribute 19
737;; We default to IEEE 754 compliance
738; CORTEX-A12-NOFPU:  .eabi_attribute 20, 1
739; CORTEX-A12-NOFPU:  .eabi_attribute 21, 1
740; CORTEX-A12-NOFPU-NOT:  .eabi_attribute 22
741; CORTEX-A12-NOFPU:  .eabi_attribute 23, 3
742; CORTEX-A12-NOFPU:  .eabi_attribute 24, 1
743; CORTEX-A12-NOFPU:  .eabi_attribute 25, 1
744; CORTEX-A12-NOFPU:  .eabi_attribute 42, 1
745; CORTEX-A12-NOFPU:  .eabi_attribute 44, 2
746; CORTEX-A12-NOFPU:  .eabi_attribute 68, 3
747
748; CORTEX-A12-NOFPU-FAST-NOT:   .eabi_attribute 19
749;; Despite there being no FPU, we chose to flush to zero preserving
750;; sign. This matches what the hardware would do for this architecture
751;; revision.
752; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 20, 2
753; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 21
754; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 22
755; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 23, 1
756
757; CORTEX-A15: .cpu cortex-a15
758; CORTEX-A15: .eabi_attribute 6, 10
759; CORTEX-A15: .eabi_attribute 7, 65
760; CORTEX-A15: .eabi_attribute 8, 1
761; CORTEX-A15: .eabi_attribute 9, 2
762; CORTEX-A15: .fpu neon-vfpv4
763; CORTEX-A15-NOT:   .eabi_attribute 19
764;; We default to IEEE 754 compliance
765; CORTEX-A15: .eabi_attribute 20, 1
766; CORTEX-A15: .eabi_attribute 21, 1
767; CORTEX-A15-NOT: .eabi_attribute 22
768; CORTEX-A15: .eabi_attribute 23, 3
769; CORTEX-A15: .eabi_attribute 24, 1
770; CORTEX-A15: .eabi_attribute 25, 1
771; CORTEX-A15-NOT: .eabi_attribute 27
772; CORTEX-A15-NOT: .eabi_attribute 28
773; CORTEX-A15: .eabi_attribute 36, 1
774; CORTEX-A15: .eabi_attribute 38, 1
775; CORTEX-A15: .eabi_attribute 42, 1
776; CORTEX-A15: .eabi_attribute 44, 2
777; CORTEX-A15: .eabi_attribute 68, 3
778
779; CORTEX-A15-FAST-NOT:   .eabi_attribute 19
780;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when
781;; -ffast-math is specified.
782; CORTEX-A15-FAST: .eabi_attribute 20, 2
783; CORTEX-A15-FAST-NOT:  .eabi_attribute 21
784; CORTEX-A15-FAST-NOT:  .eabi_attribute 22
785; CORTEX-A15-FAST:  .eabi_attribute 23, 1
786
787; CORTEX-A17-DEFAULT:  .cpu cortex-a17
788; CORTEX-A17-DEFAULT:  .eabi_attribute 6, 10
789; CORTEX-A17-DEFAULT:  .eabi_attribute 7, 65
790; CORTEX-A17-DEFAULT:  .eabi_attribute 8, 1
791; CORTEX-A17-DEFAULT:  .eabi_attribute 9, 2
792; CORTEX-A17-DEFAULT:  .fpu neon-vfpv4
793; CORTEX-A17-DEFAULT-NOT:   .eabi_attribute 19
794;; We default to IEEE 754 compliance
795; CORTEX-A17-DEFAULT:  .eabi_attribute 20, 1
796; CORTEX-A17-DEFAULT:  .eabi_attribute 21, 1
797; CORTEX-A17-DEFAULT-NOT:  .eabi_attribute 22
798; CORTEX-A17-DEFAULT:  .eabi_attribute 23, 3
799; CORTEX-A17-DEFAULT:  .eabi_attribute 24, 1
800; CORTEX-A17-DEFAULT:  .eabi_attribute 25, 1
801; CORTEX-A17-DEFAULT:  .eabi_attribute 42, 1
802; CORTEX-A17-DEFAULT:  .eabi_attribute 44, 2
803; CORTEX-A17-DEFAULT:  .eabi_attribute 68, 3
804
805; CORTEX-A17-FAST-NOT:   .eabi_attribute 19
806;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when
807;; -ffast-math is specified.
808; CORTEX-A17-FAST:  .eabi_attribute 20, 2
809; CORTEX-A17-FAST-NOT:  .eabi_attribute 21
810; CORTEX-A17-FAST-NOT:  .eabi_attribute 22
811; CORTEX-A17-FAST:  .eabi_attribute 23, 1
812
813; CORTEX-A17-NOFPU:  .cpu cortex-a17
814; CORTEX-A17-NOFPU:  .eabi_attribute 6, 10
815; CORTEX-A17-NOFPU:  .eabi_attribute 7, 65
816; CORTEX-A17-NOFPU:  .eabi_attribute 8, 1
817; CORTEX-A17-NOFPU:  .eabi_attribute 9, 2
818; CORTEX-A17-NOFPU-NOT:  .fpu
819; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
820;; We default to IEEE 754 compliance
821; CORTEX-A17-NOFPU:  .eabi_attribute 20, 1
822; CORTEX-A17-NOFPU:  .eabi_attribute 21, 1
823; CORTEX-A17-NOFPU-NOT:  .eabi_attribute 22
824; CORTEX-A17-NOFPU:  .eabi_attribute 23, 3
825; CORTEX-A17-NOFPU:  .eabi_attribute 24, 1
826; CORTEX-A17-NOFPU:  .eabi_attribute 25, 1
827; CORTEX-A17-NOFPU:  .eabi_attribute 42, 1
828; CORTEX-A17-NOFPU:  .eabi_attribute 44, 2
829; CORTEX-A17-NOFPU:  .eabi_attribute 68, 3
830
831; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
832;; Despite there being no FPU, we chose to flush to zero preserving
833;; sign. This matches what the hardware would do for this architecture
834;; revision.
835; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 20, 2
836; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 21
837; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 22
838; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 23, 1
839
840; CORTEX-M0:  .cpu cortex-m0
841; CORTEX-M0:  .eabi_attribute 6, 12
842; CORTEX-M0-NOT:  .eabi_attribute 7
843; CORTEX-M0:  .eabi_attribute 8, 0
844; CORTEX-M0:  .eabi_attribute 9, 1
845; CORTEX-M0-NOT:   .eabi_attribute 19
846;; We default to IEEE 754 compliance
847; CORTEX-M0:  .eabi_attribute 20, 1
848; CORTEX-M0:  .eabi_attribute 21, 1
849; CORTEX-M0-NOT:  .eabi_attribute 22
850; CORTEX-M0:  .eabi_attribute 23, 3
851; CORTEX-M0: .eabi_attribute 34, 0
852; CORTEX-M0:  .eabi_attribute 24, 1
853; CORTEX-M0:  .eabi_attribute 25, 1
854; CORTEX-M0-NOT:  .eabi_attribute 27
855; CORTEX-M0-NOT:  .eabi_attribute 28
856; CORTEX-M0-NOT:  .eabi_attribute 36
857; CORTEX-M0:  .eabi_attribute 38, 1
858; CORTEX-M0-NOT:  .eabi_attribute 42
859; CORTEX-M0-NOT:  .eabi_attribute 44
860; CORTEX-M0-NOT:  .eabi_attribute 68
861
862; CORTEX-M0-FAST-NOT:   .eabi_attribute 19
863;; Despite the M0 CPU having no FPU in this scenario, we chose to
864;; flush to positive zero here. There's no hardware support doing
865;; this, but the fast maths software library might and such behaviour
866;; would match hardware support on this architecture revision if it
867;; existed.
868; CORTEX-M0-FAST-NOT:  .eabi_attribute 20
869; CORTEX-M0-FAST-NOT:  .eabi_attribute 21
870; CORTEX-M0-FAST-NOT:  .eabi_attribute 22
871; CORTEX-M0-FAST:  .eabi_attribute 23, 1
872
873; CORTEX-M0PLUS:  .cpu cortex-m0plus
874; CORTEX-M0PLUS:  .eabi_attribute 6, 12
875; CORTEX-M0PLUS-NOT:  .eabi_attribute 7
876; CORTEX-M0PLUS:  .eabi_attribute 8, 0
877; CORTEX-M0PLUS:  .eabi_attribute 9, 1
878; CORTEX-M0PLUS-NOT:   .eabi_attribute 19
879;; We default to IEEE 754 compliance
880; CORTEX-M0PLUS:  .eabi_attribute 20, 1
881; CORTEX-M0PLUS:  .eabi_attribute 21, 1
882; CORTEX-M0PLUS-NOT:  .eabi_attribute 22
883; CORTEX-M0PLUS:  .eabi_attribute 23, 3
884; CORTEX-M0PLUS:  .eabi_attribute 24, 1
885; CORTEX-M0PLUS:  .eabi_attribute 25, 1
886; CORTEX-M0PLUS-NOT:  .eabi_attribute 27
887; CORTEX-M0PLUS-NOT:  .eabi_attribute 28
888; CORTEX-M0PLUS-NOT:  .eabi_attribute 36
889; CORTEX-M0PLUS:  .eabi_attribute 38, 1
890; CORTEX-M0PLUS-NOT:  .eabi_attribute 42
891; CORTEX-M0PLUS-NOT:  .eabi_attribute 44
892; CORTEX-M0PLUS-NOT:  .eabi_attribute 68
893
894; CORTEX-M0PLUS-FAST-NOT:   .eabi_attribute 19
895;; Despite the M0+ CPU having no FPU in this scenario, we chose to
896;; flush to positive zero here. There's no hardware support doing
897;; this, but the fast maths software library might and such behaviour
898;; would match hardware support on this architecture revision if it
899;; existed.
900; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 20
901; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 21
902; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 22
903; CORTEX-M0PLUS-FAST:  .eabi_attribute 23, 1
904
905; CORTEX-M1:  .cpu cortex-m1
906; CORTEX-M1:  .eabi_attribute 6, 12
907; CORTEX-M1-NOT:  .eabi_attribute 7
908; CORTEX-M1:  .eabi_attribute 8, 0
909; CORTEX-M1:  .eabi_attribute 9, 1
910; CORTEX-M1-NOT:   .eabi_attribute 19
911;; We default to IEEE 754 compliance
912; CORTEX-M1:  .eabi_attribute 20, 1
913; CORTEX-M1:  .eabi_attribute 21, 1
914; CORTEX-M1-NOT:  .eabi_attribute 22
915; CORTEX-M1:  .eabi_attribute 23, 3
916; CORTEX-M1:  .eabi_attribute 24, 1
917; CORTEX-M1:  .eabi_attribute 25, 1
918; CORTEX-M1-NOT:  .eabi_attribute 27
919; CORTEX-M1-NOT:  .eabi_attribute 28
920; CORTEX-M1-NOT:  .eabi_attribute 36
921; CORTEX-M1:  .eabi_attribute 38, 1
922; CORTEX-M1-NOT:  .eabi_attribute 42
923; CORTEX-M1-NOT:  .eabi_attribute 44
924; CORTEX-M1-NOT:  .eabi_attribute 68
925
926; CORTEX-M1-FAST-NOT:   .eabi_attribute 19
927;; Despite the M1 CPU having no FPU in this scenario, we chose to
928;; flush to positive zero here. There's no hardware support doing
929;; this, but the fast maths software library might and such behaviour
930;; would match hardware support on this architecture revision if it
931;; existed.
932; CORTEX-M1-FAST-NOT:  .eabi_attribute 20
933; CORTEX-M1-FAST-NOT:  .eabi_attribute 21
934; CORTEX-M1-FAST-NOT:  .eabi_attribute 22
935; CORTEX-M1-FAST:  .eabi_attribute 23, 1
936
937; SC000:  .cpu sc000
938; SC000:  .eabi_attribute 6, 12
939; SC000-NOT:  .eabi_attribute 7
940; SC000:  .eabi_attribute 8, 0
941; SC000:  .eabi_attribute 9, 1
942; SC000-NOT:   .eabi_attribute 19
943;; We default to IEEE 754 compliance
944; SC000:  .eabi_attribute 20, 1
945; SC000:  .eabi_attribute 21, 1
946; SC000-NOT:  .eabi_attribute 22
947; SC000:  .eabi_attribute 23, 3
948; SC000:  .eabi_attribute 24, 1
949; SC000:  .eabi_attribute 25, 1
950; SC000-NOT:  .eabi_attribute 27
951; SC000-NOT:  .eabi_attribute 28
952; SC000-NOT:  .eabi_attribute 36
953; SC000:  .eabi_attribute 38, 1
954; SC000-NOT:  .eabi_attribute 42
955; SC000-NOT:  .eabi_attribute 44
956; SC000-NOT:  .eabi_attribute 68
957
958; SC000-FAST-NOT:   .eabi_attribute 19
959;; Despite the SC000 CPU having no FPU in this scenario, we chose to
960;; flush to positive zero here. There's no hardware support doing
961;; this, but the fast maths software library might and such behaviour
962;; would match hardware support on this architecture revision if it
963;; existed.
964; SC000-FAST-NOT:  .eabi_attribute 20
965; SC000-FAST-NOT:  .eabi_attribute 21
966; SC000-FAST-NOT:  .eabi_attribute 22
967; SC000-FAST:  .eabi_attribute 23, 1
968
969; CORTEX-M3:  .cpu cortex-m3
970; CORTEX-M3:  .eabi_attribute 6, 10
971; CORTEX-M3:  .eabi_attribute 7, 77
972; CORTEX-M3:  .eabi_attribute 8, 0
973; CORTEX-M3:  .eabi_attribute 9, 2
974; CORTEX-M3-NOT:   .eabi_attribute 19
975;; We default to IEEE 754 compliance
976; CORTEX-M3:  .eabi_attribute 20, 1
977; CORTEX-M3:  .eabi_attribute 21, 1
978; CORTEX-M3-NOT:  .eabi_attribute 22
979; CORTEX-M3:  .eabi_attribute 23, 3
980; CORTEX-M3:  .eabi_attribute 24, 1
981; CORTEX-M3:  .eabi_attribute 25, 1
982; CORTEX-M3-NOT:  .eabi_attribute 27
983; CORTEX-M3-NOT:  .eabi_attribute 28
984; CORTEX-M3-NOT:  .eabi_attribute 36
985; CORTEX-M3:  .eabi_attribute 38, 1
986; CORTEX-M3-NOT:  .eabi_attribute 42
987; CORTEX-M3-NOT:  .eabi_attribute 44
988; CORTEX-M3-NOT:  .eabi_attribute 68
989
990; CORTEX-M3-FAST-NOT:   .eabi_attribute 19
991;; Despite there being no FPU, we chose to flush to zero preserving
992;; sign. This matches what the hardware would do for this architecture
993;; revision.
994; CORTEX-M3-FAST:  .eabi_attribute 20, 2
995; CORTEX-M3-FAST-NOT:  .eabi_attribute 21
996; CORTEX-M3-FAST-NOT:  .eabi_attribute 22
997; CORTEX-M3-FAST:  .eabi_attribute 23, 1
998
999; SC300:  .cpu sc300
1000; SC300:  .eabi_attribute 6, 10
1001; SC300:  .eabi_attribute 7, 77
1002; SC300:  .eabi_attribute 8, 0
1003; SC300:  .eabi_attribute 9, 2
1004; SC300-NOT:   .eabi_attribute 19
1005;; We default to IEEE 754 compliance
1006; SC300:  .eabi_attribute 20, 1
1007; SC300:  .eabi_attribute 21, 1
1008; SC300-NOT:  .eabi_attribute 22
1009; SC300:  .eabi_attribute 23, 3
1010; SC300:  .eabi_attribute 24, 1
1011; SC300:  .eabi_attribute 25, 1
1012; SC300-NOT:  .eabi_attribute 27
1013; SC300-NOT:  .eabi_attribute 28
1014; SC300-NOT:  .eabi_attribute 36
1015; SC300:  .eabi_attribute 38, 1
1016; SC300-NOT:  .eabi_attribute 42
1017; SC300-NOT:  .eabi_attribute 44
1018; SC300-NOT:  .eabi_attribute 68
1019
1020; SC300-FAST-NOT:   .eabi_attribute 19
1021;; Despite there being no FPU, we chose to flush to zero preserving
1022;; sign. This matches what the hardware would do for this architecture
1023;; revision.
1024; SC300-FAST:  .eabi_attribute 20, 2
1025; SC300-FAST-NOT:  .eabi_attribute 21
1026; SC300-FAST-NOT:  .eabi_attribute 22
1027; SC300-FAST:  .eabi_attribute 23, 1
1028
1029; CORTEX-M4-SOFT:  .cpu cortex-m4
1030; CORTEX-M4-SOFT:  .eabi_attribute 6, 13
1031; CORTEX-M4-SOFT:  .eabi_attribute 7, 77
1032; CORTEX-M4-SOFT:  .eabi_attribute 8, 0
1033; CORTEX-M4-SOFT:  .eabi_attribute 9, 2
1034; CORTEX-M4-SOFT:  .fpu fpv4-sp-d16
1035; CORTEX-M4-SOFT-NOT:   .eabi_attribute 19
1036;; We default to IEEE 754 compliance
1037; CORTEX-M4-SOFT:  .eabi_attribute 20, 1
1038; CORTEX-M4-SOFT:  .eabi_attribute 21, 1
1039; CORTEX-M4-SOFT-NOT:  .eabi_attribute 22
1040; CORTEX-M4-SOFT:  .eabi_attribute 23, 3
1041; CORTEX-M4-SOFT:  .eabi_attribute 24, 1
1042; CORTEX-M4-SOFT:  .eabi_attribute 25, 1
1043; CORTEX-M4-SOFT:  .eabi_attribute 27, 1
1044; CORTEX-M4-SOFT-NOT:  .eabi_attribute 28
1045; CORTEX-M4-SOFT:  .eabi_attribute 36, 1
1046; CORTEX-M4-SOFT:  .eabi_attribute 38, 1
1047; CORTEX-M4-SOFT-NOT:  .eabi_attribute 42
1048; CORTEX-M4-SOFT-NOT:  .eabi_attribute 44
1049; CORTEX-M4-SOFT-NOT:  .eabi_attribute 68
1050
1051; CORTEX-M4-SOFT-FAST-NOT:   .eabi_attribute 19
1052;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1053;; -ffast-math is specified.
1054; CORTEX-M4-SOFT-FAST:  .eabi_attribute 20, 2
1055; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 21
1056; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 22
1057; CORTEX-M4-SOFT-FAST:  .eabi_attribute 23, 1
1058
1059; CORTEX-M4-HARD:  .cpu cortex-m4
1060; CORTEX-M4-HARD:  .eabi_attribute 6, 13
1061; CORTEX-M4-HARD:  .eabi_attribute 7, 77
1062; CORTEX-M4-HARD:  .eabi_attribute 8, 0
1063; CORTEX-M4-HARD:  .eabi_attribute 9, 2
1064; CORTEX-M4-HARD:  .fpu fpv4-sp-d16
1065; CORTEX-M4-HARD-NOT:   .eabi_attribute 19
1066;; We default to IEEE 754 compliance
1067; CORTEX-M4-HARD:  .eabi_attribute 20, 1
1068; CORTEX-M4-HARD:  .eabi_attribute 21, 1
1069; CORTEX-M4-HARD-NOT:  .eabi_attribute 22
1070; CORTEX-M4-HARD:  .eabi_attribute 23, 3
1071; CORTEX-M4-HARD:  .eabi_attribute 24, 1
1072; CORTEX-M4-HARD:  .eabi_attribute 25, 1
1073; CORTEX-M4-HARD:  .eabi_attribute 27, 1
1074; CORTEX-M4-HARD:  .eabi_attribute 28, 1
1075; CORTEX-M4-HARD:  .eabi_attribute 36, 1
1076; CORTEX-M4-HARD:  .eabi_attribute 38, 1
1077; CORTEX-M4-HARD-NOT:  .eabi_attribute 42
1078; CORTEX-M4-HARD-NOT:  .eabi_attribute 44
1079; CORTEX-M4-HARD-NOT:  .eabi_attribute 68
1080
1081; CORTEX-M4-HARD-FAST-NOT:   .eabi_attribute 19
1082;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1083;; -ffast-math is specified.
1084; CORTEX-M4-HARD-FAST:  .eabi_attribute 20, 2
1085; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 21
1086; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 22
1087; CORTEX-M4-HARD-FAST:  .eabi_attribute 23, 1
1088
1089; CORTEX-M7:  .cpu    cortex-m7
1090; CORTEX-M7:  .eabi_attribute 6, 13
1091; CORTEX-M7:  .eabi_attribute 7, 77
1092; CORTEX-M7:  .eabi_attribute 8, 0
1093; CORTEX-M7:  .eabi_attribute 9, 2
1094; CORTEX-M7-SOFT-NOT: .fpu
1095; CORTEX-M7-SINGLE:  .fpu fpv5-sp-d16
1096; CORTEX-M7-DOUBLE:  .fpu fpv5-d16
1097; CORTEX-M7:  .eabi_attribute 17, 1
1098; CORTEX-M7-NOT:   .eabi_attribute 19
1099;; We default to IEEE 754 compliance
1100; CORTEX-M7:  .eabi_attribute 20, 1
1101; CORTEX-M7:  .eabi_attribute 21, 1
1102; CORTEX-M7-NOT:  .eabi_attribute 22
1103; CORTEX-M7:  .eabi_attribute 23, 3
1104; CORTEX-M7:  .eabi_attribute 24, 1
1105; CORTEX-M7:  .eabi_attribute 25, 1
1106; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
1107; CORTEX-M7-SINGLE:  .eabi_attribute 27, 1
1108; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
1109; CORTEX-M7:  .eabi_attribute 36, 1
1110; CORTEX-M7:  .eabi_attribute 38, 1
1111; CORTEX-M7-NOT:  .eabi_attribute 44
1112; CORTEX-M7:  .eabi_attribute 14, 0
1113
1114; CORTEX-M7-NOFPU-FAST-NOT:   .eabi_attribute 19
1115;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1116; CORTEX-M7-FAST:  .eabi_attribute 20, 2
1117;; Despite there being no FPU, we chose to flush to zero preserving
1118;; sign. This matches what the hardware would do for this architecture
1119;; revision.
1120; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
1121; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 21
1122; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 22
1123; CORTEX-M7-NOFPU-FAST:  .eabi_attribute 23, 1
1124
1125; CORTEX-R4:  .cpu cortex-r4
1126; CORTEX-R4:  .eabi_attribute 6, 10
1127; CORTEX-R4:  .eabi_attribute 7, 82
1128; CORTEX-R4:  .eabi_attribute 8, 1
1129; CORTEX-R4:  .eabi_attribute 9, 2
1130; CORTEX-R4-NOT:  .fpu vfpv3-d16
1131; CORTEX-R4-NOT:   .eabi_attribute 19
1132;; We default to IEEE 754 compliance
1133; CORTEX-R4:  .eabi_attribute 20, 1
1134; CORTEX-R4:  .eabi_attribute 21, 1
1135; CORTEX-R4-NOT:  .eabi_attribute 22
1136; CORTEX-R4:  .eabi_attribute 23, 3
1137; CORTEX-R4:  .eabi_attribute 24, 1
1138; CORTEX-R4:  .eabi_attribute 25, 1
1139; CORTEX-R4-NOT:  .eabi_attribute 28
1140; CORTEX-R4-NOT:  .eabi_attribute 36
1141; CORTEX-R4:  .eabi_attribute 38, 1
1142; CORTEX-R4-NOT:  .eabi_attribute 42
1143; CORTEX-R4-NOT:  .eabi_attribute 44
1144; CORTEX-R4-NOT:  .eabi_attribute 68
1145
1146; CORTEX-R4F:  .cpu cortex-r4f
1147; CORTEX-R4F:  .eabi_attribute 6, 10
1148; CORTEX-R4F:  .eabi_attribute 7, 82
1149; CORTEX-R4F:  .eabi_attribute 8, 1
1150; CORTEX-R4F:  .eabi_attribute 9, 2
1151; CORTEX-R4F:  .fpu vfpv3-d16
1152; CORTEX-R4F-NOT:   .eabi_attribute 19
1153;; We default to IEEE 754 compliance
1154; CORTEX-R4F:  .eabi_attribute 20, 1
1155; CORTEX-R4F:  .eabi_attribute 21, 1
1156; CORTEX-R4F-NOT:  .eabi_attribute 22
1157; CORTEX-R4F:  .eabi_attribute 23, 3
1158; CORTEX-R4F:  .eabi_attribute 24, 1
1159; CORTEX-R4F:  .eabi_attribute 25, 1
1160; CORTEX-R4F-NOT:  .eabi_attribute 27, 1
1161; CORTEX-R4F-NOT:  .eabi_attribute 28
1162; CORTEX-R4F-NOT:  .eabi_attribute 36
1163; CORTEX-R4F:  .eabi_attribute 38, 1
1164; CORTEX-R4F-NOT:  .eabi_attribute 42
1165; CORTEX-R4F-NOT:  .eabi_attribute 44
1166; CORTEX-R4F-NOT:  .eabi_attribute 68
1167
1168; CORTEX-R5:  .cpu cortex-r5
1169; CORTEX-R5:  .eabi_attribute 6, 10
1170; CORTEX-R5:  .eabi_attribute 7, 82
1171; CORTEX-R5:  .eabi_attribute 8, 1
1172; CORTEX-R5:  .eabi_attribute 9, 2
1173; CORTEX-R5:  .fpu vfpv3-d16
1174; CORTEX-R5-NOT:   .eabi_attribute 19
1175;; We default to IEEE 754 compliance
1176; CORTEX-R5:  .eabi_attribute 20, 1
1177; CORTEX-R5:  .eabi_attribute 21, 1
1178; CORTEX-R5-NOT:  .eabi_attribute 22
1179; CORTEX-R5:  .eabi_attribute 23, 3
1180; CORTEX-R5:  .eabi_attribute 24, 1
1181; CORTEX-R5:  .eabi_attribute 25, 1
1182; CORTEX-R5-NOT:  .eabi_attribute 27, 1
1183; CORTEX-R5-NOT:  .eabi_attribute 28
1184; CORTEX-R5-NOT:  .eabi_attribute 36
1185; CORTEX-R5:  .eabi_attribute 38, 1
1186; CORTEX-R5-NOT:  .eabi_attribute 42
1187; CORTEX-R5:  .eabi_attribute 44, 2
1188; CORTEX-R5-NOT:  .eabi_attribute 68
1189
1190; CORTEX-R5-FAST-NOT:   .eabi_attribute 19
1191;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
1192; CORTEX-R5-FAST:  .eabi_attribute 20, 2
1193; CORTEX-R5-FAST-NOT:  .eabi_attribute 21
1194; CORTEX-R5-FAST-NOT:  .eabi_attribute 22
1195; CORTEX-R5-FAST:  .eabi_attribute 23, 1
1196
1197; CORTEX-R7:  .cpu cortex-r7
1198; CORTEX-R7:  .eabi_attribute 6, 10
1199; CORTEX-R7:  .eabi_attribute 7, 82
1200; CORTEX-R7:  .eabi_attribute 8, 1
1201; CORTEX-R7:  .eabi_attribute 9, 2
1202; CORTEX-R7:  .fpu vfpv3-d16-fp16
1203; CORTEX-R7-NOT:   .eabi_attribute 19
1204;; We default to IEEE 754 compliance
1205; CORTEX-R7:  .eabi_attribute 20, 1
1206; CORTEX-R7:  .eabi_attribute 21, 1
1207; CORTEX-R7-NOT:  .eabi_attribute 22
1208; CORTEX-R7:  .eabi_attribute 23, 3
1209; CORTEX-R7:  .eabi_attribute 24, 1
1210; CORTEX-R7:  .eabi_attribute 25, 1
1211; CORTEX-R7-NOT:  .eabi_attribute 28
1212; CORTEX-R7:  .eabi_attribute 36, 1
1213; CORTEX-R7:  .eabi_attribute 38, 1
1214; CORTEX-R7:  .eabi_attribute 42, 1
1215; CORTEX-R7:  .eabi_attribute 44, 2
1216; CORTEX-R7-NOT:  .eabi_attribute 68
1217
1218; CORTEX-R7-FAST-NOT:   .eabi_attribute 19
1219;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
1220; CORTEX-R7-FAST:  .eabi_attribute 20, 2
1221; CORTEX-R7-FAST-NOT:  .eabi_attribute 21
1222; CORTEX-R7-FAST-NOT:  .eabi_attribute 22
1223; CORTEX-R7-FAST:  .eabi_attribute 23, 1
1224
1225; CORTEX-R8:  .cpu cortex-r8
1226; CORTEX-R8:  .eabi_attribute 6, 10
1227; CORTEX-R8:  .eabi_attribute 7, 82
1228; CORTEX-R8:  .eabi_attribute 8, 1
1229; CORTEX-R8:  .eabi_attribute 9, 2
1230; CORTEX-R8:  .fpu vfpv3-d16-fp16
1231; CORTEX-R8-NOT:   .eabi_attribute 19
1232;; We default to IEEE 754 compliance
1233; CORTEX-R8:  .eabi_attribute 20, 1
1234; CORTEX-R8:  .eabi_attribute 21, 1
1235; CORTEX-R8-NOT:  .eabi_attribute 22
1236; CORTEX-R8:  .eabi_attribute 23, 3
1237; CORTEX-R8:  .eabi_attribute 24, 1
1238; CORTEX-R8:  .eabi_attribute 25, 1
1239; CORTEX-R8-NOT:  .eabi_attribute 28
1240; CORTEX-R8:  .eabi_attribute 36, 1
1241; CORTEX-R8:  .eabi_attribute 38, 1
1242; CORTEX-R8:  .eabi_attribute 42, 1
1243; CORTEX-R8:  .eabi_attribute 44, 2
1244; CORTEX-R8-NOT:  .eabi_attribute 68
1245
1246; CORTEX-R8-FAST-NOT:   .eabi_attribute 19
1247;; The R8 has the VFPv3 FP unit, which always flushes preserving sign.
1248; CORTEX-R8-FAST:  .eabi_attribute 20, 2
1249; CORTEX-R8-FAST-NOT:  .eabi_attribute 21
1250; CORTEX-R8-FAST-NOT:  .eabi_attribute 22
1251; CORTEX-R8-FAST:  .eabi_attribute 23, 1
1252
1253; CORTEX-A32:  .cpu cortex-a32
1254; CORTEX-A32:  .eabi_attribute 6, 14
1255; CORTEX-A32:  .eabi_attribute 7, 65
1256; CORTEX-A32:  .eabi_attribute 8, 1
1257; CORTEX-A32:  .eabi_attribute 9, 2
1258; CORTEX-A32:  .fpu crypto-neon-fp-armv8
1259; CORTEX-A32:  .eabi_attribute 12, 3
1260; CORTEX-A32-NOT:   .eabi_attribute 19
1261;; We default to IEEE 754 compliance
1262; CORTEX-A32:  .eabi_attribute 20, 1
1263; CORTEX-A32:  .eabi_attribute 21, 1
1264; CORTEX-A32-NOT:  .eabi_attribute 22
1265; CORTEX-A32:  .eabi_attribute 23, 3
1266; CORTEX-A32:  .eabi_attribute 24, 1
1267; CORTEX-A32:  .eabi_attribute 25, 1
1268; CORTEX-A32-NOT:  .eabi_attribute 27
1269; CORTEX-A32-NOT:  .eabi_attribute 28
1270; CORTEX-A32:  .eabi_attribute 36, 1
1271; CORTEX-A32:  .eabi_attribute 38, 1
1272; CORTEX-A32:  .eabi_attribute 42, 1
1273; CORTEX-A32-NOT:  .eabi_attribute 44
1274; CORTEX-A32:  .eabi_attribute 68, 3
1275
1276; CORTEX-A32-FAST-NOT:   .eabi_attribute 19
1277;; The A32 has the ARMv8 FP unit, which always flushes preserving sign.
1278; CORTEX-A32-FAST:  .eabi_attribute 20, 2
1279; CORTEX-A32-FAST-NOT:  .eabi_attribute 21
1280; CORTEX-A32-FAST-NOT:  .eabi_attribute 22
1281; CORTEX-A32-FAST:  .eabi_attribute 23, 1
1282
1283; CORTEX-A35:  .cpu cortex-a35
1284; CORTEX-A35:  .eabi_attribute 6, 14
1285; CORTEX-A35:  .eabi_attribute 7, 65
1286; CORTEX-A35:  .eabi_attribute 8, 1
1287; CORTEX-A35:  .eabi_attribute 9, 2
1288; CORTEX-A35:  .fpu crypto-neon-fp-armv8
1289; CORTEX-A35:  .eabi_attribute 12, 3
1290; CORTEX-A35-NOT:   .eabi_attribute 19
1291;; We default to IEEE 754 compliance
1292; CORTEX-A35:  .eabi_attribute 20, 1
1293; CORTEX-A35:  .eabi_attribute 21, 1
1294; CORTEX-A35-NOT:  .eabi_attribute 22
1295; CORTEX-A35:  .eabi_attribute 23, 3
1296; CORTEX-A35:  .eabi_attribute 24, 1
1297; CORTEX-A35:  .eabi_attribute 25, 1
1298; CORTEX-A35-NOT:  .eabi_attribute 27
1299; CORTEX-A35-NOT:  .eabi_attribute 28
1300; CORTEX-A35:  .eabi_attribute 36, 1
1301; CORTEX-A35:  .eabi_attribute 38, 1
1302; CORTEX-A35:  .eabi_attribute 42, 1
1303; CORTEX-A35-NOT:  .eabi_attribute 44
1304; CORTEX-A35:  .eabi_attribute 68, 3
1305
1306; CORTEX-A35-FAST-NOT:   .eabi_attribute 19
1307;; The A35 has the ARMv8 FP unit, which always flushes preserving sign.
1308; CORTEX-A35-FAST:  .eabi_attribute 20, 2
1309; CORTEX-A35-FAST-NOT:  .eabi_attribute 21
1310; CORTEX-A35-FAST-NOT:  .eabi_attribute 22
1311; CORTEX-A35-FAST:  .eabi_attribute 23, 1
1312
1313; CORTEX-A53:  .cpu cortex-a53
1314; CORTEX-A53:  .eabi_attribute 6, 14
1315; CORTEX-A53:  .eabi_attribute 7, 65
1316; CORTEX-A53:  .eabi_attribute 8, 1
1317; CORTEX-A53:  .eabi_attribute 9, 2
1318; CORTEX-A53:  .fpu crypto-neon-fp-armv8
1319; CORTEX-A53:  .eabi_attribute 12, 3
1320; CORTEX-A53-NOT:   .eabi_attribute 19
1321;; We default to IEEE 754 compliance
1322; CORTEX-A53:  .eabi_attribute 20, 1
1323; CORTEX-A53:  .eabi_attribute 21, 1
1324; CORTEX-A53-NOT:  .eabi_attribute 22
1325; CORTEX-A53:  .eabi_attribute 23, 3
1326; CORTEX-A53:  .eabi_attribute 24, 1
1327; CORTEX-A53:  .eabi_attribute 25, 1
1328; CORTEX-A53-NOT:  .eabi_attribute 27
1329; CORTEX-A53-NOT:  .eabi_attribute 28
1330; CORTEX-A53:  .eabi_attribute 36, 1
1331; CORTEX-A53:  .eabi_attribute 38, 1
1332; CORTEX-A53:  .eabi_attribute 42, 1
1333; CORTEX-A53-NOT:  .eabi_attribute 44
1334; CORTEX-A53:  .eabi_attribute 68, 3
1335
1336; CORTEX-A53-FAST-NOT:   .eabi_attribute 19
1337;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1338; CORTEX-A53-FAST:  .eabi_attribute 20, 2
1339; CORTEX-A53-FAST-NOT:  .eabi_attribute 21
1340; CORTEX-A53-FAST-NOT:  .eabi_attribute 22
1341; CORTEX-A53-FAST:  .eabi_attribute 23, 1
1342
1343; CORTEX-A57:  .cpu cortex-a57
1344; CORTEX-A57:  .eabi_attribute 6, 14
1345; CORTEX-A57:  .eabi_attribute 7, 65
1346; CORTEX-A57:  .eabi_attribute 8, 1
1347; CORTEX-A57:  .eabi_attribute 9, 2
1348; CORTEX-A57:  .fpu crypto-neon-fp-armv8
1349; CORTEX-A57:  .eabi_attribute 12, 3
1350; CORTEX-A57-NOT:   .eabi_attribute 19
1351;; We default to IEEE 754 compliance
1352; CORTEX-A57:  .eabi_attribute 20, 1
1353; CORTEX-A57:  .eabi_attribute 21, 1
1354; CORTEX-A57-NOT:  .eabi_attribute 22
1355; CORTEX-A57:  .eabi_attribute 23, 3
1356; CORTEX-A57:  .eabi_attribute 24, 1
1357; CORTEX-A57:  .eabi_attribute 25, 1
1358; CORTEX-A57-NOT:  .eabi_attribute 27
1359; CORTEX-A57-NOT:  .eabi_attribute 28
1360; CORTEX-A57:  .eabi_attribute 36, 1
1361; CORTEX-A57:  .eabi_attribute 38, 1
1362; CORTEX-A57:  .eabi_attribute 42, 1
1363; CORTEX-A57-NOT:  .eabi_attribute 44
1364; CORTEX-A57:  .eabi_attribute 68, 3
1365
1366; CORTEX-A57-FAST-NOT:   .eabi_attribute 19
1367;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1368; CORTEX-A57-FAST:  .eabi_attribute 20, 2
1369; CORTEX-A57-FAST-NOT:  .eabi_attribute 21
1370; CORTEX-A57-FAST-NOT:  .eabi_attribute 22
1371; CORTEX-A57-FAST:  .eabi_attribute 23, 1
1372
1373; CORTEX-A72:  .cpu cortex-a72
1374; CORTEX-A72:  .eabi_attribute 6, 14
1375; CORTEX-A72:  .eabi_attribute 7, 65
1376; CORTEX-A72:  .eabi_attribute 8, 1
1377; CORTEX-A72:  .eabi_attribute 9, 2
1378; CORTEX-A72:  .fpu crypto-neon-fp-armv8
1379; CORTEX-A72:  .eabi_attribute 12, 3
1380; CORTEX-A72-NOT:   .eabi_attribute 19
1381;; We default to IEEE 754 compliance
1382; CORTEX-A72:  .eabi_attribute 20, 1
1383; CORTEX-A72:  .eabi_attribute 21, 1
1384; CORTEX-A72-NOT:  .eabi_attribute 22
1385; CORTEX-A72:  .eabi_attribute 23, 3
1386; CORTEX-A72:  .eabi_attribute 24, 1
1387; CORTEX-A72:  .eabi_attribute 25, 1
1388; CORTEX-A72-NOT:  .eabi_attribute 27
1389; CORTEX-A72-NOT:  .eabi_attribute 28
1390; CORTEX-A72:  .eabi_attribute 36, 1
1391; CORTEX-A72:  .eabi_attribute 38, 1
1392; CORTEX-A72:  .eabi_attribute 42, 1
1393; CORTEX-A72-NOT:  .eabi_attribute 44
1394; CORTEX-A72:  .eabi_attribute 68, 3
1395
1396; CORTEX-A72-FAST-NOT:   .eabi_attribute 19
1397;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1398; CORTEX-A72-FAST:  .eabi_attribute 20, 2
1399; CORTEX-A72-FAST-NOT:  .eabi_attribute 21
1400; CORTEX-A72-FAST-NOT:  .eabi_attribute 22
1401; CORTEX-A72-FAST:  .eabi_attribute 23, 1
1402
1403; EXYNOS-M1:  .cpu exynos-m1
1404; EXYNOS-M1:  .eabi_attribute 6, 14
1405; EXYNOS-M1:  .eabi_attribute 7, 65
1406; EXYNOS-M1:  .eabi_attribute 8, 1
1407; EXYNOS-M1:  .eabi_attribute 9, 2
1408; EXYNOS-M1:  .fpu crypto-neon-fp-armv8
1409; EXYNOS-M1:  .eabi_attribute 12, 3
1410; EXYNOS-M1-NOT:   .eabi_attribute 19
1411;; We default to IEEE 754 compliance
1412; EXYNOS-M1:  .eabi_attribute 20, 1
1413; EXYNOS-M1:  .eabi_attribute 21, 1
1414; EXYNOS-M1-NOT:  .eabi_attribute 22
1415; EXYNOS-M1:  .eabi_attribute 23, 3
1416; EXYNOS-M1:  .eabi_attribute 24, 1
1417; EXYNOS-M1:  .eabi_attribute 25, 1
1418; EXYNOS-M1-NOT:  .eabi_attribute 27
1419; EXYNOS-M1-NOT:  .eabi_attribute 28
1420; EXYNOS-M1:  .eabi_attribute 36, 1
1421; EXYNOS-M1:  .eabi_attribute 38, 1
1422; EXYNOS-M1:  .eabi_attribute 42, 1
1423; EXYNOS-M1-NOT:  .eabi_attribute 44
1424; EXYNOS-M15:  .eabi_attribute 68, 3
1425
1426; EXYNOS-M1-FAST-NOT:   .eabi_attribute 19
1427;; The exynos-m1 has the ARMv8 FP unit, which always flushes preserving sign.
1428; EXYNOS-M1-FAST:  .eabi_attribute 20, 2
1429; EXYNOS-M1-FAST-NOT:  .eabi_attribute 21
1430; EXYNOS-M1-FAST-NOT:  .eabi_attribute 22
1431; EXYNOS-M1-FAST:  .eabi_attribute 23, 1
1432
1433; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
1434; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
1435; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
1436; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16
1437; GENERIC-FPU-NEON-FP16: .fpu neon-fp16
1438
1439; GENERIC-ARMV8_1-A:  .eabi_attribute 6, 14
1440; GENERIC-ARMV8_1-A:  .eabi_attribute 7, 65
1441; GENERIC-ARMV8_1-A:  .eabi_attribute 8, 1
1442; GENERIC-ARMV8_1-A:  .eabi_attribute 9, 2
1443; GENERIC-ARMV8_1-A:  .fpu crypto-neon-fp-armv8
1444; GENERIC-ARMV8_1-A:  .eabi_attribute 12, 4
1445; GENERIC-ARMV8_1-A-NOT:   .eabi_attribute 19
1446;; We default to IEEE 754 compliance
1447; GENERIC-ARMV8_1-A:  .eabi_attribute 20, 1
1448; GENERIC-ARMV8_1-A:  .eabi_attribute 21, 1
1449; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 22
1450; GENERIC-ARMV8_1-A:  .eabi_attribute 23, 3
1451; GENERIC-ARMV8_1-A:  .eabi_attribute 24, 1
1452; GENERIC-ARMV8_1-A:  .eabi_attribute 25, 1
1453; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 27
1454; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 28
1455; GENERIC-ARMV8_1-A:  .eabi_attribute 36, 1
1456; GENERIC-ARMV8_1-A:  .eabi_attribute 38, 1
1457; GENERIC-ARMV8_1-A:  .eabi_attribute 42, 1
1458; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 44
1459; GENERIC-ARMV8_1-A:  .eabi_attribute 68, 3
1460
1461; GENERIC-ARMV8_1-A-FAST-NOT:   .eabi_attribute 19
1462;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign.
1463; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 20, 2
1464; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 21
1465; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 22
1466; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 23, 1
1467
1468; RELOC-PIC:  .eabi_attribute 15, 1
1469; RELOC-PIC:  .eabi_attribute 16, 1
1470; RELOC-PIC:  .eabi_attribute 17, 2
1471; RELOC-OTHER:  .eabi_attribute 17, 1
1472
1473; PCS-R9-USE:  .eabi_attribute 14, 0
1474; PCS-R9-RESERVE:  .eabi_attribute 14, 3
1475
1476define i32 @f(i64 %z) {
1477    ret i32 0
1478}
1479