xref: /llvm-project/llvm/test/CodeGen/ARM/build-attributes.ll (revision 843164242e99a8377ac04212654531eb2b68ca99) 
1; This tests that MC/asm header conversion is smooth and that the
2; build attributes are correct
3
4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE
5; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6
6; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST
7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S
13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast  | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST
17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
20; RUN: llc < %s -mtriple=armv7-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST
21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
22; RUN: llc < %s -mtriple=armv8-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST
23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
30; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE
31; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE
32; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP
33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-SOFT-FAST
41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A8-HARD
42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-HARD-FAST
43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
54; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
57; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST
58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
60; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST
61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
62; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
63
64; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16
65; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16
66; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD
67; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16
68; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16
69
70; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
71; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0
72; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
73; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
74; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0PLUS
75; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
76; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
77; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M1
78; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
79; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
80; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000
81; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
82; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
83; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
84; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
85; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
86; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
87; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
88; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
89; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
90; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
91; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
92; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
93; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
94; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
95; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
96; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
97; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
98; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
99; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
100; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
101; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
102; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
103; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
104; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
105; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
106; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
107; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
108; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8
109; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST
110; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
111; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35
112; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST
113; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
114; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
115; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
116; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
117; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
118; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST
119; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
120; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
121; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
122; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
123; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
124; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=EXYNOS-M1
125; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
126; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
127; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
128; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
129; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s  --check-prefix=CORTEX-A7-CHECK
130; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s  --check-prefix=CORTEX-A7-CHECK-FAST
131; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
132; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
133; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
134; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
135; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
136; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
137; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
138; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
139; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=default | FileCheck %s --check-prefix=RELOC-OTHER
140; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
141; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER
142; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE
143; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE
144
145; ARMv8.1a (AArch32)
146; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
147; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
148; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
149; ARMv8a (AArch32)
150; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
151; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
152; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
153; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
154; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
155; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
156; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
157; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
158
159; ARMv7a
160; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
161; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
162; ARMv7r
163; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
164; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
165; ARMv7m
166; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
167; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
168; ARMv6
169; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
170; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
171; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
172; ARMv6k
173; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
174; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
175; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
176; ARMv6m
177; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
178; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
179; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
180; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
181; ARMv5
182; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN
183; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
184
185; XSCALE:      .eabi_attribute 6, 5
186; XSCALE:      .eabi_attribute 8, 1
187; XSCALE:      .eabi_attribute 9, 1
188
189; DYN-ROUNDING: .eabi_attribute 19, 1
190
191; V6:   .eabi_attribute 6, 6
192; V6:   .eabi_attribute 8, 1
193;; We assume round-to-nearest by default (matches GCC)
194; V6-NOT:   .eabi_attribute 19
195;; The default choice made by llc is for a V6 CPU without an FPU.
196;; This is not an interesting detail, but for such CPUs, the default intention is to use
197;; software floating-point support. The choice is not important for targets without
198;; FPU support!
199; V6:   .eabi_attribute 20, 1
200; V6:   .eabi_attribute 21, 1
201; V6-NOT:   .eabi_attribute 22
202; V6:   .eabi_attribute 23, 3
203; V6:   .eabi_attribute 24, 1
204; V6:   .eabi_attribute 25, 1
205; V6-NOT:   .eabi_attribute 27
206; V6-NOT:   .eabi_attribute 28
207; V6-NOT:    .eabi_attribute 36
208; V6:    .eabi_attribute 38, 1
209; V6-NOT:    .eabi_attribute 42
210; V6-NOT:  .eabi_attribute 44
211; V6-NOT:    .eabi_attribute 68
212
213; V6-FAST-NOT:   .eabi_attribute 19
214;; Despite the V6 CPU having no FPU by default, we chose to flush to
215;; positive zero here. There's no hardware support doing this, but the
216;; fast maths software library might.
217; V6-FAST-NOT:   .eabi_attribute 20
218; V6-FAST-NOT:   .eabi_attribute 21
219; V6-FAST-NOT:   .eabi_attribute 22
220; V6-FAST:   .eabi_attribute 23, 1
221
222;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for
223;; V6-M, however we don't model the OS extension so this is fine.
224; V6M:  .eabi_attribute 6, 12
225; V6M-NOT:  .eabi_attribute 7
226; V6M:  .eabi_attribute 8, 0
227; V6M:  .eabi_attribute 9, 1
228; V6M-NOT:   .eabi_attribute 19
229;; The default choice made by llc is for a V6M CPU without an FPU.
230;; This is not an interesting detail, but for such CPUs, the default intention is to use
231;; software floating-point support. The choice is not important for targets without
232;; FPU support!
233; V6M:  .eabi_attribute 20, 1
234; V6M:   .eabi_attribute 21, 1
235; V6M-NOT:   .eabi_attribute 22
236; V6M:   .eabi_attribute 23, 3
237; V6M:  .eabi_attribute 24, 1
238; V6M:  .eabi_attribute 25, 1
239; V6M-NOT:  .eabi_attribute 27
240; V6M-NOT:  .eabi_attribute 28
241; V6M-NOT:  .eabi_attribute 36
242; V6M:  .eabi_attribute 38, 1
243; V6M-NOT:  .eabi_attribute 42
244; V6M-NOT:  .eabi_attribute 44
245; V6M-NOT:  .eabi_attribute 68
246
247; V6M-FAST-NOT:   .eabi_attribute 19
248;; Despite the V6M CPU having no FPU by default, we chose to flush to
249;; positive zero here. There's no hardware support doing this, but the
250;; fast maths software library might.
251; V6M-FAST-NOT:  .eabi_attribute 20
252; V6M-FAST-NOT:   .eabi_attribute 21
253; V6M-FAST-NOT:   .eabi_attribute 22
254; V6M-FAST:   .eabi_attribute 23, 1
255
256; ARM1156T2F-S: .cpu arm1156t2f-s
257; ARM1156T2F-S: .eabi_attribute 6, 8
258; ARM1156T2F-S: .eabi_attribute 8, 1
259; ARM1156T2F-S: .eabi_attribute 9, 2
260; ARM1156T2F-S: .fpu vfpv2
261; ARM1156T2F-S-NOT:   .eabi_attribute 19
262;; We default to IEEE 754 compliance
263; ARM1156T2F-S: .eabi_attribute 20, 1
264; ARM1156T2F-S: .eabi_attribute 21, 1
265; ARM1156T2F-S-NOT: .eabi_attribute 22
266; ARM1156T2F-S: .eabi_attribute 23, 3
267; ARM1156T2F-S: .eabi_attribute 24, 1
268; ARM1156T2F-S: .eabi_attribute 25, 1
269; ARM1156T2F-S-NOT: .eabi_attribute 27
270; ARM1156T2F-S-NOT: .eabi_attribute 28
271; ARM1156T2F-S-NOT: .eabi_attribute 36
272; ARM1156T2F-S: .eabi_attribute 38, 1
273; ARM1156T2F-S-NOT:    .eabi_attribute 42
274; ARM1156T2F-S-NOT:    .eabi_attribute 44
275; ARM1156T2F-S-NOT:    .eabi_attribute 68
276
277; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 19
278;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
279;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
280;; select. LLVM historically picks 0.
281; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
282; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 21
283; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 22
284; ARM1156T2F-S-FAST:   .eabi_attribute 23, 1
285
286; V7M:  .eabi_attribute 6, 10
287; V7M:  .eabi_attribute 7, 77
288; V7M:  .eabi_attribute 8, 0
289; V7M:  .eabi_attribute 9, 2
290; V7M-NOT:   .eabi_attribute 19
291;; The default choice made by llc is for a V7M CPU without an FPU.
292;; This is not an interesting detail, but for such CPUs, the default intention is to use
293;; software floating-point support. The choice is not important for targets without
294;; FPU support!
295; V7M:  .eabi_attribute 20, 1
296; V7M: .eabi_attribute 21, 1
297; V7M-NOT: .eabi_attribute 22
298; V7M: .eabi_attribute 23, 3
299; V7M:  .eabi_attribute 24, 1
300; V7M:  .eabi_attribute 25, 1
301; V7M-NOT:  .eabi_attribute 27
302; V7M-NOT:  .eabi_attribute 28
303; V7M-NOT:  .eabi_attribute 36
304; V7M:  .eabi_attribute 38, 1
305; V7M-NOT:  .eabi_attribute 42
306; V7M-NOT:  .eabi_attribute 44
307; V7M-NOT:  .eabi_attribute 68
308
309; V7M-FAST-NOT:   .eabi_attribute 19
310;; Despite the V7M CPU having no FPU by default, we chose to flush
311;; preserving sign. This matches what the hardware would do in the
312;; architecture revision were to exist on the current target.
313; V7M-FAST:  .eabi_attribute 20, 2
314; V7M-FAST-NOT:   .eabi_attribute 21
315; V7M-FAST-NOT:   .eabi_attribute 22
316; V7M-FAST:   .eabi_attribute 23, 1
317
318; V7:      .syntax unified
319; V7: .eabi_attribute 6, 10
320; V7-NOT:   .eabi_attribute 19
321;; In safe-maths mode we default to an IEEE 754 compliant choice.
322; V7: .eabi_attribute 20, 1
323; V7: .eabi_attribute 21, 1
324; V7-NOT: .eabi_attribute 22
325; V7: .eabi_attribute 23, 3
326; V7: .eabi_attribute 24, 1
327; V7: .eabi_attribute 25, 1
328; V7-NOT: .eabi_attribute 27
329; V7-NOT: .eabi_attribute 28
330; V7-NOT: .eabi_attribute 36
331; V7: .eabi_attribute 38, 1
332; V7-NOT:    .eabi_attribute 42
333; V7-NOT:    .eabi_attribute 44
334; V7-NOT:    .eabi_attribute 68
335
336; V7-FAST-NOT:   .eabi_attribute 19
337;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
338;; denormals to zero preserving the sign.
339; V7-FAST: .eabi_attribute 20, 2
340; V7-FAST-NOT:   .eabi_attribute 21
341; V7-FAST-NOT:   .eabi_attribute 22
342; V7-FAST:   .eabi_attribute 23, 1
343
344; V8:      .syntax unified
345; V8: .eabi_attribute 67, "2.09"
346; V8: .eabi_attribute 6, 14
347; V8-NOT:   .eabi_attribute 19
348; V8: .eabi_attribute 20, 1
349; V8: .eabi_attribute 21, 1
350; V8-NOT: .eabi_attribute 22
351; V8: .eabi_attribute 23, 3
352; V8-NOT: .eabi_attribute 44
353
354; V8-FAST-NOT:   .eabi_attribute 19
355;; The default does have an FPU, and for V8-A, it flushes preserving sign.
356; V8-FAST: .eabi_attribute 20, 2
357; V8-FAST-NOT: .eabi_attribute 21
358; V8-FAST-NOT: .eabi_attribute 22
359; V8-FAST: .eabi_attribute 23, 1
360
361; Vt8:     .syntax unified
362; Vt8: .eabi_attribute 6, 14
363; Vt8-NOT:   .eabi_attribute 19
364; Vt8: .eabi_attribute 20, 1
365; Vt8: .eabi_attribute 21, 1
366; Vt8-NOT: .eabi_attribute 22
367; Vt8: .eabi_attribute 23, 3
368
369; V8-FPARMv8:      .syntax unified
370; V8-FPARMv8: .eabi_attribute 6, 14
371; V8-FPARMv8: .fpu fp-armv8
372
373; V8-NEON:      .syntax unified
374; V8-NEON: .eabi_attribute 6, 14
375; V8-NEON: .fpu neon
376; V8-NEON: .eabi_attribute 12, 3
377
378; V8-FPARMv8-NEON:      .syntax unified
379; V8-FPARMv8-NEON: .eabi_attribute 6, 14
380; V8-FPARMv8-NEON: .fpu neon-fp-armv8
381; V8-FPARMv8-NEON: .eabi_attribute 12, 3
382
383; V8-FPARMv8-NEON-CRYPTO:      .syntax unified
384; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
385; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
386; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
387
388; V8MBASELINE: .syntax unified
389; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline
390; V8MBASELINE: .eabi_attribute 6, 16
391; '7' is Tag_CPU_arch_profile, '77' is 'M'
392; V8MBASELINE: .eabi_attribute 7, 77
393; '8' is Tag_ARM_ISA_use
394; V8MBASELINE: .eabi_attribute 8, 0
395; '9' is Tag_Thumb_ISA_use
396; V8MBASELINE: .eabi_attribute 9, 3
397
398; V8MMAINLINE: .syntax unified
399; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline
400; V8MMAINLINE: .eabi_attribute 6, 17
401; V8MMAINLINE: .eabi_attribute 7, 77
402; V8MMAINLINE: .eabi_attribute 8, 0
403; V8MMAINLINE: .eabi_attribute 9, 3
404; V8MMAINLINE_DSP-NOT: .eabi_attribute 46
405
406; V8MMAINLINE_DSP: .syntax unified
407; V8MBASELINE_DSP: .eabi_attribute 6, 17
408; V8MBASELINE_DSP: .eabi_attribute 7, 77
409; V8MMAINLINE_DSP: .eabi_attribute 8, 0
410; V8MMAINLINE_DSP: .eabi_attribute 9, 3
411; V8MMAINLINE_DSP: .eabi_attribute 46, 1
412
413; Tag_CPU_unaligned_access
414; NO-STRICT-ALIGN: .eabi_attribute 34, 1
415; STRICT-ALIGN: .eabi_attribute 34, 0
416
417; Tag_CPU_arch  'ARMv7'
418; CORTEX-A7-CHECK: .eabi_attribute      6, 10
419; CORTEX-A7-NOFPU: .eabi_attribute      6, 10
420
421; CORTEX-A7-FPUV4: .eabi_attribute      6, 10
422
423; Tag_CPU_arch_profile 'A'
424; CORTEX-A7-CHECK: .eabi_attribute      7, 65
425; CORTEX-A7-NOFPU: .eabi_attribute      7, 65
426; CORTEX-A7-FPUV4: .eabi_attribute      7, 65
427
428; Tag_ARM_ISA_use
429; CORTEX-A7-CHECK: .eabi_attribute      8, 1
430; CORTEX-A7-NOFPU: .eabi_attribute      8, 1
431; CORTEX-A7-FPUV4: .eabi_attribute      8, 1
432
433; Tag_THUMB_ISA_use
434; CORTEX-A7-CHECK: .eabi_attribute      9, 2
435; CORTEX-A7-NOFPU: .eabi_attribute      9, 2
436; CORTEX-A7-FPUV4: .eabi_attribute      9, 2
437
438; CORTEX-A7-CHECK: .fpu neon-vfpv4
439; CORTEX-A7-NOFPU-NOT: .fpu
440; CORTEX-A7-FPUV4: .fpu vfpv4
441
442; CORTEX-A7-CHECK-NOT:   .eabi_attribute 19
443; Tag_ABI_FP_denormal
444;; We default to IEEE 754 compliance
445; CORTEX-A7-CHECK: .eabi_attribute      20, 1
446;; The A7 has VFPv3 support by default, so flush preserving sign.
447; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
448; CORTEX-A7-NOFPU: .eabi_attribute      20, 1
449;; Despite there being no FPU, we chose to flush to zero preserving
450;; sign. This matches what the hardware would do for this architecture
451;; revision.
452; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
453; CORTEX-A7-FPUV4: .eabi_attribute      20, 1
454;; The VFPv4 FPU flushes preserving sign.
455; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
456
457; Tag_ABI_FP_exceptions
458; CORTEX-A7-CHECK: .eabi_attribute      21, 1
459; CORTEX-A7-NOFPU: .eabi_attribute      21, 1
460; CORTEX-A7-FPUV4: .eabi_attribute      21, 1
461
462; Tag_ABI_FP_user_exceptions
463; CORTEX-A7-CHECK-NOT: .eabi_attribute      22
464; CORTEX-A7-NOFPU-NOT: .eabi_attribute      22
465; CORTEX-A7-FPUV4-NOT: .eabi_attribute      22
466
467; Tag_ABI_FP_number_model
468; CORTEX-A7-CHECK: .eabi_attribute      23, 3
469; CORTEX-A7-NOFPU: .eabi_attribute      23, 3
470; CORTEX-A7-FPUV4: .eabi_attribute      23, 3
471
472; Tag_ABI_align_needed
473; CORTEX-A7-CHECK: .eabi_attribute      24, 1
474; CORTEX-A7-NOFPU: .eabi_attribute      24, 1
475; CORTEX-A7-FPUV4: .eabi_attribute      24, 1
476
477; Tag_ABI_align_preserved
478; CORTEX-A7-CHECK: .eabi_attribute      25, 1
479; CORTEX-A7-NOFPU: .eabi_attribute      25, 1
480; CORTEX-A7-FPUV4: .eabi_attribute      25, 1
481
482; Tag_FP_HP_extension
483; CORTEX-A7-CHECK: .eabi_attribute      36, 1
484; CORTEX-A7-NOFPU-NOT: .eabi_attribute  36
485; CORTEX-A7-FPUV4: .eabi_attribute      36, 1
486
487; Tag_FP_16bit_format
488; CORTEX-A7-CHECK: .eabi_attribute      38, 1
489; CORTEX-A7-NOFPU: .eabi_attribute      38, 1
490; CORTEX-A7-FPUV4: .eabi_attribute      38, 1
491
492; Tag_MPextension_use
493; CORTEX-A7-CHECK: .eabi_attribute      42, 1
494; CORTEX-A7-NOFPU: .eabi_attribute      42, 1
495; CORTEX-A7-FPUV4: .eabi_attribute      42, 1
496
497; Tag_DIV_use
498; CORTEX-A7-CHECK: .eabi_attribute      44, 2
499; CORTEX-A7-NOFPU: .eabi_attribute      44, 2
500; CORTEX-A7-FPUV4: .eabi_attribute      44, 2
501
502; Tag_DSP_extension
503; CORTEX-A7-CHECK-NOT: .eabi_attribute      46
504
505; Tag_Virtualization_use
506; CORTEX-A7-CHECK: .eabi_attribute      68, 3
507; CORTEX-A7-NOFPU: .eabi_attribute      68, 3
508; CORTEX-A7-FPUV4: .eabi_attribute      68, 3
509
510; CORTEX-A5-DEFAULT:        .cpu    cortex-a5
511; CORTEX-A5-DEFAULT:        .eabi_attribute 6, 10
512; CORTEX-A5-DEFAULT:        .eabi_attribute 7, 65
513; CORTEX-A5-DEFAULT:        .eabi_attribute 8, 1
514; CORTEX-A5-DEFAULT:        .eabi_attribute 9, 2
515; CORTEX-A5-DEFAULT:        .fpu    neon-vfpv4
516; CORTEX-A5-NOT:   .eabi_attribute 19
517;; We default to IEEE 754 compliance
518; CORTEX-A5-DEFAULT:        .eabi_attribute 20, 1
519; CORTEX-A5-DEFAULT:        .eabi_attribute 21, 1
520; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 22
521; CORTEX-A5-DEFAULT:        .eabi_attribute 23, 3
522; CORTEX-A5-DEFAULT:        .eabi_attribute 24, 1
523; CORTEX-A5-DEFAULT:        .eabi_attribute 25, 1
524; CORTEX-A5-DEFAULT:        .eabi_attribute 42, 1
525; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 44
526; CORTEX-A5-DEFAULT:        .eabi_attribute 68, 1
527
528; CORTEX-A5-DEFAULT-FAST-NOT:   .eabi_attribute 19
529;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math
530;; is given.
531; CORTEX-A5-DEFAULT-FAST:        .eabi_attribute 20, 2
532; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21
533; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22
534; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1
535
536; CORTEX-A5-NONEON:        .cpu    cortex-a5
537; CORTEX-A5-NONEON:        .eabi_attribute 6, 10
538; CORTEX-A5-NONEON:        .eabi_attribute 7, 65
539; CORTEX-A5-NONEON:        .eabi_attribute 8, 1
540; CORTEX-A5-NONEON:        .eabi_attribute 9, 2
541; CORTEX-A5-NONEON:        .fpu    vfpv4-d16
542;; We default to IEEE 754 compliance
543; CORTEX-A5-NONEON:        .eabi_attribute 20, 1
544; CORTEX-A5-NONEON:        .eabi_attribute 21, 1
545; CORTEX-A5-NONEON-NOT:    .eabi_attribute 22
546; CORTEX-A5-NONEON:        .eabi_attribute 23, 3
547; CORTEX-A5-NONEON:        .eabi_attribute 24, 1
548; CORTEX-A5-NONEON:        .eabi_attribute 25, 1
549; CORTEX-A5-NONEON:        .eabi_attribute 42, 1
550; CORTEX-A5-NONEON:        .eabi_attribute 68, 1
551
552; CORTEX-A5-NONEON-FAST-NOT:   .eabi_attribute 19
553;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
554;; is given.
555; CORTEX-A5-NONEON-FAST:        .eabi_attribute 20, 2
556; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21
557; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22
558; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1
559
560; CORTEX-A5-NOFPU:        .cpu    cortex-a5
561; CORTEX-A5-NOFPU:        .eabi_attribute 6, 10
562; CORTEX-A5-NOFPU:        .eabi_attribute 7, 65
563; CORTEX-A5-NOFPU:        .eabi_attribute 8, 1
564; CORTEX-A5-NOFPU:        .eabi_attribute 9, 2
565; CORTEX-A5-NOFPU-NOT:    .fpu
566; CORTEX-A5-NOFPU-NOT:   .eabi_attribute 19
567;; We default to IEEE 754 compliance
568; CORTEX-A5-NOFPU:        .eabi_attribute 20, 1
569; CORTEX-A5-NOFPU:        .eabi_attribute 21, 1
570; CORTEX-A5-NOFPU-NOT:    .eabi_attribute 22
571; CORTEX-A5-NOFPU:        .eabi_attribute 23, 3
572; CORTEX-A5-NOFPU:        .eabi_attribute 24, 1
573; CORTEX-A5-NOFPU:        .eabi_attribute 25, 1
574; CORTEX-A5-NOFPU:        .eabi_attribute 42, 1
575; CORTEX-A5-NOFPU:        .eabi_attribute 68, 1
576
577; CORTEX-A5-NOFPU-FAST-NOT:   .eabi_attribute 19
578;; Despite there being no FPU, we chose to flush to zero preserving
579;; sign. This matches what the hardware would do for this architecture
580;; revision.
581; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
582; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21
583; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22
584; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1
585
586; CORTEX-A8-SOFT:  .cpu cortex-a8
587; CORTEX-A8-SOFT:  .eabi_attribute 6, 10
588; CORTEX-A8-SOFT:  .eabi_attribute 7, 65
589; CORTEX-A8-SOFT:  .eabi_attribute 8, 1
590; CORTEX-A8-SOFT:  .eabi_attribute 9, 2
591; CORTEX-A8-SOFT:  .fpu neon
592; CORTEX-A8-SOFT-NOT:   .eabi_attribute 19
593;; We default to IEEE 754 compliance
594; CORTEX-A8-SOFT:  .eabi_attribute 20, 1
595; CORTEX-A8-SOFT:  .eabi_attribute 21, 1
596; CORTEX-A8-SOFT-NOT:  .eabi_attribute 22
597; CORTEX-A8-SOFT:  .eabi_attribute 23, 3
598; CORTEX-A8-SOFT:  .eabi_attribute 24, 1
599; CORTEX-A8-SOFT:  .eabi_attribute 25, 1
600; CORTEX-A8-SOFT-NOT:  .eabi_attribute 27
601; CORTEX-A8-SOFT-NOT:  .eabi_attribute 28
602; CORTEX-A8-SOFT-NOT:  .eabi_attribute 36, 1
603; CORTEX-A8-SOFT:  .eabi_attribute 38, 1
604; CORTEX-A8-SOFT-NOT:  .eabi_attribute 42, 1
605; CORTEX-A8-SOFT-NOT:  .eabi_attribute 44
606; CORTEX-A8-SOFT:  .eabi_attribute 68, 1
607
608; CORTEX-A9-SOFT:  .cpu cortex-a9
609; CORTEX-A9-SOFT:  .eabi_attribute 6, 10
610; CORTEX-A9-SOFT:  .eabi_attribute 7, 65
611; CORTEX-A9-SOFT:  .eabi_attribute 8, 1
612; CORTEX-A9-SOFT:  .eabi_attribute 9, 2
613; CORTEX-A9-SOFT:  .fpu neon
614; CORTEX-A9-SOFT-NOT:   .eabi_attribute 19
615;; We default to IEEE 754 compliance
616; CORTEX-A9-SOFT:  .eabi_attribute 20, 1
617; CORTEX-A9-SOFT:  .eabi_attribute 21, 1
618; CORTEX-A9-SOFT-NOT:  .eabi_attribute 22
619; CORTEX-A9-SOFT:  .eabi_attribute 23, 3
620; CORTEX-A9-SOFT:  .eabi_attribute 24, 1
621; CORTEX-A9-SOFT:  .eabi_attribute 25, 1
622; CORTEX-A9-SOFT-NOT:  .eabi_attribute 27
623; CORTEX-A9-SOFT-NOT:  .eabi_attribute 28
624; CORTEX-A9-SOFT:  .eabi_attribute 36, 1
625; CORTEX-A9-SOFT:  .eabi_attribute 38, 1
626; CORTEX-A9-SOFT:  .eabi_attribute 42, 1
627; CORTEX-A9-SOFT-NOT:  .eabi_attribute 44
628; CORTEX-A9-SOFT:  .eabi_attribute 68, 1
629
630; CORTEX-A8-SOFT-FAST-NOT:   .eabi_attribute 19
631; CORTEX-A9-SOFT-FAST-NOT:   .eabi_attribute 19
632;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
633;; -ffast-math is specified.
634; CORTEX-A8-SOFT-FAST:  .eabi_attribute 20, 2
635; CORTEX-A9-SOFT-FAST:  .eabi_attribute 20, 2
636; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21
637; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22
638; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1
639
640; CORTEX-A8-HARD:  .cpu cortex-a8
641; CORTEX-A8-HARD:  .eabi_attribute 6, 10
642; CORTEX-A8-HARD:  .eabi_attribute 7, 65
643; CORTEX-A8-HARD:  .eabi_attribute 8, 1
644; CORTEX-A8-HARD:  .eabi_attribute 9, 2
645; CORTEX-A8-HARD:  .fpu neon
646; CORTEX-A8-HARD-NOT:   .eabi_attribute 19
647;; We default to IEEE 754 compliance
648; CORTEX-A8-HARD:  .eabi_attribute 20, 1
649; CORTEX-A8-HARD:  .eabi_attribute 21, 1
650; CORTEX-A8-HARD-NOT:  .eabi_attribute 22
651; CORTEX-A8-HARD:  .eabi_attribute 23, 3
652; CORTEX-A8-HARD:  .eabi_attribute 24, 1
653; CORTEX-A8-HARD:  .eabi_attribute 25, 1
654; CORTEX-A8-HARD-NOT:  .eabi_attribute 27
655; CORTEX-A8-HARD:  .eabi_attribute 28, 1
656; CORTEX-A8-HARD-NOT:  .eabi_attribute 36, 1
657; CORTEX-A8-HARD:  .eabi_attribute 38, 1
658; CORTEX-A8-HARD-NOT:  .eabi_attribute 42, 1
659; CORTEX-A8-HARD:  .eabi_attribute 68, 1
660
661
662
663; CORTEX-A9-HARD:  .cpu cortex-a9
664; CORTEX-A9-HARD:  .eabi_attribute 6, 10
665; CORTEX-A9-HARD:  .eabi_attribute 7, 65
666; CORTEX-A9-HARD:  .eabi_attribute 8, 1
667; CORTEX-A9-HARD:  .eabi_attribute 9, 2
668; CORTEX-A9-HARD:  .fpu neon
669; CORTEX-A9-HARD-NOT:   .eabi_attribute 19
670;; We default to IEEE 754 compliance
671; CORTEX-A9-HARD:  .eabi_attribute 20, 1
672; CORTEX-A9-HARD:  .eabi_attribute 21, 1
673; CORTEX-A9-HARD-NOT:  .eabi_attribute 22
674; CORTEX-A9-HARD:  .eabi_attribute 23, 3
675; CORTEX-A9-HARD:  .eabi_attribute 24, 1
676; CORTEX-A9-HARD:  .eabi_attribute 25, 1
677; CORTEX-A9-HARD-NOT:  .eabi_attribute 27
678; CORTEX-A9-HARD:  .eabi_attribute 28, 1
679; CORTEX-A9-HARD:  .eabi_attribute 36, 1
680; CORTEX-A9-HARD:  .eabi_attribute 38, 1
681; CORTEX-A9-HARD:  .eabi_attribute 42, 1
682; CORTEX-A9-HARD:  .eabi_attribute 68, 1
683
684; CORTEX-A8-HARD-FAST-NOT:   .eabi_attribute 19
685;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when
686;; -ffast-math is specified.
687; CORTEX-A8-HARD-FAST:  .eabi_attribute 20, 2
688; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 21
689; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 22
690; CORTEX-A8-HARD-FAST:  .eabi_attribute 23, 1
691
692; CORTEX-A9-HARD-FAST-NOT:   .eabi_attribute 19
693;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
694;; -ffast-math is specified.
695; CORTEX-A9-HARD-FAST:  .eabi_attribute 20, 2
696; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 21
697; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 22
698; CORTEX-A9-HARD-FAST:  .eabi_attribute 23, 1
699
700; CORTEX-A12-DEFAULT:  .cpu cortex-a12
701; CORTEX-A12-DEFAULT:  .eabi_attribute 6, 10
702; CORTEX-A12-DEFAULT:  .eabi_attribute 7, 65
703; CORTEX-A12-DEFAULT:  .eabi_attribute 8, 1
704; CORTEX-A12-DEFAULT:  .eabi_attribute 9, 2
705; CORTEX-A12-DEFAULT:  .fpu neon-vfpv4
706; CORTEX-A12-DEFAULT-NOT:   .eabi_attribute 19
707;; We default to IEEE 754 compliance
708; CORTEX-A12-DEFAULT:  .eabi_attribute 20, 1
709; CORTEX-A12-DEFAULT:  .eabi_attribute 21, 1
710; CORTEX-A12-DEFAULT-NOT:  .eabi_attribute 22
711; CORTEX-A12-DEFAULT:  .eabi_attribute 23, 3
712; CORTEX-A12-DEFAULT:  .eabi_attribute 24, 1
713; CORTEX-A12-DEFAULT:  .eabi_attribute 25, 1
714; CORTEX-A12-DEFAULT:  .eabi_attribute 42, 1
715; CORTEX-A12-DEFAULT:  .eabi_attribute 44, 2
716; CORTEX-A12-DEFAULT:  .eabi_attribute 68, 3
717
718; CORTEX-A12-DEFAULT-FAST-NOT:   .eabi_attribute 19
719;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when
720;; -ffast-math is specified.
721; CORTEX-A12-DEFAULT-FAST:  .eabi_attribute 20, 2
722; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 21
723; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 22
724; CORTEX-A12-HARD-FAST:  .eabi_attribute 23, 1
725
726; CORTEX-A12-NOFPU:  .cpu cortex-a12
727; CORTEX-A12-NOFPU:  .eabi_attribute 6, 10
728; CORTEX-A12-NOFPU:  .eabi_attribute 7, 65
729; CORTEX-A12-NOFPU:  .eabi_attribute 8, 1
730; CORTEX-A12-NOFPU:  .eabi_attribute 9, 2
731; CORTEX-A12-NOFPU-NOT:  .fpu
732; CORTEX-A12-NOFPU-NOT:   .eabi_attribute 19
733;; We default to IEEE 754 compliance
734; CORTEX-A12-NOFPU:  .eabi_attribute 20, 1
735; CORTEX-A12-NOFPU:  .eabi_attribute 21, 1
736; CORTEX-A12-NOFPU-NOT:  .eabi_attribute 22
737; CORTEX-A12-NOFPU:  .eabi_attribute 23, 3
738; CORTEX-A12-NOFPU:  .eabi_attribute 24, 1
739; CORTEX-A12-NOFPU:  .eabi_attribute 25, 1
740; CORTEX-A12-NOFPU:  .eabi_attribute 42, 1
741; CORTEX-A12-NOFPU:  .eabi_attribute 44, 2
742; CORTEX-A12-NOFPU:  .eabi_attribute 68, 3
743
744; CORTEX-A12-NOFPU-FAST-NOT:   .eabi_attribute 19
745;; Despite there being no FPU, we chose to flush to zero preserving
746;; sign. This matches what the hardware would do for this architecture
747;; revision.
748; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 20, 2
749; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 21
750; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 22
751; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 23, 1
752
753; CORTEX-A15: .cpu cortex-a15
754; CORTEX-A15: .eabi_attribute 6, 10
755; CORTEX-A15: .eabi_attribute 7, 65
756; CORTEX-A15: .eabi_attribute 8, 1
757; CORTEX-A15: .eabi_attribute 9, 2
758; CORTEX-A15: .fpu neon-vfpv4
759; CORTEX-A15-NOT:   .eabi_attribute 19
760;; We default to IEEE 754 compliance
761; CORTEX-A15: .eabi_attribute 20, 1
762; CORTEX-A15: .eabi_attribute 21, 1
763; CORTEX-A15-NOT: .eabi_attribute 22
764; CORTEX-A15: .eabi_attribute 23, 3
765; CORTEX-A15: .eabi_attribute 24, 1
766; CORTEX-A15: .eabi_attribute 25, 1
767; CORTEX-A15-NOT: .eabi_attribute 27
768; CORTEX-A15-NOT: .eabi_attribute 28
769; CORTEX-A15: .eabi_attribute 36, 1
770; CORTEX-A15: .eabi_attribute 38, 1
771; CORTEX-A15: .eabi_attribute 42, 1
772; CORTEX-A15: .eabi_attribute 44, 2
773; CORTEX-A15: .eabi_attribute 68, 3
774
775; CORTEX-A15-FAST-NOT:   .eabi_attribute 19
776;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when
777;; -ffast-math is specified.
778; CORTEX-A15-FAST: .eabi_attribute 20, 2
779; CORTEX-A15-FAST-NOT:  .eabi_attribute 21
780; CORTEX-A15-FAST-NOT:  .eabi_attribute 22
781; CORTEX-A15-FAST:  .eabi_attribute 23, 1
782
783; CORTEX-A17-DEFAULT:  .cpu cortex-a17
784; CORTEX-A17-DEFAULT:  .eabi_attribute 6, 10
785; CORTEX-A17-DEFAULT:  .eabi_attribute 7, 65
786; CORTEX-A17-DEFAULT:  .eabi_attribute 8, 1
787; CORTEX-A17-DEFAULT:  .eabi_attribute 9, 2
788; CORTEX-A17-DEFAULT:  .fpu neon-vfpv4
789; CORTEX-A17-DEFAULT-NOT:   .eabi_attribute 19
790;; We default to IEEE 754 compliance
791; CORTEX-A17-DEFAULT:  .eabi_attribute 20, 1
792; CORTEX-A17-DEFAULT:  .eabi_attribute 21, 1
793; CORTEX-A17-DEFAULT-NOT:  .eabi_attribute 22
794; CORTEX-A17-DEFAULT:  .eabi_attribute 23, 3
795; CORTEX-A17-DEFAULT:  .eabi_attribute 24, 1
796; CORTEX-A17-DEFAULT:  .eabi_attribute 25, 1
797; CORTEX-A17-DEFAULT:  .eabi_attribute 42, 1
798; CORTEX-A17-DEFAULT:  .eabi_attribute 44, 2
799; CORTEX-A17-DEFAULT:  .eabi_attribute 68, 3
800
801; CORTEX-A17-FAST-NOT:   .eabi_attribute 19
802;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when
803;; -ffast-math is specified.
804; CORTEX-A17-FAST:  .eabi_attribute 20, 2
805; CORTEX-A17-FAST-NOT:  .eabi_attribute 21
806; CORTEX-A17-FAST-NOT:  .eabi_attribute 22
807; CORTEX-A17-FAST:  .eabi_attribute 23, 1
808
809; CORTEX-A17-NOFPU:  .cpu cortex-a17
810; CORTEX-A17-NOFPU:  .eabi_attribute 6, 10
811; CORTEX-A17-NOFPU:  .eabi_attribute 7, 65
812; CORTEX-A17-NOFPU:  .eabi_attribute 8, 1
813; CORTEX-A17-NOFPU:  .eabi_attribute 9, 2
814; CORTEX-A17-NOFPU-NOT:  .fpu
815; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
816;; We default to IEEE 754 compliance
817; CORTEX-A17-NOFPU:  .eabi_attribute 20, 1
818; CORTEX-A17-NOFPU:  .eabi_attribute 21, 1
819; CORTEX-A17-NOFPU-NOT:  .eabi_attribute 22
820; CORTEX-A17-NOFPU:  .eabi_attribute 23, 3
821; CORTEX-A17-NOFPU:  .eabi_attribute 24, 1
822; CORTEX-A17-NOFPU:  .eabi_attribute 25, 1
823; CORTEX-A17-NOFPU:  .eabi_attribute 42, 1
824; CORTEX-A17-NOFPU:  .eabi_attribute 44, 2
825; CORTEX-A17-NOFPU:  .eabi_attribute 68, 3
826
827; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
828;; Despite there being no FPU, we chose to flush to zero preserving
829;; sign. This matches what the hardware would do for this architecture
830;; revision.
831; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 20, 2
832; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 21
833; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 22
834; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 23, 1
835
836; CORTEX-M0:  .cpu cortex-m0
837; CORTEX-M0:  .eabi_attribute 6, 12
838; CORTEX-M0-NOT:  .eabi_attribute 7
839; CORTEX-M0:  .eabi_attribute 8, 0
840; CORTEX-M0:  .eabi_attribute 9, 1
841; CORTEX-M0-NOT:   .eabi_attribute 19
842;; We default to IEEE 754 compliance
843; CORTEX-M0:  .eabi_attribute 20, 1
844; CORTEX-M0:  .eabi_attribute 21, 1
845; CORTEX-M0-NOT:  .eabi_attribute 22
846; CORTEX-M0:  .eabi_attribute 23, 3
847; CORTEX-M0: .eabi_attribute 34, 0
848; CORTEX-M0:  .eabi_attribute 24, 1
849; CORTEX-M0:  .eabi_attribute 25, 1
850; CORTEX-M0-NOT:  .eabi_attribute 27
851; CORTEX-M0-NOT:  .eabi_attribute 28
852; CORTEX-M0-NOT:  .eabi_attribute 36
853; CORTEX-M0:  .eabi_attribute 38, 1
854; CORTEX-M0-NOT:  .eabi_attribute 42
855; CORTEX-M0-NOT:  .eabi_attribute 44
856; CORTEX-M0-NOT:  .eabi_attribute 68
857
858; CORTEX-M0-FAST-NOT:   .eabi_attribute 19
859;; Despite the M0 CPU having no FPU in this scenario, we chose to
860;; flush to positive zero here. There's no hardware support doing
861;; this, but the fast maths software library might and such behaviour
862;; would match hardware support on this architecture revision if it
863;; existed.
864; CORTEX-M0-FAST-NOT:  .eabi_attribute 20
865; CORTEX-M0-FAST-NOT:  .eabi_attribute 21
866; CORTEX-M0-FAST-NOT:  .eabi_attribute 22
867; CORTEX-M0-FAST:  .eabi_attribute 23, 1
868
869; CORTEX-M0PLUS:  .cpu cortex-m0plus
870; CORTEX-M0PLUS:  .eabi_attribute 6, 12
871; CORTEX-M0PLUS-NOT:  .eabi_attribute 7
872; CORTEX-M0PLUS:  .eabi_attribute 8, 0
873; CORTEX-M0PLUS:  .eabi_attribute 9, 1
874; CORTEX-M0PLUS-NOT:   .eabi_attribute 19
875;; We default to IEEE 754 compliance
876; CORTEX-M0PLUS:  .eabi_attribute 20, 1
877; CORTEX-M0PLUS:  .eabi_attribute 21, 1
878; CORTEX-M0PLUS-NOT:  .eabi_attribute 22
879; CORTEX-M0PLUS:  .eabi_attribute 23, 3
880; CORTEX-M0PLUS:  .eabi_attribute 24, 1
881; CORTEX-M0PLUS:  .eabi_attribute 25, 1
882; CORTEX-M0PLUS-NOT:  .eabi_attribute 27
883; CORTEX-M0PLUS-NOT:  .eabi_attribute 28
884; CORTEX-M0PLUS-NOT:  .eabi_attribute 36
885; CORTEX-M0PLUS:  .eabi_attribute 38, 1
886; CORTEX-M0PLUS-NOT:  .eabi_attribute 42
887; CORTEX-M0PLUS-NOT:  .eabi_attribute 44
888; CORTEX-M0PLUS-NOT:  .eabi_attribute 68
889
890; CORTEX-M0PLUS-FAST-NOT:   .eabi_attribute 19
891;; Despite the M0+ CPU having no FPU in this scenario, we chose to
892;; flush to positive zero here. There's no hardware support doing
893;; this, but the fast maths software library might and such behaviour
894;; would match hardware support on this architecture revision if it
895;; existed.
896; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 20
897; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 21
898; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 22
899; CORTEX-M0PLUS-FAST:  .eabi_attribute 23, 1
900
901; CORTEX-M1:  .cpu cortex-m1
902; CORTEX-M1:  .eabi_attribute 6, 12
903; CORTEX-M1-NOT:  .eabi_attribute 7
904; CORTEX-M1:  .eabi_attribute 8, 0
905; CORTEX-M1:  .eabi_attribute 9, 1
906; CORTEX-M1-NOT:   .eabi_attribute 19
907;; We default to IEEE 754 compliance
908; CORTEX-M1:  .eabi_attribute 20, 1
909; CORTEX-M1:  .eabi_attribute 21, 1
910; CORTEX-M1-NOT:  .eabi_attribute 22
911; CORTEX-M1:  .eabi_attribute 23, 3
912; CORTEX-M1:  .eabi_attribute 24, 1
913; CORTEX-M1:  .eabi_attribute 25, 1
914; CORTEX-M1-NOT:  .eabi_attribute 27
915; CORTEX-M1-NOT:  .eabi_attribute 28
916; CORTEX-M1-NOT:  .eabi_attribute 36
917; CORTEX-M1:  .eabi_attribute 38, 1
918; CORTEX-M1-NOT:  .eabi_attribute 42
919; CORTEX-M1-NOT:  .eabi_attribute 44
920; CORTEX-M1-NOT:  .eabi_attribute 68
921
922; CORTEX-M1-FAST-NOT:   .eabi_attribute 19
923;; Despite the M1 CPU having no FPU in this scenario, we chose to
924;; flush to positive zero here. There's no hardware support doing
925;; this, but the fast maths software library might and such behaviour
926;; would match hardware support on this architecture revision if it
927;; existed.
928; CORTEX-M1-FAST-NOT:  .eabi_attribute 20
929; CORTEX-M1-FAST-NOT:  .eabi_attribute 21
930; CORTEX-M1-FAST-NOT:  .eabi_attribute 22
931; CORTEX-M1-FAST:  .eabi_attribute 23, 1
932
933; SC000:  .cpu sc000
934; SC000:  .eabi_attribute 6, 12
935; SC000-NOT:  .eabi_attribute 7
936; SC000:  .eabi_attribute 8, 0
937; SC000:  .eabi_attribute 9, 1
938; SC000-NOT:   .eabi_attribute 19
939;; We default to IEEE 754 compliance
940; SC000:  .eabi_attribute 20, 1
941; SC000:  .eabi_attribute 21, 1
942; SC000-NOT:  .eabi_attribute 22
943; SC000:  .eabi_attribute 23, 3
944; SC000:  .eabi_attribute 24, 1
945; SC000:  .eabi_attribute 25, 1
946; SC000-NOT:  .eabi_attribute 27
947; SC000-NOT:  .eabi_attribute 28
948; SC000-NOT:  .eabi_attribute 36
949; SC000:  .eabi_attribute 38, 1
950; SC000-NOT:  .eabi_attribute 42
951; SC000-NOT:  .eabi_attribute 44
952; SC000-NOT:  .eabi_attribute 68
953
954; SC000-FAST-NOT:   .eabi_attribute 19
955;; Despite the SC000 CPU having no FPU in this scenario, we chose to
956;; flush to positive zero here. There's no hardware support doing
957;; this, but the fast maths software library might and such behaviour
958;; would match hardware support on this architecture revision if it
959;; existed.
960; SC000-FAST-NOT:  .eabi_attribute 20
961; SC000-FAST-NOT:  .eabi_attribute 21
962; SC000-FAST-NOT:  .eabi_attribute 22
963; SC000-FAST:  .eabi_attribute 23, 1
964
965; CORTEX-M3:  .cpu cortex-m3
966; CORTEX-M3:  .eabi_attribute 6, 10
967; CORTEX-M3:  .eabi_attribute 7, 77
968; CORTEX-M3:  .eabi_attribute 8, 0
969; CORTEX-M3:  .eabi_attribute 9, 2
970; CORTEX-M3-NOT:   .eabi_attribute 19
971;; We default to IEEE 754 compliance
972; CORTEX-M3:  .eabi_attribute 20, 1
973; CORTEX-M3:  .eabi_attribute 21, 1
974; CORTEX-M3-NOT:  .eabi_attribute 22
975; CORTEX-M3:  .eabi_attribute 23, 3
976; CORTEX-M3:  .eabi_attribute 24, 1
977; CORTEX-M3:  .eabi_attribute 25, 1
978; CORTEX-M3-NOT:  .eabi_attribute 27
979; CORTEX-M3-NOT:  .eabi_attribute 28
980; CORTEX-M3-NOT:  .eabi_attribute 36
981; CORTEX-M3:  .eabi_attribute 38, 1
982; CORTEX-M3-NOT:  .eabi_attribute 42
983; CORTEX-M3-NOT:  .eabi_attribute 44
984; CORTEX-M3-NOT:  .eabi_attribute 68
985
986; CORTEX-M3-FAST-NOT:   .eabi_attribute 19
987;; Despite there being no FPU, we chose to flush to zero preserving
988;; sign. This matches what the hardware would do for this architecture
989;; revision.
990; CORTEX-M3-FAST:  .eabi_attribute 20, 2
991; CORTEX-M3-FAST-NOT:  .eabi_attribute 21
992; CORTEX-M3-FAST-NOT:  .eabi_attribute 22
993; CORTEX-M3-FAST:  .eabi_attribute 23, 1
994
995; SC300:  .cpu sc300
996; SC300:  .eabi_attribute 6, 10
997; SC300:  .eabi_attribute 7, 77
998; SC300:  .eabi_attribute 8, 0
999; SC300:  .eabi_attribute 9, 2
1000; SC300-NOT:   .eabi_attribute 19
1001;; We default to IEEE 754 compliance
1002; SC300:  .eabi_attribute 20, 1
1003; SC300:  .eabi_attribute 21, 1
1004; SC300-NOT:  .eabi_attribute 22
1005; SC300:  .eabi_attribute 23, 3
1006; SC300:  .eabi_attribute 24, 1
1007; SC300:  .eabi_attribute 25, 1
1008; SC300-NOT:  .eabi_attribute 27
1009; SC300-NOT:  .eabi_attribute 28
1010; SC300-NOT:  .eabi_attribute 36
1011; SC300:  .eabi_attribute 38, 1
1012; SC300-NOT:  .eabi_attribute 42
1013; SC300-NOT:  .eabi_attribute 44
1014; SC300-NOT:  .eabi_attribute 68
1015
1016; SC300-FAST-NOT:   .eabi_attribute 19
1017;; Despite there being no FPU, we chose to flush to zero preserving
1018;; sign. This matches what the hardware would do for this architecture
1019;; revision.
1020; SC300-FAST:  .eabi_attribute 20, 2
1021; SC300-FAST-NOT:  .eabi_attribute 21
1022; SC300-FAST-NOT:  .eabi_attribute 22
1023; SC300-FAST:  .eabi_attribute 23, 1
1024
1025; CORTEX-M4-SOFT:  .cpu cortex-m4
1026; CORTEX-M4-SOFT:  .eabi_attribute 6, 13
1027; CORTEX-M4-SOFT:  .eabi_attribute 7, 77
1028; CORTEX-M4-SOFT:  .eabi_attribute 8, 0
1029; CORTEX-M4-SOFT:  .eabi_attribute 9, 2
1030; CORTEX-M4-SOFT:  .fpu fpv4-sp-d16
1031; CORTEX-M4-SOFT-NOT:   .eabi_attribute 19
1032;; We default to IEEE 754 compliance
1033; CORTEX-M4-SOFT:  .eabi_attribute 20, 1
1034; CORTEX-M4-SOFT:  .eabi_attribute 21, 1
1035; CORTEX-M4-SOFT-NOT:  .eabi_attribute 22
1036; CORTEX-M4-SOFT:  .eabi_attribute 23, 3
1037; CORTEX-M4-SOFT:  .eabi_attribute 24, 1
1038; CORTEX-M4-SOFT:  .eabi_attribute 25, 1
1039; CORTEX-M4-SOFT:  .eabi_attribute 27, 1
1040; CORTEX-M4-SOFT-NOT:  .eabi_attribute 28
1041; CORTEX-M4-SOFT:  .eabi_attribute 36, 1
1042; CORTEX-M4-SOFT:  .eabi_attribute 38, 1
1043; CORTEX-M4-SOFT-NOT:  .eabi_attribute 42
1044; CORTEX-M4-SOFT-NOT:  .eabi_attribute 44
1045; CORTEX-M4-SOFT-NOT:  .eabi_attribute 68
1046
1047; CORTEX-M4-SOFT-FAST-NOT:   .eabi_attribute 19
1048;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1049;; -ffast-math is specified.
1050; CORTEX-M4-SOFT-FAST:  .eabi_attribute 20, 2
1051; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 21
1052; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 22
1053; CORTEX-M4-SOFT-FAST:  .eabi_attribute 23, 1
1054
1055; CORTEX-M4-HARD:  .cpu cortex-m4
1056; CORTEX-M4-HARD:  .eabi_attribute 6, 13
1057; CORTEX-M4-HARD:  .eabi_attribute 7, 77
1058; CORTEX-M4-HARD:  .eabi_attribute 8, 0
1059; CORTEX-M4-HARD:  .eabi_attribute 9, 2
1060; CORTEX-M4-HARD:  .fpu fpv4-sp-d16
1061; CORTEX-M4-HARD-NOT:   .eabi_attribute 19
1062;; We default to IEEE 754 compliance
1063; CORTEX-M4-HARD:  .eabi_attribute 20, 1
1064; CORTEX-M4-HARD:  .eabi_attribute 21, 1
1065; CORTEX-M4-HARD-NOT:  .eabi_attribute 22
1066; CORTEX-M4-HARD:  .eabi_attribute 23, 3
1067; CORTEX-M4-HARD:  .eabi_attribute 24, 1
1068; CORTEX-M4-HARD:  .eabi_attribute 25, 1
1069; CORTEX-M4-HARD:  .eabi_attribute 27, 1
1070; CORTEX-M4-HARD:  .eabi_attribute 28, 1
1071; CORTEX-M4-HARD:  .eabi_attribute 36, 1
1072; CORTEX-M4-HARD:  .eabi_attribute 38, 1
1073; CORTEX-M4-HARD-NOT:  .eabi_attribute 42
1074; CORTEX-M4-HARD-NOT:  .eabi_attribute 44
1075; CORTEX-M4-HARD-NOT:  .eabi_attribute 68
1076
1077; CORTEX-M4-HARD-FAST-NOT:   .eabi_attribute 19
1078;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1079;; -ffast-math is specified.
1080; CORTEX-M4-HARD-FAST:  .eabi_attribute 20, 2
1081; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 21
1082; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 22
1083; CORTEX-M4-HARD-FAST:  .eabi_attribute 23, 1
1084
1085; CORTEX-M7:  .cpu    cortex-m7
1086; CORTEX-M7:  .eabi_attribute 6, 13
1087; CORTEX-M7:  .eabi_attribute 7, 77
1088; CORTEX-M7:  .eabi_attribute 8, 0
1089; CORTEX-M7:  .eabi_attribute 9, 2
1090; CORTEX-M7-SOFT-NOT: .fpu
1091; CORTEX-M7-SINGLE:  .fpu fpv5-sp-d16
1092; CORTEX-M7-DOUBLE:  .fpu fpv5-d16
1093; CORTEX-M7:  .eabi_attribute 17, 1
1094; CORTEX-M7-NOT:   .eabi_attribute 19
1095;; We default to IEEE 754 compliance
1096; CORTEX-M7:  .eabi_attribute 20, 1
1097; CORTEX-M7:  .eabi_attribute 21, 1
1098; CORTEX-M7-NOT:  .eabi_attribute 22
1099; CORTEX-M7:  .eabi_attribute 23, 3
1100; CORTEX-M7:  .eabi_attribute 24, 1
1101; CORTEX-M7:  .eabi_attribute 25, 1
1102; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
1103; CORTEX-M7-SINGLE:  .eabi_attribute 27, 1
1104; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
1105; CORTEX-M7:  .eabi_attribute 36, 1
1106; CORTEX-M7:  .eabi_attribute 38, 1
1107; CORTEX-M7-NOT:  .eabi_attribute 44
1108; CORTEX-M7:  .eabi_attribute 14, 0
1109
1110; CORTEX-M7-NOFPU-FAST-NOT:   .eabi_attribute 19
1111;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1112; CORTEX-M7-FAST:  .eabi_attribute 20, 2
1113;; Despite there being no FPU, we chose to flush to zero preserving
1114;; sign. This matches what the hardware would do for this architecture
1115;; revision.
1116; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
1117; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 21
1118; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 22
1119; CORTEX-M7-NOFPU-FAST:  .eabi_attribute 23, 1
1120
1121; CORTEX-R4:  .cpu cortex-r4
1122; CORTEX-R4:  .eabi_attribute 6, 10
1123; CORTEX-R4:  .eabi_attribute 7, 82
1124; CORTEX-R4:  .eabi_attribute 8, 1
1125; CORTEX-R4:  .eabi_attribute 9, 2
1126; CORTEX-R4-NOT:  .fpu vfpv3-d16
1127; CORTEX-R4-NOT:   .eabi_attribute 19
1128;; We default to IEEE 754 compliance
1129; CORTEX-R4:  .eabi_attribute 20, 1
1130; CORTEX-R4:  .eabi_attribute 21, 1
1131; CORTEX-R4-NOT:  .eabi_attribute 22
1132; CORTEX-R4:  .eabi_attribute 23, 3
1133; CORTEX-R4:  .eabi_attribute 24, 1
1134; CORTEX-R4:  .eabi_attribute 25, 1
1135; CORTEX-R4-NOT:  .eabi_attribute 28
1136; CORTEX-R4-NOT:  .eabi_attribute 36
1137; CORTEX-R4:  .eabi_attribute 38, 1
1138; CORTEX-R4-NOT:  .eabi_attribute 42
1139; CORTEX-R4-NOT:  .eabi_attribute 44
1140; CORTEX-R4-NOT:  .eabi_attribute 68
1141
1142; CORTEX-R4F:  .cpu cortex-r4f
1143; CORTEX-R4F:  .eabi_attribute 6, 10
1144; CORTEX-R4F:  .eabi_attribute 7, 82
1145; CORTEX-R4F:  .eabi_attribute 8, 1
1146; CORTEX-R4F:  .eabi_attribute 9, 2
1147; CORTEX-R4F:  .fpu vfpv3-d16
1148; CORTEX-R4F-NOT:   .eabi_attribute 19
1149;; We default to IEEE 754 compliance
1150; CORTEX-R4F:  .eabi_attribute 20, 1
1151; CORTEX-R4F:  .eabi_attribute 21, 1
1152; CORTEX-R4F-NOT:  .eabi_attribute 22
1153; CORTEX-R4F:  .eabi_attribute 23, 3
1154; CORTEX-R4F:  .eabi_attribute 24, 1
1155; CORTEX-R4F:  .eabi_attribute 25, 1
1156; CORTEX-R4F-NOT:  .eabi_attribute 27, 1
1157; CORTEX-R4F-NOT:  .eabi_attribute 28
1158; CORTEX-R4F-NOT:  .eabi_attribute 36
1159; CORTEX-R4F:  .eabi_attribute 38, 1
1160; CORTEX-R4F-NOT:  .eabi_attribute 42
1161; CORTEX-R4F-NOT:  .eabi_attribute 44
1162; CORTEX-R4F-NOT:  .eabi_attribute 68
1163
1164; CORTEX-R5:  .cpu cortex-r5
1165; CORTEX-R5:  .eabi_attribute 6, 10
1166; CORTEX-R5:  .eabi_attribute 7, 82
1167; CORTEX-R5:  .eabi_attribute 8, 1
1168; CORTEX-R5:  .eabi_attribute 9, 2
1169; CORTEX-R5:  .fpu vfpv3-d16
1170; CORTEX-R5-NOT:   .eabi_attribute 19
1171;; We default to IEEE 754 compliance
1172; CORTEX-R5:  .eabi_attribute 20, 1
1173; CORTEX-R5:  .eabi_attribute 21, 1
1174; CORTEX-R5-NOT:  .eabi_attribute 22
1175; CORTEX-R5:  .eabi_attribute 23, 3
1176; CORTEX-R5:  .eabi_attribute 24, 1
1177; CORTEX-R5:  .eabi_attribute 25, 1
1178; CORTEX-R5-NOT:  .eabi_attribute 27, 1
1179; CORTEX-R5-NOT:  .eabi_attribute 28
1180; CORTEX-R5-NOT:  .eabi_attribute 36
1181; CORTEX-R5:  .eabi_attribute 38, 1
1182; CORTEX-R5-NOT:  .eabi_attribute 42
1183; CORTEX-R5:  .eabi_attribute 44, 2
1184; CORTEX-R5-NOT:  .eabi_attribute 68
1185
1186; CORTEX-R5-FAST-NOT:   .eabi_attribute 19
1187;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
1188; CORTEX-R5-FAST:  .eabi_attribute 20, 2
1189; CORTEX-R5-FAST-NOT:  .eabi_attribute 21
1190; CORTEX-R5-FAST-NOT:  .eabi_attribute 22
1191; CORTEX-R5-FAST:  .eabi_attribute 23, 1
1192
1193; CORTEX-R7:  .cpu cortex-r7
1194; CORTEX-R7:  .eabi_attribute 6, 10
1195; CORTEX-R7:  .eabi_attribute 7, 82
1196; CORTEX-R7:  .eabi_attribute 8, 1
1197; CORTEX-R7:  .eabi_attribute 9, 2
1198; CORTEX-R7:  .fpu vfpv3-d16-fp16
1199; CORTEX-R7-NOT:   .eabi_attribute 19
1200;; We default to IEEE 754 compliance
1201; CORTEX-R7:  .eabi_attribute 20, 1
1202; CORTEX-R7:  .eabi_attribute 21, 1
1203; CORTEX-R7-NOT:  .eabi_attribute 22
1204; CORTEX-R7:  .eabi_attribute 23, 3
1205; CORTEX-R7:  .eabi_attribute 24, 1
1206; CORTEX-R7:  .eabi_attribute 25, 1
1207; CORTEX-R7-NOT:  .eabi_attribute 28
1208; CORTEX-R7:  .eabi_attribute 36, 1
1209; CORTEX-R7:  .eabi_attribute 38, 1
1210; CORTEX-R7:  .eabi_attribute 42, 1
1211; CORTEX-R7:  .eabi_attribute 44, 2
1212; CORTEX-R7-NOT:  .eabi_attribute 68
1213
1214; CORTEX-R7-FAST-NOT:   .eabi_attribute 19
1215;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
1216; CORTEX-R7-FAST:  .eabi_attribute 20, 2
1217; CORTEX-R7-FAST-NOT:  .eabi_attribute 21
1218; CORTEX-R7-FAST-NOT:  .eabi_attribute 22
1219; CORTEX-R7-FAST:  .eabi_attribute 23, 1
1220
1221; CORTEX-R8:  .cpu cortex-r8
1222; CORTEX-R8:  .eabi_attribute 6, 10
1223; CORTEX-R8:  .eabi_attribute 7, 82
1224; CORTEX-R8:  .eabi_attribute 8, 1
1225; CORTEX-R8:  .eabi_attribute 9, 2
1226; CORTEX-R8:  .fpu vfpv3-d16-fp16
1227; CORTEX-R8-NOT:   .eabi_attribute 19
1228;; We default to IEEE 754 compliance
1229; CORTEX-R8:  .eabi_attribute 20, 1
1230; CORTEX-R8:  .eabi_attribute 21, 1
1231; CORTEX-R8-NOT:  .eabi_attribute 22
1232; CORTEX-R8:  .eabi_attribute 23, 3
1233; CORTEX-R8:  .eabi_attribute 24, 1
1234; CORTEX-R8:  .eabi_attribute 25, 1
1235; CORTEX-R8-NOT:  .eabi_attribute 28
1236; CORTEX-R8:  .eabi_attribute 36, 1
1237; CORTEX-R8:  .eabi_attribute 38, 1
1238; CORTEX-R8:  .eabi_attribute 42, 1
1239; CORTEX-R8:  .eabi_attribute 44, 2
1240; CORTEX-R8-NOT:  .eabi_attribute 68
1241
1242; CORTEX-R8-FAST-NOT:   .eabi_attribute 19
1243;; The R8 has the VFPv3 FP unit, which always flushes preserving sign.
1244; CORTEX-R8-FAST:  .eabi_attribute 20, 2
1245; CORTEX-R8-FAST-NOT:  .eabi_attribute 21
1246; CORTEX-R8-FAST-NOT:  .eabi_attribute 22
1247; CORTEX-R8-FAST:  .eabi_attribute 23, 1
1248
1249; CORTEX-A35:  .cpu cortex-a35
1250; CORTEX-A35:  .eabi_attribute 6, 14
1251; CORTEX-A35:  .eabi_attribute 7, 65
1252; CORTEX-A35:  .eabi_attribute 8, 1
1253; CORTEX-A35:  .eabi_attribute 9, 2
1254; CORTEX-A35:  .fpu crypto-neon-fp-armv8
1255; CORTEX-A35:  .eabi_attribute 12, 3
1256; CORTEX-A35-NOT:   .eabi_attribute 19
1257;; We default to IEEE 754 compliance
1258; CORTEX-A35:  .eabi_attribute 20, 1
1259; CORTEX-A35:  .eabi_attribute 21, 1
1260; CORTEX-A35-NOT:  .eabi_attribute 22
1261; CORTEX-A35:  .eabi_attribute 23, 3
1262; CORTEX-A35:  .eabi_attribute 24, 1
1263; CORTEX-A35:  .eabi_attribute 25, 1
1264; CORTEX-A35-NOT:  .eabi_attribute 27
1265; CORTEX-A35-NOT:  .eabi_attribute 28
1266; CORTEX-A35:  .eabi_attribute 36, 1
1267; CORTEX-A35:  .eabi_attribute 38, 1
1268; CORTEX-A35:  .eabi_attribute 42, 1
1269; CORTEX-A35-NOT:  .eabi_attribute 44
1270; CORTEX-A35:  .eabi_attribute 68, 3
1271
1272; CORTEX-A35-FAST-NOT:   .eabi_attribute 19
1273;; The A35 has the ARMv8 FP unit, which always flushes preserving sign.
1274; CORTEX-A35-FAST:  .eabi_attribute 20, 2
1275; CORTEX-A35-FAST-NOT:  .eabi_attribute 21
1276; CORTEX-A35-FAST-NOT:  .eabi_attribute 22
1277; CORTEX-A35-FAST:  .eabi_attribute 23, 1
1278
1279; CORTEX-A53:  .cpu cortex-a53
1280; CORTEX-A53:  .eabi_attribute 6, 14
1281; CORTEX-A53:  .eabi_attribute 7, 65
1282; CORTEX-A53:  .eabi_attribute 8, 1
1283; CORTEX-A53:  .eabi_attribute 9, 2
1284; CORTEX-A53:  .fpu crypto-neon-fp-armv8
1285; CORTEX-A53:  .eabi_attribute 12, 3
1286; CORTEX-A53-NOT:   .eabi_attribute 19
1287;; We default to IEEE 754 compliance
1288; CORTEX-A53:  .eabi_attribute 20, 1
1289; CORTEX-A53:  .eabi_attribute 21, 1
1290; CORTEX-A53-NOT:  .eabi_attribute 22
1291; CORTEX-A53:  .eabi_attribute 23, 3
1292; CORTEX-A53:  .eabi_attribute 24, 1
1293; CORTEX-A53:  .eabi_attribute 25, 1
1294; CORTEX-A53-NOT:  .eabi_attribute 27
1295; CORTEX-A53-NOT:  .eabi_attribute 28
1296; CORTEX-A53:  .eabi_attribute 36, 1
1297; CORTEX-A53:  .eabi_attribute 38, 1
1298; CORTEX-A53:  .eabi_attribute 42, 1
1299; CORTEX-A53-NOT:  .eabi_attribute 44
1300; CORTEX-A53:  .eabi_attribute 68, 3
1301
1302; CORTEX-A53-FAST-NOT:   .eabi_attribute 19
1303;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1304; CORTEX-A53-FAST:  .eabi_attribute 20, 2
1305; CORTEX-A53-FAST-NOT:  .eabi_attribute 21
1306; CORTEX-A53-FAST-NOT:  .eabi_attribute 22
1307; CORTEX-A53-FAST:  .eabi_attribute 23, 1
1308
1309; CORTEX-A57:  .cpu cortex-a57
1310; CORTEX-A57:  .eabi_attribute 6, 14
1311; CORTEX-A57:  .eabi_attribute 7, 65
1312; CORTEX-A57:  .eabi_attribute 8, 1
1313; CORTEX-A57:  .eabi_attribute 9, 2
1314; CORTEX-A57:  .fpu crypto-neon-fp-armv8
1315; CORTEX-A57:  .eabi_attribute 12, 3
1316; CORTEX-A57-NOT:   .eabi_attribute 19
1317;; We default to IEEE 754 compliance
1318; CORTEX-A57:  .eabi_attribute 20, 1
1319; CORTEX-A57:  .eabi_attribute 21, 1
1320; CORTEX-A57-NOT:  .eabi_attribute 22
1321; CORTEX-A57:  .eabi_attribute 23, 3
1322; CORTEX-A57:  .eabi_attribute 24, 1
1323; CORTEX-A57:  .eabi_attribute 25, 1
1324; CORTEX-A57-NOT:  .eabi_attribute 27
1325; CORTEX-A57-NOT:  .eabi_attribute 28
1326; CORTEX-A57:  .eabi_attribute 36, 1
1327; CORTEX-A57:  .eabi_attribute 38, 1
1328; CORTEX-A57:  .eabi_attribute 42, 1
1329; CORTEX-A57-NOT:  .eabi_attribute 44
1330; CORTEX-A57:  .eabi_attribute 68, 3
1331
1332; CORTEX-A57-FAST-NOT:   .eabi_attribute 19
1333;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1334; CORTEX-A57-FAST:  .eabi_attribute 20, 2
1335; CORTEX-A57-FAST-NOT:  .eabi_attribute 21
1336; CORTEX-A57-FAST-NOT:  .eabi_attribute 22
1337; CORTEX-A57-FAST:  .eabi_attribute 23, 1
1338
1339; CORTEX-A72:  .cpu cortex-a72
1340; CORTEX-A72:  .eabi_attribute 6, 14
1341; CORTEX-A72:  .eabi_attribute 7, 65
1342; CORTEX-A72:  .eabi_attribute 8, 1
1343; CORTEX-A72:  .eabi_attribute 9, 2
1344; CORTEX-A72:  .fpu crypto-neon-fp-armv8
1345; CORTEX-A72:  .eabi_attribute 12, 3
1346; CORTEX-A72-NOT:   .eabi_attribute 19
1347;; We default to IEEE 754 compliance
1348; CORTEX-A72:  .eabi_attribute 20, 1
1349; CORTEX-A72:  .eabi_attribute 21, 1
1350; CORTEX-A72-NOT:  .eabi_attribute 22
1351; CORTEX-A72:  .eabi_attribute 23, 3
1352; CORTEX-A72:  .eabi_attribute 24, 1
1353; CORTEX-A72:  .eabi_attribute 25, 1
1354; CORTEX-A72-NOT:  .eabi_attribute 27
1355; CORTEX-A72-NOT:  .eabi_attribute 28
1356; CORTEX-A72:  .eabi_attribute 36, 1
1357; CORTEX-A72:  .eabi_attribute 38, 1
1358; CORTEX-A72:  .eabi_attribute 42, 1
1359; CORTEX-A72-NOT:  .eabi_attribute 44
1360; CORTEX-A72:  .eabi_attribute 68, 3
1361
1362; CORTEX-A72-FAST-NOT:   .eabi_attribute 19
1363;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1364; CORTEX-A72-FAST:  .eabi_attribute 20, 2
1365; CORTEX-A72-FAST-NOT:  .eabi_attribute 21
1366; CORTEX-A72-FAST-NOT:  .eabi_attribute 22
1367; CORTEX-A72-FAST:  .eabi_attribute 23, 1
1368
1369; EXYNOS-M1:  .cpu exynos-m1
1370; EXYNOS-M1:  .eabi_attribute 6, 14
1371; EXYNOS-M1:  .eabi_attribute 7, 65
1372; EXYNOS-M1:  .eabi_attribute 8, 1
1373; EXYNOS-M1:  .eabi_attribute 9, 2
1374; EXYNOS-M1:  .fpu crypto-neon-fp-armv8
1375; EXYNOS-M1:  .eabi_attribute 12, 3
1376; EXYNOS-M1-NOT:   .eabi_attribute 19
1377;; We default to IEEE 754 compliance
1378; EXYNOS-M1:  .eabi_attribute 20, 1
1379; EXYNOS-M1:  .eabi_attribute 21, 1
1380; EXYNOS-M1-NOT:  .eabi_attribute 22
1381; EXYNOS-M1:  .eabi_attribute 23, 3
1382; EXYNOS-M1:  .eabi_attribute 24, 1
1383; EXYNOS-M1:  .eabi_attribute 25, 1
1384; EXYNOS-M1-NOT:  .eabi_attribute 27
1385; EXYNOS-M1-NOT:  .eabi_attribute 28
1386; EXYNOS-M1:  .eabi_attribute 36, 1
1387; EXYNOS-M1:  .eabi_attribute 38, 1
1388; EXYNOS-M1:  .eabi_attribute 42, 1
1389; EXYNOS-M1-NOT:  .eabi_attribute 44
1390; EXYNOS-M15:  .eabi_attribute 68, 3
1391
1392; EXYNOS-M1-FAST-NOT:   .eabi_attribute 19
1393;; The exynos-m1 has the ARMv8 FP unit, which always flushes preserving sign.
1394; EXYNOS-M1-FAST:  .eabi_attribute 20, 2
1395; EXYNOS-M1-FAST-NOT:  .eabi_attribute 21
1396; EXYNOS-M1-FAST-NOT:  .eabi_attribute 22
1397; EXYNOS-M1-FAST:  .eabi_attribute 23, 1
1398
1399; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
1400; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
1401; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
1402; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16
1403; GENERIC-FPU-NEON-FP16: .fpu neon-fp16
1404
1405; GENERIC-ARMV8_1-A:  .eabi_attribute 6, 14
1406; GENERIC-ARMV8_1-A:  .eabi_attribute 7, 65
1407; GENERIC-ARMV8_1-A:  .eabi_attribute 8, 1
1408; GENERIC-ARMV8_1-A:  .eabi_attribute 9, 2
1409; GENERIC-ARMV8_1-A:  .fpu crypto-neon-fp-armv8
1410; GENERIC-ARMV8_1-A:  .eabi_attribute 12, 4
1411; GENERIC-ARMV8_1-A-NOT:   .eabi_attribute 19
1412;; We default to IEEE 754 compliance
1413; GENERIC-ARMV8_1-A:  .eabi_attribute 20, 1
1414; GENERIC-ARMV8_1-A:  .eabi_attribute 21, 1
1415; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 22
1416; GENERIC-ARMV8_1-A:  .eabi_attribute 23, 3
1417; GENERIC-ARMV8_1-A:  .eabi_attribute 24, 1
1418; GENERIC-ARMV8_1-A:  .eabi_attribute 25, 1
1419; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 27
1420; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 28
1421; GENERIC-ARMV8_1-A:  .eabi_attribute 36, 1
1422; GENERIC-ARMV8_1-A:  .eabi_attribute 38, 1
1423; GENERIC-ARMV8_1-A:  .eabi_attribute 42, 1
1424; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 44
1425; GENERIC-ARMV8_1-A:  .eabi_attribute 68, 3
1426
1427; GENERIC-ARMV8_1-A-FAST-NOT:   .eabi_attribute 19
1428;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign.
1429; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 20, 2
1430; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 21
1431; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 22
1432; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 23, 1
1433
1434; RELOC-PIC:  .eabi_attribute 15, 1
1435; RELOC-PIC:  .eabi_attribute 16, 1
1436; RELOC-PIC:  .eabi_attribute 17, 2
1437; RELOC-OTHER:  .eabi_attribute 17, 1
1438
1439; PCS-R9-USE:  .eabi_attribute 14, 0
1440; PCS-R9-RESERVE:  .eabi_attribute 14, 3
1441
1442define i32 @f(i64 %z) {
1443    ret i32 0
1444}
1445