xref: /llvm-project/llvm/test/CodeGen/ARM/build-attributes.ll (revision 8331aaee8fb9172ddf0cb45c4b04cb76fe224da4) 
1; This tests that MC/asm header conversion is smooth and that the
2; build attributes are correct
3
4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE
5; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6
6; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST
7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S
13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast  | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST
17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
20; RUN: llc < %s -mtriple=armv7-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST
21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
22; RUN: llc < %s -mtriple=armv8-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST
23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
30; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE
31; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE
32; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP
33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-SOFT-FAST
41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A8-HARD
42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-HARD-FAST
43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
54; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
57; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST
58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
60; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST
61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
62; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
63
64; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16
65; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16
66; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD
67; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16
68; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16
69
70; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
71; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0
72; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
73; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
74; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0PLUS
75; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
76; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
77; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M1
78; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
79; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
80; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000
81; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
82; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
83; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
84; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
85; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
86; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
87; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
88; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
89; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
90; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
91; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
92; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
93; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
94; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
95; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
96; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
97; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
98; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
99; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
100; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
101; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
102; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
103; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
104; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
105; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
106; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
107; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
108; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8
109; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST
110; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
111; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=CORTEX-A32
112; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A32-FAST
113; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
114; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35
115; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST
116; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
117; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
118; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
119; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
120; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
121; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST
122; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
123; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
124; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
125; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
126; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a73 | FileCheck %s --check-prefix=CORTEX-A73
127; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
128; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=EXYNOS-M1
129; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
130; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
131; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2 | FileCheck %s --check-prefix=EXYNOS-M2
132; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
133; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
134; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
135; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
136; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s  --check-prefix=CORTEX-A7-CHECK
137; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s  --check-prefix=CORTEX-A7-CHECK-FAST
138; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
139; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
140; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
141; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
142; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
143; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
144; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
145; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
146; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
147; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER
148; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE
149; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE
150; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi | FileCheck %s --check-prefix=RELOC-ROPI
151; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=rwpi | FileCheck %s --check-prefix=RELOC-RWPI
152; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi-rwpi | FileCheck %s --check-prefix=RELOC-ROPI-RWPI
153
154; ARMv8.1a (AArch32)
155; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
156; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
157; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
158; ARMv8a (AArch32)
159; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
160; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
161; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
162; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
163; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
164; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
165; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
166; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
167; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
168; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
169; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m2 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
170; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m2 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
171
172; ARMv7a
173; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
174; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
175; ARMv7r
176; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
177; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
178; ARMv7m
179; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
180; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
181; ARMv6
182; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
183; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
184; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
185; ARMv6k
186; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
187; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
188; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
189; ARMv6m
190; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
191; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
192; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
193; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
194; ARMv5
195; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN
196; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
197
198; XSCALE:      .eabi_attribute 6, 5
199; XSCALE:      .eabi_attribute 8, 1
200; XSCALE:      .eabi_attribute 9, 1
201
202; DYN-ROUNDING: .eabi_attribute 19, 1
203
204; V6:   .eabi_attribute 6, 6
205; V6:   .eabi_attribute 8, 1
206;; We assume round-to-nearest by default (matches GCC)
207; V6-NOT:   .eabi_attribute 19
208;; The default choice made by llc is for a V6 CPU without an FPU.
209;; This is not an interesting detail, but for such CPUs, the default intention is to use
210;; software floating-point support. The choice is not important for targets without
211;; FPU support!
212; V6:   .eabi_attribute 20, 1
213; V6:   .eabi_attribute 21, 1
214; V6-NOT:   .eabi_attribute 22
215; V6:   .eabi_attribute 23, 3
216; V6:   .eabi_attribute 24, 1
217; V6:   .eabi_attribute 25, 1
218; V6-NOT:   .eabi_attribute 27
219; V6-NOT:   .eabi_attribute 28
220; V6-NOT:    .eabi_attribute 36
221; V6:    .eabi_attribute 38, 1
222; V6-NOT:    .eabi_attribute 42
223; V6-NOT:  .eabi_attribute 44
224; V6-NOT:    .eabi_attribute 68
225
226; V6-FAST-NOT:   .eabi_attribute 19
227;; Despite the V6 CPU having no FPU by default, we chose to flush to
228;; positive zero here. There's no hardware support doing this, but the
229;; fast maths software library might.
230; V6-FAST-NOT:   .eabi_attribute 20
231; V6-FAST-NOT:   .eabi_attribute 21
232; V6-FAST-NOT:   .eabi_attribute 22
233; V6-FAST:   .eabi_attribute 23, 1
234
235;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for
236;; V6-M, however we don't model the OS extension so this is fine.
237; V6M:  .eabi_attribute 6, 12
238; V6M-NOT:  .eabi_attribute 7
239; V6M:  .eabi_attribute 8, 0
240; V6M:  .eabi_attribute 9, 1
241; V6M-NOT:   .eabi_attribute 19
242;; The default choice made by llc is for a V6M CPU without an FPU.
243;; This is not an interesting detail, but for such CPUs, the default intention is to use
244;; software floating-point support. The choice is not important for targets without
245;; FPU support!
246; V6M:  .eabi_attribute 20, 1
247; V6M:   .eabi_attribute 21, 1
248; V6M-NOT:   .eabi_attribute 22
249; V6M:   .eabi_attribute 23, 3
250; V6M:  .eabi_attribute 24, 1
251; V6M:  .eabi_attribute 25, 1
252; V6M-NOT:  .eabi_attribute 27
253; V6M-NOT:  .eabi_attribute 28
254; V6M-NOT:  .eabi_attribute 36
255; V6M:  .eabi_attribute 38, 1
256; V6M-NOT:  .eabi_attribute 42
257; V6M-NOT:  .eabi_attribute 44
258; V6M-NOT:  .eabi_attribute 68
259
260; V6M-FAST-NOT:   .eabi_attribute 19
261;; Despite the V6M CPU having no FPU by default, we chose to flush to
262;; positive zero here. There's no hardware support doing this, but the
263;; fast maths software library might.
264; V6M-FAST-NOT:  .eabi_attribute 20
265; V6M-FAST-NOT:   .eabi_attribute 21
266; V6M-FAST-NOT:   .eabi_attribute 22
267; V6M-FAST:   .eabi_attribute 23, 1
268
269; ARM1156T2F-S: .cpu arm1156t2f-s
270; ARM1156T2F-S: .eabi_attribute 6, 8
271; ARM1156T2F-S: .eabi_attribute 8, 1
272; ARM1156T2F-S: .eabi_attribute 9, 2
273; ARM1156T2F-S: .fpu vfpv2
274; ARM1156T2F-S-NOT:   .eabi_attribute 19
275;; We default to IEEE 754 compliance
276; ARM1156T2F-S: .eabi_attribute 20, 1
277; ARM1156T2F-S: .eabi_attribute 21, 1
278; ARM1156T2F-S-NOT: .eabi_attribute 22
279; ARM1156T2F-S: .eabi_attribute 23, 3
280; ARM1156T2F-S: .eabi_attribute 24, 1
281; ARM1156T2F-S: .eabi_attribute 25, 1
282; ARM1156T2F-S-NOT: .eabi_attribute 27
283; ARM1156T2F-S-NOT: .eabi_attribute 28
284; ARM1156T2F-S-NOT: .eabi_attribute 36
285; ARM1156T2F-S: .eabi_attribute 38, 1
286; ARM1156T2F-S-NOT:    .eabi_attribute 42
287; ARM1156T2F-S-NOT:    .eabi_attribute 44
288; ARM1156T2F-S-NOT:    .eabi_attribute 68
289
290; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 19
291;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
292;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
293;; select. LLVM historically picks 0.
294; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
295; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 21
296; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 22
297; ARM1156T2F-S-FAST:   .eabi_attribute 23, 1
298
299; V7M:  .eabi_attribute 6, 10
300; V7M:  .eabi_attribute 7, 77
301; V7M:  .eabi_attribute 8, 0
302; V7M:  .eabi_attribute 9, 2
303; V7M-NOT:   .eabi_attribute 19
304;; The default choice made by llc is for a V7M CPU without an FPU.
305;; This is not an interesting detail, but for such CPUs, the default intention is to use
306;; software floating-point support. The choice is not important for targets without
307;; FPU support!
308; V7M:  .eabi_attribute 20, 1
309; V7M: .eabi_attribute 21, 1
310; V7M-NOT: .eabi_attribute 22
311; V7M: .eabi_attribute 23, 3
312; V7M:  .eabi_attribute 24, 1
313; V7M:  .eabi_attribute 25, 1
314; V7M-NOT:  .eabi_attribute 27
315; V7M-NOT:  .eabi_attribute 28
316; V7M-NOT:  .eabi_attribute 36
317; V7M:  .eabi_attribute 38, 1
318; V7M-NOT:  .eabi_attribute 42
319; V7M-NOT:  .eabi_attribute 44
320; V7M-NOT:  .eabi_attribute 68
321
322; V7M-FAST-NOT:   .eabi_attribute 19
323;; Despite the V7M CPU having no FPU by default, we chose to flush
324;; preserving sign. This matches what the hardware would do in the
325;; architecture revision were to exist on the current target.
326; V7M-FAST:  .eabi_attribute 20, 2
327; V7M-FAST-NOT:   .eabi_attribute 21
328; V7M-FAST-NOT:   .eabi_attribute 22
329; V7M-FAST:   .eabi_attribute 23, 1
330
331; V7:      .syntax unified
332; V7: .eabi_attribute 6, 10
333; V7-NOT:   .eabi_attribute 19
334;; In safe-maths mode we default to an IEEE 754 compliant choice.
335; V7: .eabi_attribute 20, 1
336; V7: .eabi_attribute 21, 1
337; V7-NOT: .eabi_attribute 22
338; V7: .eabi_attribute 23, 3
339; V7: .eabi_attribute 24, 1
340; V7: .eabi_attribute 25, 1
341; V7-NOT: .eabi_attribute 27
342; V7-NOT: .eabi_attribute 28
343; V7-NOT: .eabi_attribute 36
344; V7: .eabi_attribute 38, 1
345; V7-NOT:    .eabi_attribute 42
346; V7-NOT:    .eabi_attribute 44
347; V7-NOT:    .eabi_attribute 68
348
349; V7-FAST-NOT:   .eabi_attribute 19
350;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
351;; denormals to zero preserving the sign.
352; V7-FAST: .eabi_attribute 20, 2
353; V7-FAST-NOT:   .eabi_attribute 21
354; V7-FAST-NOT:   .eabi_attribute 22
355; V7-FAST:   .eabi_attribute 23, 1
356
357; V8:      .syntax unified
358; V8: .eabi_attribute 67, "2.09"
359; V8: .eabi_attribute 6, 14
360; V8-NOT:   .eabi_attribute 19
361; V8: .eabi_attribute 20, 1
362; V8: .eabi_attribute 21, 1
363; V8-NOT: .eabi_attribute 22
364; V8: .eabi_attribute 23, 3
365; V8-NOT: .eabi_attribute 44
366
367; V8-FAST-NOT:   .eabi_attribute 19
368;; The default does have an FPU, and for V8-A, it flushes preserving sign.
369; V8-FAST: .eabi_attribute 20, 2
370; V8-FAST-NOT: .eabi_attribute 21
371; V8-FAST-NOT: .eabi_attribute 22
372; V8-FAST: .eabi_attribute 23, 1
373
374; Vt8:     .syntax unified
375; Vt8: .eabi_attribute 6, 14
376; Vt8-NOT:   .eabi_attribute 19
377; Vt8: .eabi_attribute 20, 1
378; Vt8: .eabi_attribute 21, 1
379; Vt8-NOT: .eabi_attribute 22
380; Vt8: .eabi_attribute 23, 3
381
382; V8-FPARMv8:      .syntax unified
383; V8-FPARMv8: .eabi_attribute 6, 14
384; V8-FPARMv8: .fpu fp-armv8
385
386; V8-NEON:      .syntax unified
387; V8-NEON: .eabi_attribute 6, 14
388; V8-NEON: .fpu neon
389; V8-NEON: .eabi_attribute 12, 3
390
391; V8-FPARMv8-NEON:      .syntax unified
392; V8-FPARMv8-NEON: .eabi_attribute 6, 14
393; V8-FPARMv8-NEON: .fpu neon-fp-armv8
394; V8-FPARMv8-NEON: .eabi_attribute 12, 3
395
396; V8-FPARMv8-NEON-CRYPTO:      .syntax unified
397; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
398; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
399; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
400
401; V8MBASELINE: .syntax unified
402; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline
403; V8MBASELINE: .eabi_attribute 6, 16
404; '7' is Tag_CPU_arch_profile, '77' is 'M'
405; V8MBASELINE: .eabi_attribute 7, 77
406; '8' is Tag_ARM_ISA_use
407; V8MBASELINE: .eabi_attribute 8, 0
408; '9' is Tag_Thumb_ISA_use
409; V8MBASELINE: .eabi_attribute 9, 3
410
411; V8MMAINLINE: .syntax unified
412; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline
413; V8MMAINLINE: .eabi_attribute 6, 17
414; V8MMAINLINE: .eabi_attribute 7, 77
415; V8MMAINLINE: .eabi_attribute 8, 0
416; V8MMAINLINE: .eabi_attribute 9, 3
417; V8MMAINLINE_DSP-NOT: .eabi_attribute 46
418
419; V8MMAINLINE_DSP: .syntax unified
420; V8MBASELINE_DSP: .eabi_attribute 6, 17
421; V8MBASELINE_DSP: .eabi_attribute 7, 77
422; V8MMAINLINE_DSP: .eabi_attribute 8, 0
423; V8MMAINLINE_DSP: .eabi_attribute 9, 3
424; V8MMAINLINE_DSP: .eabi_attribute 46, 1
425
426; Tag_CPU_unaligned_access
427; NO-STRICT-ALIGN: .eabi_attribute 34, 1
428; STRICT-ALIGN: .eabi_attribute 34, 0
429
430; Tag_CPU_arch  'ARMv7'
431; CORTEX-A7-CHECK: .eabi_attribute      6, 10
432; CORTEX-A7-NOFPU: .eabi_attribute      6, 10
433
434; CORTEX-A7-FPUV4: .eabi_attribute      6, 10
435
436; Tag_CPU_arch_profile 'A'
437; CORTEX-A7-CHECK: .eabi_attribute      7, 65
438; CORTEX-A7-NOFPU: .eabi_attribute      7, 65
439; CORTEX-A7-FPUV4: .eabi_attribute      7, 65
440
441; Tag_ARM_ISA_use
442; CORTEX-A7-CHECK: .eabi_attribute      8, 1
443; CORTEX-A7-NOFPU: .eabi_attribute      8, 1
444; CORTEX-A7-FPUV4: .eabi_attribute      8, 1
445
446; Tag_THUMB_ISA_use
447; CORTEX-A7-CHECK: .eabi_attribute      9, 2
448; CORTEX-A7-NOFPU: .eabi_attribute      9, 2
449; CORTEX-A7-FPUV4: .eabi_attribute      9, 2
450
451; CORTEX-A7-CHECK: .fpu neon-vfpv4
452; CORTEX-A7-NOFPU-NOT: .fpu
453; CORTEX-A7-FPUV4: .fpu vfpv4
454
455; CORTEX-A7-CHECK-NOT:   .eabi_attribute 19
456; Tag_ABI_FP_denormal
457;; We default to IEEE 754 compliance
458; CORTEX-A7-CHECK: .eabi_attribute      20, 1
459;; The A7 has VFPv3 support by default, so flush preserving sign.
460; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
461; CORTEX-A7-NOFPU: .eabi_attribute      20, 1
462;; Despite there being no FPU, we chose to flush to zero preserving
463;; sign. This matches what the hardware would do for this architecture
464;; revision.
465; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
466; CORTEX-A7-FPUV4: .eabi_attribute      20, 1
467;; The VFPv4 FPU flushes preserving sign.
468; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
469
470; Tag_ABI_FP_exceptions
471; CORTEX-A7-CHECK: .eabi_attribute      21, 1
472; CORTEX-A7-NOFPU: .eabi_attribute      21, 1
473; CORTEX-A7-FPUV4: .eabi_attribute      21, 1
474
475; Tag_ABI_FP_user_exceptions
476; CORTEX-A7-CHECK-NOT: .eabi_attribute      22
477; CORTEX-A7-NOFPU-NOT: .eabi_attribute      22
478; CORTEX-A7-FPUV4-NOT: .eabi_attribute      22
479
480; Tag_ABI_FP_number_model
481; CORTEX-A7-CHECK: .eabi_attribute      23, 3
482; CORTEX-A7-NOFPU: .eabi_attribute      23, 3
483; CORTEX-A7-FPUV4: .eabi_attribute      23, 3
484
485; Tag_ABI_align_needed
486; CORTEX-A7-CHECK: .eabi_attribute      24, 1
487; CORTEX-A7-NOFPU: .eabi_attribute      24, 1
488; CORTEX-A7-FPUV4: .eabi_attribute      24, 1
489
490; Tag_ABI_align_preserved
491; CORTEX-A7-CHECK: .eabi_attribute      25, 1
492; CORTEX-A7-NOFPU: .eabi_attribute      25, 1
493; CORTEX-A7-FPUV4: .eabi_attribute      25, 1
494
495; Tag_FP_HP_extension
496; CORTEX-A7-CHECK: .eabi_attribute      36, 1
497; CORTEX-A7-NOFPU-NOT: .eabi_attribute  36
498; CORTEX-A7-FPUV4: .eabi_attribute      36, 1
499
500; Tag_FP_16bit_format
501; CORTEX-A7-CHECK: .eabi_attribute      38, 1
502; CORTEX-A7-NOFPU: .eabi_attribute      38, 1
503; CORTEX-A7-FPUV4: .eabi_attribute      38, 1
504
505; Tag_MPextension_use
506; CORTEX-A7-CHECK: .eabi_attribute      42, 1
507; CORTEX-A7-NOFPU: .eabi_attribute      42, 1
508; CORTEX-A7-FPUV4: .eabi_attribute      42, 1
509
510; Tag_DIV_use
511; CORTEX-A7-CHECK: .eabi_attribute      44, 2
512; CORTEX-A7-NOFPU: .eabi_attribute      44, 2
513; CORTEX-A7-FPUV4: .eabi_attribute      44, 2
514
515; Tag_DSP_extension
516; CORTEX-A7-CHECK-NOT: .eabi_attribute      46
517
518; Tag_Virtualization_use
519; CORTEX-A7-CHECK: .eabi_attribute      68, 3
520; CORTEX-A7-NOFPU: .eabi_attribute      68, 3
521; CORTEX-A7-FPUV4: .eabi_attribute      68, 3
522
523; CORTEX-A5-DEFAULT:        .cpu    cortex-a5
524; CORTEX-A5-DEFAULT:        .eabi_attribute 6, 10
525; CORTEX-A5-DEFAULT:        .eabi_attribute 7, 65
526; CORTEX-A5-DEFAULT:        .eabi_attribute 8, 1
527; CORTEX-A5-DEFAULT:        .eabi_attribute 9, 2
528; CORTEX-A5-DEFAULT:        .fpu    neon-vfpv4
529; CORTEX-A5-NOT:   .eabi_attribute 19
530;; We default to IEEE 754 compliance
531; CORTEX-A5-DEFAULT:        .eabi_attribute 20, 1
532; CORTEX-A5-DEFAULT:        .eabi_attribute 21, 1
533; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 22
534; CORTEX-A5-DEFAULT:        .eabi_attribute 23, 3
535; CORTEX-A5-DEFAULT:        .eabi_attribute 24, 1
536; CORTEX-A5-DEFAULT:        .eabi_attribute 25, 1
537; CORTEX-A5-DEFAULT:        .eabi_attribute 42, 1
538; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 44
539; CORTEX-A5-DEFAULT:        .eabi_attribute 68, 1
540
541; CORTEX-A5-DEFAULT-FAST-NOT:   .eabi_attribute 19
542;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math
543;; is given.
544; CORTEX-A5-DEFAULT-FAST:        .eabi_attribute 20, 2
545; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21
546; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22
547; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1
548
549; CORTEX-A5-NONEON:        .cpu    cortex-a5
550; CORTEX-A5-NONEON:        .eabi_attribute 6, 10
551; CORTEX-A5-NONEON:        .eabi_attribute 7, 65
552; CORTEX-A5-NONEON:        .eabi_attribute 8, 1
553; CORTEX-A5-NONEON:        .eabi_attribute 9, 2
554; CORTEX-A5-NONEON:        .fpu    vfpv4-d16
555;; We default to IEEE 754 compliance
556; CORTEX-A5-NONEON:        .eabi_attribute 20, 1
557; CORTEX-A5-NONEON:        .eabi_attribute 21, 1
558; CORTEX-A5-NONEON-NOT:    .eabi_attribute 22
559; CORTEX-A5-NONEON:        .eabi_attribute 23, 3
560; CORTEX-A5-NONEON:        .eabi_attribute 24, 1
561; CORTEX-A5-NONEON:        .eabi_attribute 25, 1
562; CORTEX-A5-NONEON:        .eabi_attribute 42, 1
563; CORTEX-A5-NONEON:        .eabi_attribute 68, 1
564
565; CORTEX-A5-NONEON-FAST-NOT:   .eabi_attribute 19
566;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
567;; is given.
568; CORTEX-A5-NONEON-FAST:        .eabi_attribute 20, 2
569; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21
570; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22
571; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1
572
573; CORTEX-A5-NOFPU:        .cpu    cortex-a5
574; CORTEX-A5-NOFPU:        .eabi_attribute 6, 10
575; CORTEX-A5-NOFPU:        .eabi_attribute 7, 65
576; CORTEX-A5-NOFPU:        .eabi_attribute 8, 1
577; CORTEX-A5-NOFPU:        .eabi_attribute 9, 2
578; CORTEX-A5-NOFPU-NOT:    .fpu
579; CORTEX-A5-NOFPU-NOT:   .eabi_attribute 19
580;; We default to IEEE 754 compliance
581; CORTEX-A5-NOFPU:        .eabi_attribute 20, 1
582; CORTEX-A5-NOFPU:        .eabi_attribute 21, 1
583; CORTEX-A5-NOFPU-NOT:    .eabi_attribute 22
584; CORTEX-A5-NOFPU:        .eabi_attribute 23, 3
585; CORTEX-A5-NOFPU:        .eabi_attribute 24, 1
586; CORTEX-A5-NOFPU:        .eabi_attribute 25, 1
587; CORTEX-A5-NOFPU:        .eabi_attribute 42, 1
588; CORTEX-A5-NOFPU:        .eabi_attribute 68, 1
589
590; CORTEX-A5-NOFPU-FAST-NOT:   .eabi_attribute 19
591;; Despite there being no FPU, we chose to flush to zero preserving
592;; sign. This matches what the hardware would do for this architecture
593;; revision.
594; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
595; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21
596; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22
597; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1
598
599; CORTEX-A8-SOFT:  .cpu cortex-a8
600; CORTEX-A8-SOFT:  .eabi_attribute 6, 10
601; CORTEX-A8-SOFT:  .eabi_attribute 7, 65
602; CORTEX-A8-SOFT:  .eabi_attribute 8, 1
603; CORTEX-A8-SOFT:  .eabi_attribute 9, 2
604; CORTEX-A8-SOFT:  .fpu neon
605; CORTEX-A8-SOFT-NOT:   .eabi_attribute 19
606;; We default to IEEE 754 compliance
607; CORTEX-A8-SOFT:  .eabi_attribute 20, 1
608; CORTEX-A8-SOFT:  .eabi_attribute 21, 1
609; CORTEX-A8-SOFT-NOT:  .eabi_attribute 22
610; CORTEX-A8-SOFT:  .eabi_attribute 23, 3
611; CORTEX-A8-SOFT:  .eabi_attribute 24, 1
612; CORTEX-A8-SOFT:  .eabi_attribute 25, 1
613; CORTEX-A8-SOFT-NOT:  .eabi_attribute 27
614; CORTEX-A8-SOFT-NOT:  .eabi_attribute 28
615; CORTEX-A8-SOFT-NOT:  .eabi_attribute 36, 1
616; CORTEX-A8-SOFT:  .eabi_attribute 38, 1
617; CORTEX-A8-SOFT-NOT:  .eabi_attribute 42, 1
618; CORTEX-A8-SOFT-NOT:  .eabi_attribute 44
619; CORTEX-A8-SOFT:  .eabi_attribute 68, 1
620
621; CORTEX-A9-SOFT:  .cpu cortex-a9
622; CORTEX-A9-SOFT:  .eabi_attribute 6, 10
623; CORTEX-A9-SOFT:  .eabi_attribute 7, 65
624; CORTEX-A9-SOFT:  .eabi_attribute 8, 1
625; CORTEX-A9-SOFT:  .eabi_attribute 9, 2
626; CORTEX-A9-SOFT:  .fpu neon
627; CORTEX-A9-SOFT-NOT:   .eabi_attribute 19
628;; We default to IEEE 754 compliance
629; CORTEX-A9-SOFT:  .eabi_attribute 20, 1
630; CORTEX-A9-SOFT:  .eabi_attribute 21, 1
631; CORTEX-A9-SOFT-NOT:  .eabi_attribute 22
632; CORTEX-A9-SOFT:  .eabi_attribute 23, 3
633; CORTEX-A9-SOFT:  .eabi_attribute 24, 1
634; CORTEX-A9-SOFT:  .eabi_attribute 25, 1
635; CORTEX-A9-SOFT-NOT:  .eabi_attribute 27
636; CORTEX-A9-SOFT-NOT:  .eabi_attribute 28
637; CORTEX-A9-SOFT:  .eabi_attribute 36, 1
638; CORTEX-A9-SOFT:  .eabi_attribute 38, 1
639; CORTEX-A9-SOFT:  .eabi_attribute 42, 1
640; CORTEX-A9-SOFT-NOT:  .eabi_attribute 44
641; CORTEX-A9-SOFT:  .eabi_attribute 68, 1
642
643; CORTEX-A8-SOFT-FAST-NOT:   .eabi_attribute 19
644; CORTEX-A9-SOFT-FAST-NOT:   .eabi_attribute 19
645;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
646;; -ffast-math is specified.
647; CORTEX-A8-SOFT-FAST:  .eabi_attribute 20, 2
648; CORTEX-A9-SOFT-FAST:  .eabi_attribute 20, 2
649; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21
650; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22
651; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1
652
653; CORTEX-A8-HARD:  .cpu cortex-a8
654; CORTEX-A8-HARD:  .eabi_attribute 6, 10
655; CORTEX-A8-HARD:  .eabi_attribute 7, 65
656; CORTEX-A8-HARD:  .eabi_attribute 8, 1
657; CORTEX-A8-HARD:  .eabi_attribute 9, 2
658; CORTEX-A8-HARD:  .fpu neon
659; CORTEX-A8-HARD-NOT:   .eabi_attribute 19
660;; We default to IEEE 754 compliance
661; CORTEX-A8-HARD:  .eabi_attribute 20, 1
662; CORTEX-A8-HARD:  .eabi_attribute 21, 1
663; CORTEX-A8-HARD-NOT:  .eabi_attribute 22
664; CORTEX-A8-HARD:  .eabi_attribute 23, 3
665; CORTEX-A8-HARD:  .eabi_attribute 24, 1
666; CORTEX-A8-HARD:  .eabi_attribute 25, 1
667; CORTEX-A8-HARD-NOT:  .eabi_attribute 27
668; CORTEX-A8-HARD:  .eabi_attribute 28, 1
669; CORTEX-A8-HARD-NOT:  .eabi_attribute 36, 1
670; CORTEX-A8-HARD:  .eabi_attribute 38, 1
671; CORTEX-A8-HARD-NOT:  .eabi_attribute 42, 1
672; CORTEX-A8-HARD:  .eabi_attribute 68, 1
673
674
675
676; CORTEX-A9-HARD:  .cpu cortex-a9
677; CORTEX-A9-HARD:  .eabi_attribute 6, 10
678; CORTEX-A9-HARD:  .eabi_attribute 7, 65
679; CORTEX-A9-HARD:  .eabi_attribute 8, 1
680; CORTEX-A9-HARD:  .eabi_attribute 9, 2
681; CORTEX-A9-HARD:  .fpu neon
682; CORTEX-A9-HARD-NOT:   .eabi_attribute 19
683;; We default to IEEE 754 compliance
684; CORTEX-A9-HARD:  .eabi_attribute 20, 1
685; CORTEX-A9-HARD:  .eabi_attribute 21, 1
686; CORTEX-A9-HARD-NOT:  .eabi_attribute 22
687; CORTEX-A9-HARD:  .eabi_attribute 23, 3
688; CORTEX-A9-HARD:  .eabi_attribute 24, 1
689; CORTEX-A9-HARD:  .eabi_attribute 25, 1
690; CORTEX-A9-HARD-NOT:  .eabi_attribute 27
691; CORTEX-A9-HARD:  .eabi_attribute 28, 1
692; CORTEX-A9-HARD:  .eabi_attribute 36, 1
693; CORTEX-A9-HARD:  .eabi_attribute 38, 1
694; CORTEX-A9-HARD:  .eabi_attribute 42, 1
695; CORTEX-A9-HARD:  .eabi_attribute 68, 1
696
697; CORTEX-A8-HARD-FAST-NOT:   .eabi_attribute 19
698;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when
699;; -ffast-math is specified.
700; CORTEX-A8-HARD-FAST:  .eabi_attribute 20, 2
701; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 21
702; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 22
703; CORTEX-A8-HARD-FAST:  .eabi_attribute 23, 1
704
705; CORTEX-A9-HARD-FAST-NOT:   .eabi_attribute 19
706;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
707;; -ffast-math is specified.
708; CORTEX-A9-HARD-FAST:  .eabi_attribute 20, 2
709; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 21
710; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 22
711; CORTEX-A9-HARD-FAST:  .eabi_attribute 23, 1
712
713; CORTEX-A12-DEFAULT:  .cpu cortex-a12
714; CORTEX-A12-DEFAULT:  .eabi_attribute 6, 10
715; CORTEX-A12-DEFAULT:  .eabi_attribute 7, 65
716; CORTEX-A12-DEFAULT:  .eabi_attribute 8, 1
717; CORTEX-A12-DEFAULT:  .eabi_attribute 9, 2
718; CORTEX-A12-DEFAULT:  .fpu neon-vfpv4
719; CORTEX-A12-DEFAULT-NOT:   .eabi_attribute 19
720;; We default to IEEE 754 compliance
721; CORTEX-A12-DEFAULT:  .eabi_attribute 20, 1
722; CORTEX-A12-DEFAULT:  .eabi_attribute 21, 1
723; CORTEX-A12-DEFAULT-NOT:  .eabi_attribute 22
724; CORTEX-A12-DEFAULT:  .eabi_attribute 23, 3
725; CORTEX-A12-DEFAULT:  .eabi_attribute 24, 1
726; CORTEX-A12-DEFAULT:  .eabi_attribute 25, 1
727; CORTEX-A12-DEFAULT:  .eabi_attribute 42, 1
728; CORTEX-A12-DEFAULT:  .eabi_attribute 44, 2
729; CORTEX-A12-DEFAULT:  .eabi_attribute 68, 3
730
731; CORTEX-A12-DEFAULT-FAST-NOT:   .eabi_attribute 19
732;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when
733;; -ffast-math is specified.
734; CORTEX-A12-DEFAULT-FAST:  .eabi_attribute 20, 2
735; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 21
736; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 22
737; CORTEX-A12-HARD-FAST:  .eabi_attribute 23, 1
738
739; CORTEX-A12-NOFPU:  .cpu cortex-a12
740; CORTEX-A12-NOFPU:  .eabi_attribute 6, 10
741; CORTEX-A12-NOFPU:  .eabi_attribute 7, 65
742; CORTEX-A12-NOFPU:  .eabi_attribute 8, 1
743; CORTEX-A12-NOFPU:  .eabi_attribute 9, 2
744; CORTEX-A12-NOFPU-NOT:  .fpu
745; CORTEX-A12-NOFPU-NOT:   .eabi_attribute 19
746;; We default to IEEE 754 compliance
747; CORTEX-A12-NOFPU:  .eabi_attribute 20, 1
748; CORTEX-A12-NOFPU:  .eabi_attribute 21, 1
749; CORTEX-A12-NOFPU-NOT:  .eabi_attribute 22
750; CORTEX-A12-NOFPU:  .eabi_attribute 23, 3
751; CORTEX-A12-NOFPU:  .eabi_attribute 24, 1
752; CORTEX-A12-NOFPU:  .eabi_attribute 25, 1
753; CORTEX-A12-NOFPU:  .eabi_attribute 42, 1
754; CORTEX-A12-NOFPU:  .eabi_attribute 44, 2
755; CORTEX-A12-NOFPU:  .eabi_attribute 68, 3
756
757; CORTEX-A12-NOFPU-FAST-NOT:   .eabi_attribute 19
758;; Despite there being no FPU, we chose to flush to zero preserving
759;; sign. This matches what the hardware would do for this architecture
760;; revision.
761; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 20, 2
762; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 21
763; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 22
764; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 23, 1
765
766; CORTEX-A15: .cpu cortex-a15
767; CORTEX-A15: .eabi_attribute 6, 10
768; CORTEX-A15: .eabi_attribute 7, 65
769; CORTEX-A15: .eabi_attribute 8, 1
770; CORTEX-A15: .eabi_attribute 9, 2
771; CORTEX-A15: .fpu neon-vfpv4
772; CORTEX-A15-NOT:   .eabi_attribute 19
773;; We default to IEEE 754 compliance
774; CORTEX-A15: .eabi_attribute 20, 1
775; CORTEX-A15: .eabi_attribute 21, 1
776; CORTEX-A15-NOT: .eabi_attribute 22
777; CORTEX-A15: .eabi_attribute 23, 3
778; CORTEX-A15: .eabi_attribute 24, 1
779; CORTEX-A15: .eabi_attribute 25, 1
780; CORTEX-A15-NOT: .eabi_attribute 27
781; CORTEX-A15-NOT: .eabi_attribute 28
782; CORTEX-A15: .eabi_attribute 36, 1
783; CORTEX-A15: .eabi_attribute 38, 1
784; CORTEX-A15: .eabi_attribute 42, 1
785; CORTEX-A15: .eabi_attribute 44, 2
786; CORTEX-A15: .eabi_attribute 68, 3
787
788; CORTEX-A15-FAST-NOT:   .eabi_attribute 19
789;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when
790;; -ffast-math is specified.
791; CORTEX-A15-FAST: .eabi_attribute 20, 2
792; CORTEX-A15-FAST-NOT:  .eabi_attribute 21
793; CORTEX-A15-FAST-NOT:  .eabi_attribute 22
794; CORTEX-A15-FAST:  .eabi_attribute 23, 1
795
796; CORTEX-A17-DEFAULT:  .cpu cortex-a17
797; CORTEX-A17-DEFAULT:  .eabi_attribute 6, 10
798; CORTEX-A17-DEFAULT:  .eabi_attribute 7, 65
799; CORTEX-A17-DEFAULT:  .eabi_attribute 8, 1
800; CORTEX-A17-DEFAULT:  .eabi_attribute 9, 2
801; CORTEX-A17-DEFAULT:  .fpu neon-vfpv4
802; CORTEX-A17-DEFAULT-NOT:   .eabi_attribute 19
803;; We default to IEEE 754 compliance
804; CORTEX-A17-DEFAULT:  .eabi_attribute 20, 1
805; CORTEX-A17-DEFAULT:  .eabi_attribute 21, 1
806; CORTEX-A17-DEFAULT-NOT:  .eabi_attribute 22
807; CORTEX-A17-DEFAULT:  .eabi_attribute 23, 3
808; CORTEX-A17-DEFAULT:  .eabi_attribute 24, 1
809; CORTEX-A17-DEFAULT:  .eabi_attribute 25, 1
810; CORTEX-A17-DEFAULT:  .eabi_attribute 42, 1
811; CORTEX-A17-DEFAULT:  .eabi_attribute 44, 2
812; CORTEX-A17-DEFAULT:  .eabi_attribute 68, 3
813
814; CORTEX-A17-FAST-NOT:   .eabi_attribute 19
815;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when
816;; -ffast-math is specified.
817; CORTEX-A17-FAST:  .eabi_attribute 20, 2
818; CORTEX-A17-FAST-NOT:  .eabi_attribute 21
819; CORTEX-A17-FAST-NOT:  .eabi_attribute 22
820; CORTEX-A17-FAST:  .eabi_attribute 23, 1
821
822; CORTEX-A17-NOFPU:  .cpu cortex-a17
823; CORTEX-A17-NOFPU:  .eabi_attribute 6, 10
824; CORTEX-A17-NOFPU:  .eabi_attribute 7, 65
825; CORTEX-A17-NOFPU:  .eabi_attribute 8, 1
826; CORTEX-A17-NOFPU:  .eabi_attribute 9, 2
827; CORTEX-A17-NOFPU-NOT:  .fpu
828; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
829;; We default to IEEE 754 compliance
830; CORTEX-A17-NOFPU:  .eabi_attribute 20, 1
831; CORTEX-A17-NOFPU:  .eabi_attribute 21, 1
832; CORTEX-A17-NOFPU-NOT:  .eabi_attribute 22
833; CORTEX-A17-NOFPU:  .eabi_attribute 23, 3
834; CORTEX-A17-NOFPU:  .eabi_attribute 24, 1
835; CORTEX-A17-NOFPU:  .eabi_attribute 25, 1
836; CORTEX-A17-NOFPU:  .eabi_attribute 42, 1
837; CORTEX-A17-NOFPU:  .eabi_attribute 44, 2
838; CORTEX-A17-NOFPU:  .eabi_attribute 68, 3
839
840; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
841;; Despite there being no FPU, we chose to flush to zero preserving
842;; sign. This matches what the hardware would do for this architecture
843;; revision.
844; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 20, 2
845; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 21
846; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 22
847; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 23, 1
848
849; CORTEX-M0:  .cpu cortex-m0
850; CORTEX-M0:  .eabi_attribute 6, 12
851; CORTEX-M0-NOT:  .eabi_attribute 7
852; CORTEX-M0:  .eabi_attribute 8, 0
853; CORTEX-M0:  .eabi_attribute 9, 1
854; CORTEX-M0-NOT:   .eabi_attribute 19
855;; We default to IEEE 754 compliance
856; CORTEX-M0:  .eabi_attribute 20, 1
857; CORTEX-M0:  .eabi_attribute 21, 1
858; CORTEX-M0-NOT:  .eabi_attribute 22
859; CORTEX-M0:  .eabi_attribute 23, 3
860; CORTEX-M0: .eabi_attribute 34, 0
861; CORTEX-M0:  .eabi_attribute 24, 1
862; CORTEX-M0:  .eabi_attribute 25, 1
863; CORTEX-M0-NOT:  .eabi_attribute 27
864; CORTEX-M0-NOT:  .eabi_attribute 28
865; CORTEX-M0-NOT:  .eabi_attribute 36
866; CORTEX-M0:  .eabi_attribute 38, 1
867; CORTEX-M0-NOT:  .eabi_attribute 42
868; CORTEX-M0-NOT:  .eabi_attribute 44
869; CORTEX-M0-NOT:  .eabi_attribute 68
870
871; CORTEX-M0-FAST-NOT:   .eabi_attribute 19
872;; Despite the M0 CPU having no FPU in this scenario, we chose to
873;; flush to positive zero here. There's no hardware support doing
874;; this, but the fast maths software library might and such behaviour
875;; would match hardware support on this architecture revision if it
876;; existed.
877; CORTEX-M0-FAST-NOT:  .eabi_attribute 20
878; CORTEX-M0-FAST-NOT:  .eabi_attribute 21
879; CORTEX-M0-FAST-NOT:  .eabi_attribute 22
880; CORTEX-M0-FAST:  .eabi_attribute 23, 1
881
882; CORTEX-M0PLUS:  .cpu cortex-m0plus
883; CORTEX-M0PLUS:  .eabi_attribute 6, 12
884; CORTEX-M0PLUS-NOT:  .eabi_attribute 7
885; CORTEX-M0PLUS:  .eabi_attribute 8, 0
886; CORTEX-M0PLUS:  .eabi_attribute 9, 1
887; CORTEX-M0PLUS-NOT:   .eabi_attribute 19
888;; We default to IEEE 754 compliance
889; CORTEX-M0PLUS:  .eabi_attribute 20, 1
890; CORTEX-M0PLUS:  .eabi_attribute 21, 1
891; CORTEX-M0PLUS-NOT:  .eabi_attribute 22
892; CORTEX-M0PLUS:  .eabi_attribute 23, 3
893; CORTEX-M0PLUS:  .eabi_attribute 24, 1
894; CORTEX-M0PLUS:  .eabi_attribute 25, 1
895; CORTEX-M0PLUS-NOT:  .eabi_attribute 27
896; CORTEX-M0PLUS-NOT:  .eabi_attribute 28
897; CORTEX-M0PLUS-NOT:  .eabi_attribute 36
898; CORTEX-M0PLUS:  .eabi_attribute 38, 1
899; CORTEX-M0PLUS-NOT:  .eabi_attribute 42
900; CORTEX-M0PLUS-NOT:  .eabi_attribute 44
901; CORTEX-M0PLUS-NOT:  .eabi_attribute 68
902
903; CORTEX-M0PLUS-FAST-NOT:   .eabi_attribute 19
904;; Despite the M0+ CPU having no FPU in this scenario, we chose to
905;; flush to positive zero here. There's no hardware support doing
906;; this, but the fast maths software library might and such behaviour
907;; would match hardware support on this architecture revision if it
908;; existed.
909; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 20
910; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 21
911; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 22
912; CORTEX-M0PLUS-FAST:  .eabi_attribute 23, 1
913
914; CORTEX-M1:  .cpu cortex-m1
915; CORTEX-M1:  .eabi_attribute 6, 12
916; CORTEX-M1-NOT:  .eabi_attribute 7
917; CORTEX-M1:  .eabi_attribute 8, 0
918; CORTEX-M1:  .eabi_attribute 9, 1
919; CORTEX-M1-NOT:   .eabi_attribute 19
920;; We default to IEEE 754 compliance
921; CORTEX-M1:  .eabi_attribute 20, 1
922; CORTEX-M1:  .eabi_attribute 21, 1
923; CORTEX-M1-NOT:  .eabi_attribute 22
924; CORTEX-M1:  .eabi_attribute 23, 3
925; CORTEX-M1:  .eabi_attribute 24, 1
926; CORTEX-M1:  .eabi_attribute 25, 1
927; CORTEX-M1-NOT:  .eabi_attribute 27
928; CORTEX-M1-NOT:  .eabi_attribute 28
929; CORTEX-M1-NOT:  .eabi_attribute 36
930; CORTEX-M1:  .eabi_attribute 38, 1
931; CORTEX-M1-NOT:  .eabi_attribute 42
932; CORTEX-M1-NOT:  .eabi_attribute 44
933; CORTEX-M1-NOT:  .eabi_attribute 68
934
935; CORTEX-M1-FAST-NOT:   .eabi_attribute 19
936;; Despite the M1 CPU having no FPU in this scenario, we chose to
937;; flush to positive zero here. There's no hardware support doing
938;; this, but the fast maths software library might and such behaviour
939;; would match hardware support on this architecture revision if it
940;; existed.
941; CORTEX-M1-FAST-NOT:  .eabi_attribute 20
942; CORTEX-M1-FAST-NOT:  .eabi_attribute 21
943; CORTEX-M1-FAST-NOT:  .eabi_attribute 22
944; CORTEX-M1-FAST:  .eabi_attribute 23, 1
945
946; SC000:  .cpu sc000
947; SC000:  .eabi_attribute 6, 12
948; SC000-NOT:  .eabi_attribute 7
949; SC000:  .eabi_attribute 8, 0
950; SC000:  .eabi_attribute 9, 1
951; SC000-NOT:   .eabi_attribute 19
952;; We default to IEEE 754 compliance
953; SC000:  .eabi_attribute 20, 1
954; SC000:  .eabi_attribute 21, 1
955; SC000-NOT:  .eabi_attribute 22
956; SC000:  .eabi_attribute 23, 3
957; SC000:  .eabi_attribute 24, 1
958; SC000:  .eabi_attribute 25, 1
959; SC000-NOT:  .eabi_attribute 27
960; SC000-NOT:  .eabi_attribute 28
961; SC000-NOT:  .eabi_attribute 36
962; SC000:  .eabi_attribute 38, 1
963; SC000-NOT:  .eabi_attribute 42
964; SC000-NOT:  .eabi_attribute 44
965; SC000-NOT:  .eabi_attribute 68
966
967; SC000-FAST-NOT:   .eabi_attribute 19
968;; Despite the SC000 CPU having no FPU in this scenario, we chose to
969;; flush to positive zero here. There's no hardware support doing
970;; this, but the fast maths software library might and such behaviour
971;; would match hardware support on this architecture revision if it
972;; existed.
973; SC000-FAST-NOT:  .eabi_attribute 20
974; SC000-FAST-NOT:  .eabi_attribute 21
975; SC000-FAST-NOT:  .eabi_attribute 22
976; SC000-FAST:  .eabi_attribute 23, 1
977
978; CORTEX-M3:  .cpu cortex-m3
979; CORTEX-M3:  .eabi_attribute 6, 10
980; CORTEX-M3:  .eabi_attribute 7, 77
981; CORTEX-M3:  .eabi_attribute 8, 0
982; CORTEX-M3:  .eabi_attribute 9, 2
983; CORTEX-M3-NOT:   .eabi_attribute 19
984;; We default to IEEE 754 compliance
985; CORTEX-M3:  .eabi_attribute 20, 1
986; CORTEX-M3:  .eabi_attribute 21, 1
987; CORTEX-M3-NOT:  .eabi_attribute 22
988; CORTEX-M3:  .eabi_attribute 23, 3
989; CORTEX-M3:  .eabi_attribute 24, 1
990; CORTEX-M3:  .eabi_attribute 25, 1
991; CORTEX-M3-NOT:  .eabi_attribute 27
992; CORTEX-M3-NOT:  .eabi_attribute 28
993; CORTEX-M3-NOT:  .eabi_attribute 36
994; CORTEX-M3:  .eabi_attribute 38, 1
995; CORTEX-M3-NOT:  .eabi_attribute 42
996; CORTEX-M3-NOT:  .eabi_attribute 44
997; CORTEX-M3-NOT:  .eabi_attribute 68
998
999; CORTEX-M3-FAST-NOT:   .eabi_attribute 19
1000;; Despite there being no FPU, we chose to flush to zero preserving
1001;; sign. This matches what the hardware would do for this architecture
1002;; revision.
1003; CORTEX-M3-FAST:  .eabi_attribute 20, 2
1004; CORTEX-M3-FAST-NOT:  .eabi_attribute 21
1005; CORTEX-M3-FAST-NOT:  .eabi_attribute 22
1006; CORTEX-M3-FAST:  .eabi_attribute 23, 1
1007
1008; SC300:  .cpu sc300
1009; SC300:  .eabi_attribute 6, 10
1010; SC300:  .eabi_attribute 7, 77
1011; SC300:  .eabi_attribute 8, 0
1012; SC300:  .eabi_attribute 9, 2
1013; SC300-NOT:   .eabi_attribute 19
1014;; We default to IEEE 754 compliance
1015; SC300:  .eabi_attribute 20, 1
1016; SC300:  .eabi_attribute 21, 1
1017; SC300-NOT:  .eabi_attribute 22
1018; SC300:  .eabi_attribute 23, 3
1019; SC300:  .eabi_attribute 24, 1
1020; SC300:  .eabi_attribute 25, 1
1021; SC300-NOT:  .eabi_attribute 27
1022; SC300-NOT:  .eabi_attribute 28
1023; SC300-NOT:  .eabi_attribute 36
1024; SC300:  .eabi_attribute 38, 1
1025; SC300-NOT:  .eabi_attribute 42
1026; SC300-NOT:  .eabi_attribute 44
1027; SC300-NOT:  .eabi_attribute 68
1028
1029; SC300-FAST-NOT:   .eabi_attribute 19
1030;; Despite there being no FPU, we chose to flush to zero preserving
1031;; sign. This matches what the hardware would do for this architecture
1032;; revision.
1033; SC300-FAST:  .eabi_attribute 20, 2
1034; SC300-FAST-NOT:  .eabi_attribute 21
1035; SC300-FAST-NOT:  .eabi_attribute 22
1036; SC300-FAST:  .eabi_attribute 23, 1
1037
1038; CORTEX-M4-SOFT:  .cpu cortex-m4
1039; CORTEX-M4-SOFT:  .eabi_attribute 6, 13
1040; CORTEX-M4-SOFT:  .eabi_attribute 7, 77
1041; CORTEX-M4-SOFT:  .eabi_attribute 8, 0
1042; CORTEX-M4-SOFT:  .eabi_attribute 9, 2
1043; CORTEX-M4-SOFT:  .fpu fpv4-sp-d16
1044; CORTEX-M4-SOFT-NOT:   .eabi_attribute 19
1045;; We default to IEEE 754 compliance
1046; CORTEX-M4-SOFT:  .eabi_attribute 20, 1
1047; CORTEX-M4-SOFT:  .eabi_attribute 21, 1
1048; CORTEX-M4-SOFT-NOT:  .eabi_attribute 22
1049; CORTEX-M4-SOFT:  .eabi_attribute 23, 3
1050; CORTEX-M4-SOFT:  .eabi_attribute 24, 1
1051; CORTEX-M4-SOFT:  .eabi_attribute 25, 1
1052; CORTEX-M4-SOFT:  .eabi_attribute 27, 1
1053; CORTEX-M4-SOFT-NOT:  .eabi_attribute 28
1054; CORTEX-M4-SOFT:  .eabi_attribute 36, 1
1055; CORTEX-M4-SOFT:  .eabi_attribute 38, 1
1056; CORTEX-M4-SOFT-NOT:  .eabi_attribute 42
1057; CORTEX-M4-SOFT-NOT:  .eabi_attribute 44
1058; CORTEX-M4-SOFT-NOT:  .eabi_attribute 68
1059
1060; CORTEX-M4-SOFT-FAST-NOT:   .eabi_attribute 19
1061;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1062;; -ffast-math is specified.
1063; CORTEX-M4-SOFT-FAST:  .eabi_attribute 20, 2
1064; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 21
1065; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 22
1066; CORTEX-M4-SOFT-FAST:  .eabi_attribute 23, 1
1067
1068; CORTEX-M4-HARD:  .cpu cortex-m4
1069; CORTEX-M4-HARD:  .eabi_attribute 6, 13
1070; CORTEX-M4-HARD:  .eabi_attribute 7, 77
1071; CORTEX-M4-HARD:  .eabi_attribute 8, 0
1072; CORTEX-M4-HARD:  .eabi_attribute 9, 2
1073; CORTEX-M4-HARD:  .fpu fpv4-sp-d16
1074; CORTEX-M4-HARD-NOT:   .eabi_attribute 19
1075;; We default to IEEE 754 compliance
1076; CORTEX-M4-HARD:  .eabi_attribute 20, 1
1077; CORTEX-M4-HARD:  .eabi_attribute 21, 1
1078; CORTEX-M4-HARD-NOT:  .eabi_attribute 22
1079; CORTEX-M4-HARD:  .eabi_attribute 23, 3
1080; CORTEX-M4-HARD:  .eabi_attribute 24, 1
1081; CORTEX-M4-HARD:  .eabi_attribute 25, 1
1082; CORTEX-M4-HARD:  .eabi_attribute 27, 1
1083; CORTEX-M4-HARD:  .eabi_attribute 28, 1
1084; CORTEX-M4-HARD:  .eabi_attribute 36, 1
1085; CORTEX-M4-HARD:  .eabi_attribute 38, 1
1086; CORTEX-M4-HARD-NOT:  .eabi_attribute 42
1087; CORTEX-M4-HARD-NOT:  .eabi_attribute 44
1088; CORTEX-M4-HARD-NOT:  .eabi_attribute 68
1089
1090; CORTEX-M4-HARD-FAST-NOT:   .eabi_attribute 19
1091;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1092;; -ffast-math is specified.
1093; CORTEX-M4-HARD-FAST:  .eabi_attribute 20, 2
1094; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 21
1095; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 22
1096; CORTEX-M4-HARD-FAST:  .eabi_attribute 23, 1
1097
1098; CORTEX-M7:  .cpu    cortex-m7
1099; CORTEX-M7:  .eabi_attribute 6, 13
1100; CORTEX-M7:  .eabi_attribute 7, 77
1101; CORTEX-M7:  .eabi_attribute 8, 0
1102; CORTEX-M7:  .eabi_attribute 9, 2
1103; CORTEX-M7-SOFT-NOT: .fpu
1104; CORTEX-M7-SINGLE:  .fpu fpv5-sp-d16
1105; CORTEX-M7-DOUBLE:  .fpu fpv5-d16
1106; CORTEX-M7:  .eabi_attribute 17, 1
1107; CORTEX-M7-NOT:   .eabi_attribute 19
1108;; We default to IEEE 754 compliance
1109; CORTEX-M7:  .eabi_attribute 20, 1
1110; CORTEX-M7:  .eabi_attribute 21, 1
1111; CORTEX-M7-NOT:  .eabi_attribute 22
1112; CORTEX-M7:  .eabi_attribute 23, 3
1113; CORTEX-M7:  .eabi_attribute 24, 1
1114; CORTEX-M7:  .eabi_attribute 25, 1
1115; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
1116; CORTEX-M7-SINGLE:  .eabi_attribute 27, 1
1117; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
1118; CORTEX-M7:  .eabi_attribute 36, 1
1119; CORTEX-M7:  .eabi_attribute 38, 1
1120; CORTEX-M7-NOT:  .eabi_attribute 44
1121; CORTEX-M7:  .eabi_attribute 14, 0
1122
1123; CORTEX-M7-NOFPU-FAST-NOT:   .eabi_attribute 19
1124;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1125; CORTEX-M7-FAST:  .eabi_attribute 20, 2
1126;; Despite there being no FPU, we chose to flush to zero preserving
1127;; sign. This matches what the hardware would do for this architecture
1128;; revision.
1129; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
1130; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 21
1131; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 22
1132; CORTEX-M7-NOFPU-FAST:  .eabi_attribute 23, 1
1133
1134; CORTEX-R4:  .cpu cortex-r4
1135; CORTEX-R4:  .eabi_attribute 6, 10
1136; CORTEX-R4:  .eabi_attribute 7, 82
1137; CORTEX-R4:  .eabi_attribute 8, 1
1138; CORTEX-R4:  .eabi_attribute 9, 2
1139; CORTEX-R4-NOT:  .fpu vfpv3-d16
1140; CORTEX-R4-NOT:   .eabi_attribute 19
1141;; We default to IEEE 754 compliance
1142; CORTEX-R4:  .eabi_attribute 20, 1
1143; CORTEX-R4:  .eabi_attribute 21, 1
1144; CORTEX-R4-NOT:  .eabi_attribute 22
1145; CORTEX-R4:  .eabi_attribute 23, 3
1146; CORTEX-R4:  .eabi_attribute 24, 1
1147; CORTEX-R4:  .eabi_attribute 25, 1
1148; CORTEX-R4-NOT:  .eabi_attribute 28
1149; CORTEX-R4-NOT:  .eabi_attribute 36
1150; CORTEX-R4:  .eabi_attribute 38, 1
1151; CORTEX-R4-NOT:  .eabi_attribute 42
1152; CORTEX-R4-NOT:  .eabi_attribute 44
1153; CORTEX-R4-NOT:  .eabi_attribute 68
1154
1155; CORTEX-R4F:  .cpu cortex-r4f
1156; CORTEX-R4F:  .eabi_attribute 6, 10
1157; CORTEX-R4F:  .eabi_attribute 7, 82
1158; CORTEX-R4F:  .eabi_attribute 8, 1
1159; CORTEX-R4F:  .eabi_attribute 9, 2
1160; CORTEX-R4F:  .fpu vfpv3-d16
1161; CORTEX-R4F-NOT:   .eabi_attribute 19
1162;; We default to IEEE 754 compliance
1163; CORTEX-R4F:  .eabi_attribute 20, 1
1164; CORTEX-R4F:  .eabi_attribute 21, 1
1165; CORTEX-R4F-NOT:  .eabi_attribute 22
1166; CORTEX-R4F:  .eabi_attribute 23, 3
1167; CORTEX-R4F:  .eabi_attribute 24, 1
1168; CORTEX-R4F:  .eabi_attribute 25, 1
1169; CORTEX-R4F-NOT:  .eabi_attribute 27, 1
1170; CORTEX-R4F-NOT:  .eabi_attribute 28
1171; CORTEX-R4F-NOT:  .eabi_attribute 36
1172; CORTEX-R4F:  .eabi_attribute 38, 1
1173; CORTEX-R4F-NOT:  .eabi_attribute 42
1174; CORTEX-R4F-NOT:  .eabi_attribute 44
1175; CORTEX-R4F-NOT:  .eabi_attribute 68
1176
1177; CORTEX-R5:  .cpu cortex-r5
1178; CORTEX-R5:  .eabi_attribute 6, 10
1179; CORTEX-R5:  .eabi_attribute 7, 82
1180; CORTEX-R5:  .eabi_attribute 8, 1
1181; CORTEX-R5:  .eabi_attribute 9, 2
1182; CORTEX-R5:  .fpu vfpv3-d16
1183; CORTEX-R5-NOT:   .eabi_attribute 19
1184;; We default to IEEE 754 compliance
1185; CORTEX-R5:  .eabi_attribute 20, 1
1186; CORTEX-R5:  .eabi_attribute 21, 1
1187; CORTEX-R5-NOT:  .eabi_attribute 22
1188; CORTEX-R5:  .eabi_attribute 23, 3
1189; CORTEX-R5:  .eabi_attribute 24, 1
1190; CORTEX-R5:  .eabi_attribute 25, 1
1191; CORTEX-R5-NOT:  .eabi_attribute 27, 1
1192; CORTEX-R5-NOT:  .eabi_attribute 28
1193; CORTEX-R5-NOT:  .eabi_attribute 36
1194; CORTEX-R5:  .eabi_attribute 38, 1
1195; CORTEX-R5-NOT:  .eabi_attribute 42
1196; CORTEX-R5:  .eabi_attribute 44, 2
1197; CORTEX-R5-NOT:  .eabi_attribute 68
1198
1199; CORTEX-R5-FAST-NOT:   .eabi_attribute 19
1200;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
1201; CORTEX-R5-FAST:  .eabi_attribute 20, 2
1202; CORTEX-R5-FAST-NOT:  .eabi_attribute 21
1203; CORTEX-R5-FAST-NOT:  .eabi_attribute 22
1204; CORTEX-R5-FAST:  .eabi_attribute 23, 1
1205
1206; CORTEX-R7:  .cpu cortex-r7
1207; CORTEX-R7:  .eabi_attribute 6, 10
1208; CORTEX-R7:  .eabi_attribute 7, 82
1209; CORTEX-R7:  .eabi_attribute 8, 1
1210; CORTEX-R7:  .eabi_attribute 9, 2
1211; CORTEX-R7:  .fpu vfpv3-d16-fp16
1212; CORTEX-R7-NOT:   .eabi_attribute 19
1213;; We default to IEEE 754 compliance
1214; CORTEX-R7:  .eabi_attribute 20, 1
1215; CORTEX-R7:  .eabi_attribute 21, 1
1216; CORTEX-R7-NOT:  .eabi_attribute 22
1217; CORTEX-R7:  .eabi_attribute 23, 3
1218; CORTEX-R7:  .eabi_attribute 24, 1
1219; CORTEX-R7:  .eabi_attribute 25, 1
1220; CORTEX-R7-NOT:  .eabi_attribute 28
1221; CORTEX-R7:  .eabi_attribute 36, 1
1222; CORTEX-R7:  .eabi_attribute 38, 1
1223; CORTEX-R7:  .eabi_attribute 42, 1
1224; CORTEX-R7:  .eabi_attribute 44, 2
1225; CORTEX-R7-NOT:  .eabi_attribute 68
1226
1227; CORTEX-R7-FAST-NOT:   .eabi_attribute 19
1228;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
1229; CORTEX-R7-FAST:  .eabi_attribute 20, 2
1230; CORTEX-R7-FAST-NOT:  .eabi_attribute 21
1231; CORTEX-R7-FAST-NOT:  .eabi_attribute 22
1232; CORTEX-R7-FAST:  .eabi_attribute 23, 1
1233
1234; CORTEX-R8:  .cpu cortex-r8
1235; CORTEX-R8:  .eabi_attribute 6, 10
1236; CORTEX-R8:  .eabi_attribute 7, 82
1237; CORTEX-R8:  .eabi_attribute 8, 1
1238; CORTEX-R8:  .eabi_attribute 9, 2
1239; CORTEX-R8:  .fpu vfpv3-d16-fp16
1240; CORTEX-R8-NOT:   .eabi_attribute 19
1241;; We default to IEEE 754 compliance
1242; CORTEX-R8:  .eabi_attribute 20, 1
1243; CORTEX-R8:  .eabi_attribute 21, 1
1244; CORTEX-R8-NOT:  .eabi_attribute 22
1245; CORTEX-R8:  .eabi_attribute 23, 3
1246; CORTEX-R8:  .eabi_attribute 24, 1
1247; CORTEX-R8:  .eabi_attribute 25, 1
1248; CORTEX-R8-NOT:  .eabi_attribute 28
1249; CORTEX-R8:  .eabi_attribute 36, 1
1250; CORTEX-R8:  .eabi_attribute 38, 1
1251; CORTEX-R8:  .eabi_attribute 42, 1
1252; CORTEX-R8:  .eabi_attribute 44, 2
1253; CORTEX-R8-NOT:  .eabi_attribute 68
1254
1255; CORTEX-R8-FAST-NOT:   .eabi_attribute 19
1256;; The R8 has the VFPv3 FP unit, which always flushes preserving sign.
1257; CORTEX-R8-FAST:  .eabi_attribute 20, 2
1258; CORTEX-R8-FAST-NOT:  .eabi_attribute 21
1259; CORTEX-R8-FAST-NOT:  .eabi_attribute 22
1260; CORTEX-R8-FAST:  .eabi_attribute 23, 1
1261
1262; CORTEX-A32:  .cpu cortex-a32
1263; CORTEX-A32:  .eabi_attribute 6, 14
1264; CORTEX-A32:  .eabi_attribute 7, 65
1265; CORTEX-A32:  .eabi_attribute 8, 1
1266; CORTEX-A32:  .eabi_attribute 9, 2
1267; CORTEX-A32:  .fpu crypto-neon-fp-armv8
1268; CORTEX-A32:  .eabi_attribute 12, 3
1269; CORTEX-A32-NOT:   .eabi_attribute 19
1270;; We default to IEEE 754 compliance
1271; CORTEX-A32:  .eabi_attribute 20, 1
1272; CORTEX-A32:  .eabi_attribute 21, 1
1273; CORTEX-A32-NOT:  .eabi_attribute 22
1274; CORTEX-A32:  .eabi_attribute 23, 3
1275; CORTEX-A32:  .eabi_attribute 24, 1
1276; CORTEX-A32:  .eabi_attribute 25, 1
1277; CORTEX-A32-NOT:  .eabi_attribute 27
1278; CORTEX-A32-NOT:  .eabi_attribute 28
1279; CORTEX-A32:  .eabi_attribute 36, 1
1280; CORTEX-A32:  .eabi_attribute 38, 1
1281; CORTEX-A32:  .eabi_attribute 42, 1
1282; CORTEX-A32-NOT:  .eabi_attribute 44
1283; CORTEX-A32:  .eabi_attribute 68, 3
1284
1285; CORTEX-A32-FAST-NOT:   .eabi_attribute 19
1286;; The A32 has the ARMv8 FP unit, which always flushes preserving sign.
1287; CORTEX-A32-FAST:  .eabi_attribute 20, 2
1288; CORTEX-A32-FAST-NOT:  .eabi_attribute 21
1289; CORTEX-A32-FAST-NOT:  .eabi_attribute 22
1290; CORTEX-A32-FAST:  .eabi_attribute 23, 1
1291
1292; CORTEX-A35:  .cpu cortex-a35
1293; CORTEX-A35:  .eabi_attribute 6, 14
1294; CORTEX-A35:  .eabi_attribute 7, 65
1295; CORTEX-A35:  .eabi_attribute 8, 1
1296; CORTEX-A35:  .eabi_attribute 9, 2
1297; CORTEX-A35:  .fpu crypto-neon-fp-armv8
1298; CORTEX-A35:  .eabi_attribute 12, 3
1299; CORTEX-A35-NOT:   .eabi_attribute 19
1300;; We default to IEEE 754 compliance
1301; CORTEX-A35:  .eabi_attribute 20, 1
1302; CORTEX-A35:  .eabi_attribute 21, 1
1303; CORTEX-A35-NOT:  .eabi_attribute 22
1304; CORTEX-A35:  .eabi_attribute 23, 3
1305; CORTEX-A35:  .eabi_attribute 24, 1
1306; CORTEX-A35:  .eabi_attribute 25, 1
1307; CORTEX-A35-NOT:  .eabi_attribute 27
1308; CORTEX-A35-NOT:  .eabi_attribute 28
1309; CORTEX-A35:  .eabi_attribute 36, 1
1310; CORTEX-A35:  .eabi_attribute 38, 1
1311; CORTEX-A35:  .eabi_attribute 42, 1
1312; CORTEX-A35-NOT:  .eabi_attribute 44
1313; CORTEX-A35:  .eabi_attribute 68, 3
1314
1315; CORTEX-A35-FAST-NOT:   .eabi_attribute 19
1316;; The A35 has the ARMv8 FP unit, which always flushes preserving sign.
1317; CORTEX-A35-FAST:  .eabi_attribute 20, 2
1318; CORTEX-A35-FAST-NOT:  .eabi_attribute 21
1319; CORTEX-A35-FAST-NOT:  .eabi_attribute 22
1320; CORTEX-A35-FAST:  .eabi_attribute 23, 1
1321
1322; CORTEX-A53:  .cpu cortex-a53
1323; CORTEX-A53:  .eabi_attribute 6, 14
1324; CORTEX-A53:  .eabi_attribute 7, 65
1325; CORTEX-A53:  .eabi_attribute 8, 1
1326; CORTEX-A53:  .eabi_attribute 9, 2
1327; CORTEX-A53:  .fpu crypto-neon-fp-armv8
1328; CORTEX-A53:  .eabi_attribute 12, 3
1329; CORTEX-A53-NOT:   .eabi_attribute 19
1330;; We default to IEEE 754 compliance
1331; CORTEX-A53:  .eabi_attribute 20, 1
1332; CORTEX-A53:  .eabi_attribute 21, 1
1333; CORTEX-A53-NOT:  .eabi_attribute 22
1334; CORTEX-A53:  .eabi_attribute 23, 3
1335; CORTEX-A53:  .eabi_attribute 24, 1
1336; CORTEX-A53:  .eabi_attribute 25, 1
1337; CORTEX-A53-NOT:  .eabi_attribute 27
1338; CORTEX-A53-NOT:  .eabi_attribute 28
1339; CORTEX-A53:  .eabi_attribute 36, 1
1340; CORTEX-A53:  .eabi_attribute 38, 1
1341; CORTEX-A53:  .eabi_attribute 42, 1
1342; CORTEX-A53-NOT:  .eabi_attribute 44
1343; CORTEX-A53:  .eabi_attribute 68, 3
1344
1345; CORTEX-A53-FAST-NOT:   .eabi_attribute 19
1346;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1347; CORTEX-A53-FAST:  .eabi_attribute 20, 2
1348; CORTEX-A53-FAST-NOT:  .eabi_attribute 21
1349; CORTEX-A53-FAST-NOT:  .eabi_attribute 22
1350; CORTEX-A53-FAST:  .eabi_attribute 23, 1
1351
1352; CORTEX-A57:  .cpu cortex-a57
1353; CORTEX-A57:  .eabi_attribute 6, 14
1354; CORTEX-A57:  .eabi_attribute 7, 65
1355; CORTEX-A57:  .eabi_attribute 8, 1
1356; CORTEX-A57:  .eabi_attribute 9, 2
1357; CORTEX-A57:  .fpu crypto-neon-fp-armv8
1358; CORTEX-A57:  .eabi_attribute 12, 3
1359; CORTEX-A57-NOT:   .eabi_attribute 19
1360;; We default to IEEE 754 compliance
1361; CORTEX-A57:  .eabi_attribute 20, 1
1362; CORTEX-A57:  .eabi_attribute 21, 1
1363; CORTEX-A57-NOT:  .eabi_attribute 22
1364; CORTEX-A57:  .eabi_attribute 23, 3
1365; CORTEX-A57:  .eabi_attribute 24, 1
1366; CORTEX-A57:  .eabi_attribute 25, 1
1367; CORTEX-A57-NOT:  .eabi_attribute 27
1368; CORTEX-A57-NOT:  .eabi_attribute 28
1369; CORTEX-A57:  .eabi_attribute 36, 1
1370; CORTEX-A57:  .eabi_attribute 38, 1
1371; CORTEX-A57:  .eabi_attribute 42, 1
1372; CORTEX-A57-NOT:  .eabi_attribute 44
1373; CORTEX-A57:  .eabi_attribute 68, 3
1374
1375; CORTEX-A57-FAST-NOT:   .eabi_attribute 19
1376;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1377; CORTEX-A57-FAST:  .eabi_attribute 20, 2
1378; CORTEX-A57-FAST-NOT:  .eabi_attribute 21
1379; CORTEX-A57-FAST-NOT:  .eabi_attribute 22
1380; CORTEX-A57-FAST:  .eabi_attribute 23, 1
1381
1382; CORTEX-A72:  .cpu cortex-a72
1383; CORTEX-A72:  .eabi_attribute 6, 14
1384; CORTEX-A72:  .eabi_attribute 7, 65
1385; CORTEX-A72:  .eabi_attribute 8, 1
1386; CORTEX-A72:  .eabi_attribute 9, 2
1387; CORTEX-A72:  .fpu crypto-neon-fp-armv8
1388; CORTEX-A72:  .eabi_attribute 12, 3
1389; CORTEX-A72-NOT:   .eabi_attribute 19
1390;; We default to IEEE 754 compliance
1391; CORTEX-A72:  .eabi_attribute 20, 1
1392; CORTEX-A72:  .eabi_attribute 21, 1
1393; CORTEX-A72-NOT:  .eabi_attribute 22
1394; CORTEX-A72:  .eabi_attribute 23, 3
1395; CORTEX-A72:  .eabi_attribute 24, 1
1396; CORTEX-A72:  .eabi_attribute 25, 1
1397; CORTEX-A72-NOT:  .eabi_attribute 27
1398; CORTEX-A72-NOT:  .eabi_attribute 28
1399; CORTEX-A72:  .eabi_attribute 36, 1
1400; CORTEX-A72:  .eabi_attribute 38, 1
1401; CORTEX-A72:  .eabi_attribute 42, 1
1402; CORTEX-A72-NOT:  .eabi_attribute 44
1403; CORTEX-A72:  .eabi_attribute 68, 3
1404
1405; CORTEX-A72-FAST-NOT:   .eabi_attribute 19
1406;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1407; CORTEX-A72-FAST:  .eabi_attribute 20, 2
1408; CORTEX-A72-FAST-NOT:  .eabi_attribute 21
1409; CORTEX-A72-FAST-NOT:  .eabi_attribute 22
1410; CORTEX-A72-FAST:  .eabi_attribute 23, 1
1411
1412; CORTEX-A73:  .cpu cortex-a73
1413; CORTEX-A73:  .eabi_attribute 6, 14
1414; CORTEX-A73:  .eabi_attribute 7, 65
1415; CORTEX-A73:  .eabi_attribute 8, 1
1416; CORTEX-A73:  .eabi_attribute 9, 2
1417; CORTEX-A73:  .fpu  crypto-neon-fp-armv8
1418; CORTEX-A73:  .eabi_attribute 12, 3
1419; CORTEX-A73-NOT: .eabi_attribute 19
1420;; We default to IEEE 754 compliance
1421; CORTEX-A73:  .eabi_attribute 20, 1
1422; CORTEX-A73:  .eabi_attribute 21, 1
1423; CORTEX-A73-NOT:  .eabi_attribute 22
1424; CORTEX-A73:  .eabi_attribute 23, 3
1425; CORTEX-A73:  .eabi_attribute 24, 1
1426; CORTEX-A73:  .eabi_attribute 25, 1
1427; CORTEX-A73-NOT: .eabi_attribute 27
1428; CORTEX-A73-NOT: .eabi_attribute 28
1429; CORTEX-A73:  .eabi_attribute 36, 1
1430; CORTEX-A73:  .eabi_attribute 38, 1
1431; CORTEX-A73:  .eabi_attribute 42, 1
1432; CORTEX-A73-NOT: .eabi_attribute 44
1433; CORTEX-A73:  .eabi_attribute 14, 0
1434; CORTEX-A73:  .eabi_attribute 68, 3
1435
1436; EXYNOS-M1:  .cpu exynos-m1
1437; EXYNOS-M1:  .eabi_attribute 6, 14
1438; EXYNOS-M1:  .eabi_attribute 7, 65
1439; EXYNOS-M1:  .eabi_attribute 8, 1
1440; EXYNOS-M1:  .eabi_attribute 9, 2
1441; EXYNOS-M1:  .fpu crypto-neon-fp-armv8
1442; EXYNOS-M1:  .eabi_attribute 12, 3
1443; EXYNOS-M1-NOT:   .eabi_attribute 19
1444;; We default to IEEE 754 compliance
1445; EXYNOS-M1:  .eabi_attribute 20, 1
1446; EXYNOS-M1:  .eabi_attribute 21, 1
1447; EXYNOS-M1-NOT:  .eabi_attribute 22
1448; EXYNOS-M1:  .eabi_attribute 23, 3
1449; EXYNOS-M1:  .eabi_attribute 24, 1
1450; EXYNOS-M1:  .eabi_attribute 25, 1
1451; EXYNOS-M1-NOT:  .eabi_attribute 27
1452; EXYNOS-M1-NOT:  .eabi_attribute 28
1453; EXYNOS-M1:  .eabi_attribute 36, 1
1454; EXYNOS-M1:  .eabi_attribute 38, 1
1455; EXYNOS-M1:  .eabi_attribute 42, 1
1456; EXYNOS-M1-NOT:  .eabi_attribute 44
1457; EXYNOS-M1:  .eabi_attribute 68, 3
1458
1459; EXYNOS-M1-FAST-NOT:   .eabi_attribute 19
1460;; The exynos-m1 has the ARMv8 FP unit, which always flushes preserving sign.
1461; EXYNOS-M1-FAST:  .eabi_attribute 20, 2
1462; EXYNOS-M1-FAST-NOT:  .eabi_attribute 21
1463; EXYNOS-M1-FAST-NOT:  .eabi_attribute 22
1464; EXYNOS-M1-FAST:  .eabi_attribute 23, 1
1465
1466; EXYNOS-M2:  .cpu exynos-m2
1467; EXYNOS-M2:  .eabi_attribute 6, 14
1468; EXYNOS-M2:  .eabi_attribute 7, 65
1469; EXYNOS-M2:  .eabi_attribute 8, 1
1470; EXYNOS-M2:  .eabi_attribute 9, 2
1471; EXYNOS-M2:  .fpu crypto-neon-fp-armv8
1472; EXYNOS-M2:  .eabi_attribute 12, 3
1473; EXYNOS-M2-NOT:   .eabi_attribute 19
1474;; We default to IEEE 754 compliance
1475; EXYNOS-M2:  .eabi_attribute 20, 1
1476; EXYNOS-M2:  .eabi_attribute 21, 1
1477; EXYNOS-M2-NOT:  .eabi_attribute 22
1478; EXYNOS-M2:  .eabi_attribute 23, 3
1479; EXYNOS-M2:  .eabi_attribute 24, 1
1480; EXYNOS-M2:  .eabi_attribute 25, 1
1481; EXYNOS-M2-NOT:  .eabi_attribute 27
1482; EXYNOS-M2-NOT:  .eabi_attribute 28
1483; EXYNOS-M2:  .eabi_attribute 36, 1
1484; EXYNOS-M2:  .eabi_attribute 38, 1
1485; EXYNOS-M2:  .eabi_attribute 42, 1
1486; EXYNOS-M2-NOT:  .eabi_attribute 44
1487; EXYNOS-M2:  .eabi_attribute 68, 3
1488
1489; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
1490; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
1491; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
1492; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16
1493; GENERIC-FPU-NEON-FP16: .fpu neon-fp16
1494
1495; GENERIC-ARMV8_1-A:  .eabi_attribute 6, 14
1496; GENERIC-ARMV8_1-A:  .eabi_attribute 7, 65
1497; GENERIC-ARMV8_1-A:  .eabi_attribute 8, 1
1498; GENERIC-ARMV8_1-A:  .eabi_attribute 9, 2
1499; GENERIC-ARMV8_1-A:  .fpu crypto-neon-fp-armv8
1500; GENERIC-ARMV8_1-A:  .eabi_attribute 12, 4
1501; GENERIC-ARMV8_1-A-NOT:   .eabi_attribute 19
1502;; We default to IEEE 754 compliance
1503; GENERIC-ARMV8_1-A:  .eabi_attribute 20, 1
1504; GENERIC-ARMV8_1-A:  .eabi_attribute 21, 1
1505; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 22
1506; GENERIC-ARMV8_1-A:  .eabi_attribute 23, 3
1507; GENERIC-ARMV8_1-A:  .eabi_attribute 24, 1
1508; GENERIC-ARMV8_1-A:  .eabi_attribute 25, 1
1509; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 27
1510; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 28
1511; GENERIC-ARMV8_1-A:  .eabi_attribute 36, 1
1512; GENERIC-ARMV8_1-A:  .eabi_attribute 38, 1
1513; GENERIC-ARMV8_1-A:  .eabi_attribute 42, 1
1514; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 44
1515; GENERIC-ARMV8_1-A:  .eabi_attribute 68, 3
1516
1517; GENERIC-ARMV8_1-A-FAST-NOT:   .eabi_attribute 19
1518;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign.
1519; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 20, 2
1520; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 21
1521; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 22
1522; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 23, 1
1523
1524; RELOC-PIC:  .eabi_attribute 15, 1
1525; RELOC-PIC:  .eabi_attribute 16, 1
1526; RELOC-PIC:  .eabi_attribute 17, 2
1527; RELOC-OTHER:  .eabi_attribute 17, 1
1528; RELOC-ROPI-NOT:  .eabi_attribute 15,
1529; RELOC-ROPI:      .eabi_attribute 16, 1
1530; RELOC-ROPI:      .eabi_attribute 17, 1
1531; RELOC-RWPI:      .eabi_attribute 15, 2
1532; RELOC-RWPI-NOT:  .eabi_attribute 16,
1533; RELOC-RWPI:      .eabi_attribute 17, 1
1534; RELOC-ROPI-RWPI: .eabi_attribute 15, 2
1535; RELOC-ROPI-RWPI: .eabi_attribute 16, 1
1536; RELOC-ROPI-RWPI:  .eabi_attribute 17, 1
1537
1538; PCS-R9-USE:  .eabi_attribute 14, 0
1539; PCS-R9-RESERVE:  .eabi_attribute 14, 3
1540
1541define i32 @f(i64 %z) {
1542    ret i32 0
1543}
1544