xref: /llvm-project/llvm/test/CodeGen/ARM/build-attributes.ll (revision 82e245a202138f5ec9bd673126d35a9d6bd51410) 
1; This tests that MC/asm header conversion is smooth and that the
2; build attributes are correct
3
4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE
5; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6
6; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST
7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S
13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast  | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST
17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
20; RUN: llc < %s -mtriple=armv7-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST
21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
22; RUN: llc < %s -mtriple=armv8-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST
23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
30; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE
31; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE
32; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP
33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-SOFT-FAST
41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A8-HARD
42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-HARD-FAST
43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
54; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
57; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST
58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
60; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST
61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
62; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
63
64; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16
65; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16
66; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD
67; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16
68; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16
69
70; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
71; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0
72; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
73; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
74; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0PLUS
75; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
76; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
77; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M1
78; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
79; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
80; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000
81; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
82; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
83; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
84; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
85; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
86; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
87; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
88; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
89; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
90; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
91; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
92; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
93; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
94; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
95; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
96; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
97; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
98; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
99; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
100; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
101; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
102; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
103; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
104; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
105; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
106; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
107; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
108; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8
109; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST
110; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
111; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=CORTEX-A32
112; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A32-FAST
113; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
114; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35
115; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST
116; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
117; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
118; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
119; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
120; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
121; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST
122; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
123; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
124; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
125; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
126; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a73 | FileCheck %s --check-prefix=CORTEX-A73
127; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
128; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=EXYNOS-M1
129; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
130; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
131; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2 | FileCheck %s --check-prefix=EXYNOS-M2
132; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
133; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
134; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
135; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
136; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s  --check-prefix=CORTEX-A7-CHECK
137; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s  --check-prefix=CORTEX-A7-CHECK-FAST
138; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
139; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
140; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
141; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
142; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
143; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
144; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
145; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
146; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
147; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER
148; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE
149; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE
150
151; ARMv8.1a (AArch32)
152; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
153; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
154; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
155; ARMv8a (AArch32)
156; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
157; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
158; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
159; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
160; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
161; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
162; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
163; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
164; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
165; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
166; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m2 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
167; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m2 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
168
169; ARMv7a
170; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
171; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
172; ARMv7r
173; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
174; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
175; ARMv7m
176; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
177; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
178; ARMv6
179; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
180; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
181; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
182; ARMv6k
183; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
184; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
185; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
186; ARMv6m
187; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
188; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
189; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
190; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
191; ARMv5
192; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN
193; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
194
195; XSCALE:      .eabi_attribute 6, 5
196; XSCALE:      .eabi_attribute 8, 1
197; XSCALE:      .eabi_attribute 9, 1
198
199; DYN-ROUNDING: .eabi_attribute 19, 1
200
201; V6:   .eabi_attribute 6, 6
202; V6:   .eabi_attribute 8, 1
203;; We assume round-to-nearest by default (matches GCC)
204; V6-NOT:   .eabi_attribute 19
205;; The default choice made by llc is for a V6 CPU without an FPU.
206;; This is not an interesting detail, but for such CPUs, the default intention is to use
207;; software floating-point support. The choice is not important for targets without
208;; FPU support!
209; V6:   .eabi_attribute 20, 1
210; V6:   .eabi_attribute 21, 1
211; V6-NOT:   .eabi_attribute 22
212; V6:   .eabi_attribute 23, 3
213; V6:   .eabi_attribute 24, 1
214; V6:   .eabi_attribute 25, 1
215; V6-NOT:   .eabi_attribute 27
216; V6-NOT:   .eabi_attribute 28
217; V6-NOT:    .eabi_attribute 36
218; V6:    .eabi_attribute 38, 1
219; V6-NOT:    .eabi_attribute 42
220; V6-NOT:  .eabi_attribute 44
221; V6-NOT:    .eabi_attribute 68
222
223; V6-FAST-NOT:   .eabi_attribute 19
224;; Despite the V6 CPU having no FPU by default, we chose to flush to
225;; positive zero here. There's no hardware support doing this, but the
226;; fast maths software library might.
227; V6-FAST-NOT:   .eabi_attribute 20
228; V6-FAST-NOT:   .eabi_attribute 21
229; V6-FAST-NOT:   .eabi_attribute 22
230; V6-FAST:   .eabi_attribute 23, 1
231
232;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for
233;; V6-M, however we don't model the OS extension so this is fine.
234; V6M:  .eabi_attribute 6, 12
235; V6M-NOT:  .eabi_attribute 7
236; V6M:  .eabi_attribute 8, 0
237; V6M:  .eabi_attribute 9, 1
238; V6M-NOT:   .eabi_attribute 19
239;; The default choice made by llc is for a V6M CPU without an FPU.
240;; This is not an interesting detail, but for such CPUs, the default intention is to use
241;; software floating-point support. The choice is not important for targets without
242;; FPU support!
243; V6M:  .eabi_attribute 20, 1
244; V6M:   .eabi_attribute 21, 1
245; V6M-NOT:   .eabi_attribute 22
246; V6M:   .eabi_attribute 23, 3
247; V6M:  .eabi_attribute 24, 1
248; V6M:  .eabi_attribute 25, 1
249; V6M-NOT:  .eabi_attribute 27
250; V6M-NOT:  .eabi_attribute 28
251; V6M-NOT:  .eabi_attribute 36
252; V6M:  .eabi_attribute 38, 1
253; V6M-NOT:  .eabi_attribute 42
254; V6M-NOT:  .eabi_attribute 44
255; V6M-NOT:  .eabi_attribute 68
256
257; V6M-FAST-NOT:   .eabi_attribute 19
258;; Despite the V6M CPU having no FPU by default, we chose to flush to
259;; positive zero here. There's no hardware support doing this, but the
260;; fast maths software library might.
261; V6M-FAST-NOT:  .eabi_attribute 20
262; V6M-FAST-NOT:   .eabi_attribute 21
263; V6M-FAST-NOT:   .eabi_attribute 22
264; V6M-FAST:   .eabi_attribute 23, 1
265
266; ARM1156T2F-S: .cpu arm1156t2f-s
267; ARM1156T2F-S: .eabi_attribute 6, 8
268; ARM1156T2F-S: .eabi_attribute 8, 1
269; ARM1156T2F-S: .eabi_attribute 9, 2
270; ARM1156T2F-S: .fpu vfpv2
271; ARM1156T2F-S-NOT:   .eabi_attribute 19
272;; We default to IEEE 754 compliance
273; ARM1156T2F-S: .eabi_attribute 20, 1
274; ARM1156T2F-S: .eabi_attribute 21, 1
275; ARM1156T2F-S-NOT: .eabi_attribute 22
276; ARM1156T2F-S: .eabi_attribute 23, 3
277; ARM1156T2F-S: .eabi_attribute 24, 1
278; ARM1156T2F-S: .eabi_attribute 25, 1
279; ARM1156T2F-S-NOT: .eabi_attribute 27
280; ARM1156T2F-S-NOT: .eabi_attribute 28
281; ARM1156T2F-S-NOT: .eabi_attribute 36
282; ARM1156T2F-S: .eabi_attribute 38, 1
283; ARM1156T2F-S-NOT:    .eabi_attribute 42
284; ARM1156T2F-S-NOT:    .eabi_attribute 44
285; ARM1156T2F-S-NOT:    .eabi_attribute 68
286
287; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 19
288;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
289;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
290;; select. LLVM historically picks 0.
291; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
292; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 21
293; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 22
294; ARM1156T2F-S-FAST:   .eabi_attribute 23, 1
295
296; V7M:  .eabi_attribute 6, 10
297; V7M:  .eabi_attribute 7, 77
298; V7M:  .eabi_attribute 8, 0
299; V7M:  .eabi_attribute 9, 2
300; V7M-NOT:   .eabi_attribute 19
301;; The default choice made by llc is for a V7M CPU without an FPU.
302;; This is not an interesting detail, but for such CPUs, the default intention is to use
303;; software floating-point support. The choice is not important for targets without
304;; FPU support!
305; V7M:  .eabi_attribute 20, 1
306; V7M: .eabi_attribute 21, 1
307; V7M-NOT: .eabi_attribute 22
308; V7M: .eabi_attribute 23, 3
309; V7M:  .eabi_attribute 24, 1
310; V7M:  .eabi_attribute 25, 1
311; V7M-NOT:  .eabi_attribute 27
312; V7M-NOT:  .eabi_attribute 28
313; V7M-NOT:  .eabi_attribute 36
314; V7M:  .eabi_attribute 38, 1
315; V7M-NOT:  .eabi_attribute 42
316; V7M-NOT:  .eabi_attribute 44
317; V7M-NOT:  .eabi_attribute 68
318
319; V7M-FAST-NOT:   .eabi_attribute 19
320;; Despite the V7M CPU having no FPU by default, we chose to flush
321;; preserving sign. This matches what the hardware would do in the
322;; architecture revision were to exist on the current target.
323; V7M-FAST:  .eabi_attribute 20, 2
324; V7M-FAST-NOT:   .eabi_attribute 21
325; V7M-FAST-NOT:   .eabi_attribute 22
326; V7M-FAST:   .eabi_attribute 23, 1
327
328; V7:      .syntax unified
329; V7: .eabi_attribute 6, 10
330; V7-NOT:   .eabi_attribute 19
331;; In safe-maths mode we default to an IEEE 754 compliant choice.
332; V7: .eabi_attribute 20, 1
333; V7: .eabi_attribute 21, 1
334; V7-NOT: .eabi_attribute 22
335; V7: .eabi_attribute 23, 3
336; V7: .eabi_attribute 24, 1
337; V7: .eabi_attribute 25, 1
338; V7-NOT: .eabi_attribute 27
339; V7-NOT: .eabi_attribute 28
340; V7-NOT: .eabi_attribute 36
341; V7: .eabi_attribute 38, 1
342; V7-NOT:    .eabi_attribute 42
343; V7-NOT:    .eabi_attribute 44
344; V7-NOT:    .eabi_attribute 68
345
346; V7-FAST-NOT:   .eabi_attribute 19
347;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
348;; denormals to zero preserving the sign.
349; V7-FAST: .eabi_attribute 20, 2
350; V7-FAST-NOT:   .eabi_attribute 21
351; V7-FAST-NOT:   .eabi_attribute 22
352; V7-FAST:   .eabi_attribute 23, 1
353
354; V8:      .syntax unified
355; V8: .eabi_attribute 67, "2.09"
356; V8: .eabi_attribute 6, 14
357; V8-NOT:   .eabi_attribute 19
358; V8: .eabi_attribute 20, 1
359; V8: .eabi_attribute 21, 1
360; V8-NOT: .eabi_attribute 22
361; V8: .eabi_attribute 23, 3
362; V8-NOT: .eabi_attribute 44
363
364; V8-FAST-NOT:   .eabi_attribute 19
365;; The default does have an FPU, and for V8-A, it flushes preserving sign.
366; V8-FAST: .eabi_attribute 20, 2
367; V8-FAST-NOT: .eabi_attribute 21
368; V8-FAST-NOT: .eabi_attribute 22
369; V8-FAST: .eabi_attribute 23, 1
370
371; Vt8:     .syntax unified
372; Vt8: .eabi_attribute 6, 14
373; Vt8-NOT:   .eabi_attribute 19
374; Vt8: .eabi_attribute 20, 1
375; Vt8: .eabi_attribute 21, 1
376; Vt8-NOT: .eabi_attribute 22
377; Vt8: .eabi_attribute 23, 3
378
379; V8-FPARMv8:      .syntax unified
380; V8-FPARMv8: .eabi_attribute 6, 14
381; V8-FPARMv8: .fpu fp-armv8
382
383; V8-NEON:      .syntax unified
384; V8-NEON: .eabi_attribute 6, 14
385; V8-NEON: .fpu neon
386; V8-NEON: .eabi_attribute 12, 3
387
388; V8-FPARMv8-NEON:      .syntax unified
389; V8-FPARMv8-NEON: .eabi_attribute 6, 14
390; V8-FPARMv8-NEON: .fpu neon-fp-armv8
391; V8-FPARMv8-NEON: .eabi_attribute 12, 3
392
393; V8-FPARMv8-NEON-CRYPTO:      .syntax unified
394; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
395; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
396; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
397
398; V8MBASELINE: .syntax unified
399; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline
400; V8MBASELINE: .eabi_attribute 6, 16
401; '7' is Tag_CPU_arch_profile, '77' is 'M'
402; V8MBASELINE: .eabi_attribute 7, 77
403; '8' is Tag_ARM_ISA_use
404; V8MBASELINE: .eabi_attribute 8, 0
405; '9' is Tag_Thumb_ISA_use
406; V8MBASELINE: .eabi_attribute 9, 3
407
408; V8MMAINLINE: .syntax unified
409; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline
410; V8MMAINLINE: .eabi_attribute 6, 17
411; V8MMAINLINE: .eabi_attribute 7, 77
412; V8MMAINLINE: .eabi_attribute 8, 0
413; V8MMAINLINE: .eabi_attribute 9, 3
414; V8MMAINLINE_DSP-NOT: .eabi_attribute 46
415
416; V8MMAINLINE_DSP: .syntax unified
417; V8MBASELINE_DSP: .eabi_attribute 6, 17
418; V8MBASELINE_DSP: .eabi_attribute 7, 77
419; V8MMAINLINE_DSP: .eabi_attribute 8, 0
420; V8MMAINLINE_DSP: .eabi_attribute 9, 3
421; V8MMAINLINE_DSP: .eabi_attribute 46, 1
422
423; Tag_CPU_unaligned_access
424; NO-STRICT-ALIGN: .eabi_attribute 34, 1
425; STRICT-ALIGN: .eabi_attribute 34, 0
426
427; Tag_CPU_arch  'ARMv7'
428; CORTEX-A7-CHECK: .eabi_attribute      6, 10
429; CORTEX-A7-NOFPU: .eabi_attribute      6, 10
430
431; CORTEX-A7-FPUV4: .eabi_attribute      6, 10
432
433; Tag_CPU_arch_profile 'A'
434; CORTEX-A7-CHECK: .eabi_attribute      7, 65
435; CORTEX-A7-NOFPU: .eabi_attribute      7, 65
436; CORTEX-A7-FPUV4: .eabi_attribute      7, 65
437
438; Tag_ARM_ISA_use
439; CORTEX-A7-CHECK: .eabi_attribute      8, 1
440; CORTEX-A7-NOFPU: .eabi_attribute      8, 1
441; CORTEX-A7-FPUV4: .eabi_attribute      8, 1
442
443; Tag_THUMB_ISA_use
444; CORTEX-A7-CHECK: .eabi_attribute      9, 2
445; CORTEX-A7-NOFPU: .eabi_attribute      9, 2
446; CORTEX-A7-FPUV4: .eabi_attribute      9, 2
447
448; CORTEX-A7-CHECK: .fpu neon-vfpv4
449; CORTEX-A7-NOFPU-NOT: .fpu
450; CORTEX-A7-FPUV4: .fpu vfpv4
451
452; CORTEX-A7-CHECK-NOT:   .eabi_attribute 19
453; Tag_ABI_FP_denormal
454;; We default to IEEE 754 compliance
455; CORTEX-A7-CHECK: .eabi_attribute      20, 1
456;; The A7 has VFPv3 support by default, so flush preserving sign.
457; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
458; CORTEX-A7-NOFPU: .eabi_attribute      20, 1
459;; Despite there being no FPU, we chose to flush to zero preserving
460;; sign. This matches what the hardware would do for this architecture
461;; revision.
462; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
463; CORTEX-A7-FPUV4: .eabi_attribute      20, 1
464;; The VFPv4 FPU flushes preserving sign.
465; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
466
467; Tag_ABI_FP_exceptions
468; CORTEX-A7-CHECK: .eabi_attribute      21, 1
469; CORTEX-A7-NOFPU: .eabi_attribute      21, 1
470; CORTEX-A7-FPUV4: .eabi_attribute      21, 1
471
472; Tag_ABI_FP_user_exceptions
473; CORTEX-A7-CHECK-NOT: .eabi_attribute      22
474; CORTEX-A7-NOFPU-NOT: .eabi_attribute      22
475; CORTEX-A7-FPUV4-NOT: .eabi_attribute      22
476
477; Tag_ABI_FP_number_model
478; CORTEX-A7-CHECK: .eabi_attribute      23, 3
479; CORTEX-A7-NOFPU: .eabi_attribute      23, 3
480; CORTEX-A7-FPUV4: .eabi_attribute      23, 3
481
482; Tag_ABI_align_needed
483; CORTEX-A7-CHECK: .eabi_attribute      24, 1
484; CORTEX-A7-NOFPU: .eabi_attribute      24, 1
485; CORTEX-A7-FPUV4: .eabi_attribute      24, 1
486
487; Tag_ABI_align_preserved
488; CORTEX-A7-CHECK: .eabi_attribute      25, 1
489; CORTEX-A7-NOFPU: .eabi_attribute      25, 1
490; CORTEX-A7-FPUV4: .eabi_attribute      25, 1
491
492; Tag_FP_HP_extension
493; CORTEX-A7-CHECK: .eabi_attribute      36, 1
494; CORTEX-A7-NOFPU-NOT: .eabi_attribute  36
495; CORTEX-A7-FPUV4: .eabi_attribute      36, 1
496
497; Tag_FP_16bit_format
498; CORTEX-A7-CHECK: .eabi_attribute      38, 1
499; CORTEX-A7-NOFPU: .eabi_attribute      38, 1
500; CORTEX-A7-FPUV4: .eabi_attribute      38, 1
501
502; Tag_MPextension_use
503; CORTEX-A7-CHECK: .eabi_attribute      42, 1
504; CORTEX-A7-NOFPU: .eabi_attribute      42, 1
505; CORTEX-A7-FPUV4: .eabi_attribute      42, 1
506
507; Tag_DIV_use
508; CORTEX-A7-CHECK: .eabi_attribute      44, 2
509; CORTEX-A7-NOFPU: .eabi_attribute      44, 2
510; CORTEX-A7-FPUV4: .eabi_attribute      44, 2
511
512; Tag_DSP_extension
513; CORTEX-A7-CHECK-NOT: .eabi_attribute      46
514
515; Tag_Virtualization_use
516; CORTEX-A7-CHECK: .eabi_attribute      68, 3
517; CORTEX-A7-NOFPU: .eabi_attribute      68, 3
518; CORTEX-A7-FPUV4: .eabi_attribute      68, 3
519
520; CORTEX-A5-DEFAULT:        .cpu    cortex-a5
521; CORTEX-A5-DEFAULT:        .eabi_attribute 6, 10
522; CORTEX-A5-DEFAULT:        .eabi_attribute 7, 65
523; CORTEX-A5-DEFAULT:        .eabi_attribute 8, 1
524; CORTEX-A5-DEFAULT:        .eabi_attribute 9, 2
525; CORTEX-A5-DEFAULT:        .fpu    neon-vfpv4
526; CORTEX-A5-NOT:   .eabi_attribute 19
527;; We default to IEEE 754 compliance
528; CORTEX-A5-DEFAULT:        .eabi_attribute 20, 1
529; CORTEX-A5-DEFAULT:        .eabi_attribute 21, 1
530; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 22
531; CORTEX-A5-DEFAULT:        .eabi_attribute 23, 3
532; CORTEX-A5-DEFAULT:        .eabi_attribute 24, 1
533; CORTEX-A5-DEFAULT:        .eabi_attribute 25, 1
534; CORTEX-A5-DEFAULT:        .eabi_attribute 42, 1
535; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 44
536; CORTEX-A5-DEFAULT:        .eabi_attribute 68, 1
537
538; CORTEX-A5-DEFAULT-FAST-NOT:   .eabi_attribute 19
539;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math
540;; is given.
541; CORTEX-A5-DEFAULT-FAST:        .eabi_attribute 20, 2
542; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21
543; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22
544; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1
545
546; CORTEX-A5-NONEON:        .cpu    cortex-a5
547; CORTEX-A5-NONEON:        .eabi_attribute 6, 10
548; CORTEX-A5-NONEON:        .eabi_attribute 7, 65
549; CORTEX-A5-NONEON:        .eabi_attribute 8, 1
550; CORTEX-A5-NONEON:        .eabi_attribute 9, 2
551; CORTEX-A5-NONEON:        .fpu    vfpv4-d16
552;; We default to IEEE 754 compliance
553; CORTEX-A5-NONEON:        .eabi_attribute 20, 1
554; CORTEX-A5-NONEON:        .eabi_attribute 21, 1
555; CORTEX-A5-NONEON-NOT:    .eabi_attribute 22
556; CORTEX-A5-NONEON:        .eabi_attribute 23, 3
557; CORTEX-A5-NONEON:        .eabi_attribute 24, 1
558; CORTEX-A5-NONEON:        .eabi_attribute 25, 1
559; CORTEX-A5-NONEON:        .eabi_attribute 42, 1
560; CORTEX-A5-NONEON:        .eabi_attribute 68, 1
561
562; CORTEX-A5-NONEON-FAST-NOT:   .eabi_attribute 19
563;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
564;; is given.
565; CORTEX-A5-NONEON-FAST:        .eabi_attribute 20, 2
566; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21
567; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22
568; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1
569
570; CORTEX-A5-NOFPU:        .cpu    cortex-a5
571; CORTEX-A5-NOFPU:        .eabi_attribute 6, 10
572; CORTEX-A5-NOFPU:        .eabi_attribute 7, 65
573; CORTEX-A5-NOFPU:        .eabi_attribute 8, 1
574; CORTEX-A5-NOFPU:        .eabi_attribute 9, 2
575; CORTEX-A5-NOFPU-NOT:    .fpu
576; CORTEX-A5-NOFPU-NOT:   .eabi_attribute 19
577;; We default to IEEE 754 compliance
578; CORTEX-A5-NOFPU:        .eabi_attribute 20, 1
579; CORTEX-A5-NOFPU:        .eabi_attribute 21, 1
580; CORTEX-A5-NOFPU-NOT:    .eabi_attribute 22
581; CORTEX-A5-NOFPU:        .eabi_attribute 23, 3
582; CORTEX-A5-NOFPU:        .eabi_attribute 24, 1
583; CORTEX-A5-NOFPU:        .eabi_attribute 25, 1
584; CORTEX-A5-NOFPU:        .eabi_attribute 42, 1
585; CORTEX-A5-NOFPU:        .eabi_attribute 68, 1
586
587; CORTEX-A5-NOFPU-FAST-NOT:   .eabi_attribute 19
588;; Despite there being no FPU, we chose to flush to zero preserving
589;; sign. This matches what the hardware would do for this architecture
590;; revision.
591; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
592; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21
593; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22
594; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1
595
596; CORTEX-A8-SOFT:  .cpu cortex-a8
597; CORTEX-A8-SOFT:  .eabi_attribute 6, 10
598; CORTEX-A8-SOFT:  .eabi_attribute 7, 65
599; CORTEX-A8-SOFT:  .eabi_attribute 8, 1
600; CORTEX-A8-SOFT:  .eabi_attribute 9, 2
601; CORTEX-A8-SOFT:  .fpu neon
602; CORTEX-A8-SOFT-NOT:   .eabi_attribute 19
603;; We default to IEEE 754 compliance
604; CORTEX-A8-SOFT:  .eabi_attribute 20, 1
605; CORTEX-A8-SOFT:  .eabi_attribute 21, 1
606; CORTEX-A8-SOFT-NOT:  .eabi_attribute 22
607; CORTEX-A8-SOFT:  .eabi_attribute 23, 3
608; CORTEX-A8-SOFT:  .eabi_attribute 24, 1
609; CORTEX-A8-SOFT:  .eabi_attribute 25, 1
610; CORTEX-A8-SOFT-NOT:  .eabi_attribute 27
611; CORTEX-A8-SOFT-NOT:  .eabi_attribute 28
612; CORTEX-A8-SOFT-NOT:  .eabi_attribute 36, 1
613; CORTEX-A8-SOFT:  .eabi_attribute 38, 1
614; CORTEX-A8-SOFT-NOT:  .eabi_attribute 42, 1
615; CORTEX-A8-SOFT-NOT:  .eabi_attribute 44
616; CORTEX-A8-SOFT:  .eabi_attribute 68, 1
617
618; CORTEX-A9-SOFT:  .cpu cortex-a9
619; CORTEX-A9-SOFT:  .eabi_attribute 6, 10
620; CORTEX-A9-SOFT:  .eabi_attribute 7, 65
621; CORTEX-A9-SOFT:  .eabi_attribute 8, 1
622; CORTEX-A9-SOFT:  .eabi_attribute 9, 2
623; CORTEX-A9-SOFT:  .fpu neon
624; CORTEX-A9-SOFT-NOT:   .eabi_attribute 19
625;; We default to IEEE 754 compliance
626; CORTEX-A9-SOFT:  .eabi_attribute 20, 1
627; CORTEX-A9-SOFT:  .eabi_attribute 21, 1
628; CORTEX-A9-SOFT-NOT:  .eabi_attribute 22
629; CORTEX-A9-SOFT:  .eabi_attribute 23, 3
630; CORTEX-A9-SOFT:  .eabi_attribute 24, 1
631; CORTEX-A9-SOFT:  .eabi_attribute 25, 1
632; CORTEX-A9-SOFT-NOT:  .eabi_attribute 27
633; CORTEX-A9-SOFT-NOT:  .eabi_attribute 28
634; CORTEX-A9-SOFT:  .eabi_attribute 36, 1
635; CORTEX-A9-SOFT:  .eabi_attribute 38, 1
636; CORTEX-A9-SOFT:  .eabi_attribute 42, 1
637; CORTEX-A9-SOFT-NOT:  .eabi_attribute 44
638; CORTEX-A9-SOFT:  .eabi_attribute 68, 1
639
640; CORTEX-A8-SOFT-FAST-NOT:   .eabi_attribute 19
641; CORTEX-A9-SOFT-FAST-NOT:   .eabi_attribute 19
642;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
643;; -ffast-math is specified.
644; CORTEX-A8-SOFT-FAST:  .eabi_attribute 20, 2
645; CORTEX-A9-SOFT-FAST:  .eabi_attribute 20, 2
646; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21
647; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22
648; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1
649
650; CORTEX-A8-HARD:  .cpu cortex-a8
651; CORTEX-A8-HARD:  .eabi_attribute 6, 10
652; CORTEX-A8-HARD:  .eabi_attribute 7, 65
653; CORTEX-A8-HARD:  .eabi_attribute 8, 1
654; CORTEX-A8-HARD:  .eabi_attribute 9, 2
655; CORTEX-A8-HARD:  .fpu neon
656; CORTEX-A8-HARD-NOT:   .eabi_attribute 19
657;; We default to IEEE 754 compliance
658; CORTEX-A8-HARD:  .eabi_attribute 20, 1
659; CORTEX-A8-HARD:  .eabi_attribute 21, 1
660; CORTEX-A8-HARD-NOT:  .eabi_attribute 22
661; CORTEX-A8-HARD:  .eabi_attribute 23, 3
662; CORTEX-A8-HARD:  .eabi_attribute 24, 1
663; CORTEX-A8-HARD:  .eabi_attribute 25, 1
664; CORTEX-A8-HARD-NOT:  .eabi_attribute 27
665; CORTEX-A8-HARD:  .eabi_attribute 28, 1
666; CORTEX-A8-HARD-NOT:  .eabi_attribute 36, 1
667; CORTEX-A8-HARD:  .eabi_attribute 38, 1
668; CORTEX-A8-HARD-NOT:  .eabi_attribute 42, 1
669; CORTEX-A8-HARD:  .eabi_attribute 68, 1
670
671
672
673; CORTEX-A9-HARD:  .cpu cortex-a9
674; CORTEX-A9-HARD:  .eabi_attribute 6, 10
675; CORTEX-A9-HARD:  .eabi_attribute 7, 65
676; CORTEX-A9-HARD:  .eabi_attribute 8, 1
677; CORTEX-A9-HARD:  .eabi_attribute 9, 2
678; CORTEX-A9-HARD:  .fpu neon
679; CORTEX-A9-HARD-NOT:   .eabi_attribute 19
680;; We default to IEEE 754 compliance
681; CORTEX-A9-HARD:  .eabi_attribute 20, 1
682; CORTEX-A9-HARD:  .eabi_attribute 21, 1
683; CORTEX-A9-HARD-NOT:  .eabi_attribute 22
684; CORTEX-A9-HARD:  .eabi_attribute 23, 3
685; CORTEX-A9-HARD:  .eabi_attribute 24, 1
686; CORTEX-A9-HARD:  .eabi_attribute 25, 1
687; CORTEX-A9-HARD-NOT:  .eabi_attribute 27
688; CORTEX-A9-HARD:  .eabi_attribute 28, 1
689; CORTEX-A9-HARD:  .eabi_attribute 36, 1
690; CORTEX-A9-HARD:  .eabi_attribute 38, 1
691; CORTEX-A9-HARD:  .eabi_attribute 42, 1
692; CORTEX-A9-HARD:  .eabi_attribute 68, 1
693
694; CORTEX-A8-HARD-FAST-NOT:   .eabi_attribute 19
695;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when
696;; -ffast-math is specified.
697; CORTEX-A8-HARD-FAST:  .eabi_attribute 20, 2
698; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 21
699; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 22
700; CORTEX-A8-HARD-FAST:  .eabi_attribute 23, 1
701
702; CORTEX-A9-HARD-FAST-NOT:   .eabi_attribute 19
703;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
704;; -ffast-math is specified.
705; CORTEX-A9-HARD-FAST:  .eabi_attribute 20, 2
706; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 21
707; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 22
708; CORTEX-A9-HARD-FAST:  .eabi_attribute 23, 1
709
710; CORTEX-A12-DEFAULT:  .cpu cortex-a12
711; CORTEX-A12-DEFAULT:  .eabi_attribute 6, 10
712; CORTEX-A12-DEFAULT:  .eabi_attribute 7, 65
713; CORTEX-A12-DEFAULT:  .eabi_attribute 8, 1
714; CORTEX-A12-DEFAULT:  .eabi_attribute 9, 2
715; CORTEX-A12-DEFAULT:  .fpu neon-vfpv4
716; CORTEX-A12-DEFAULT-NOT:   .eabi_attribute 19
717;; We default to IEEE 754 compliance
718; CORTEX-A12-DEFAULT:  .eabi_attribute 20, 1
719; CORTEX-A12-DEFAULT:  .eabi_attribute 21, 1
720; CORTEX-A12-DEFAULT-NOT:  .eabi_attribute 22
721; CORTEX-A12-DEFAULT:  .eabi_attribute 23, 3
722; CORTEX-A12-DEFAULT:  .eabi_attribute 24, 1
723; CORTEX-A12-DEFAULT:  .eabi_attribute 25, 1
724; CORTEX-A12-DEFAULT:  .eabi_attribute 42, 1
725; CORTEX-A12-DEFAULT:  .eabi_attribute 44, 2
726; CORTEX-A12-DEFAULT:  .eabi_attribute 68, 3
727
728; CORTEX-A12-DEFAULT-FAST-NOT:   .eabi_attribute 19
729;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when
730;; -ffast-math is specified.
731; CORTEX-A12-DEFAULT-FAST:  .eabi_attribute 20, 2
732; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 21
733; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 22
734; CORTEX-A12-HARD-FAST:  .eabi_attribute 23, 1
735
736; CORTEX-A12-NOFPU:  .cpu cortex-a12
737; CORTEX-A12-NOFPU:  .eabi_attribute 6, 10
738; CORTEX-A12-NOFPU:  .eabi_attribute 7, 65
739; CORTEX-A12-NOFPU:  .eabi_attribute 8, 1
740; CORTEX-A12-NOFPU:  .eabi_attribute 9, 2
741; CORTEX-A12-NOFPU-NOT:  .fpu
742; CORTEX-A12-NOFPU-NOT:   .eabi_attribute 19
743;; We default to IEEE 754 compliance
744; CORTEX-A12-NOFPU:  .eabi_attribute 20, 1
745; CORTEX-A12-NOFPU:  .eabi_attribute 21, 1
746; CORTEX-A12-NOFPU-NOT:  .eabi_attribute 22
747; CORTEX-A12-NOFPU:  .eabi_attribute 23, 3
748; CORTEX-A12-NOFPU:  .eabi_attribute 24, 1
749; CORTEX-A12-NOFPU:  .eabi_attribute 25, 1
750; CORTEX-A12-NOFPU:  .eabi_attribute 42, 1
751; CORTEX-A12-NOFPU:  .eabi_attribute 44, 2
752; CORTEX-A12-NOFPU:  .eabi_attribute 68, 3
753
754; CORTEX-A12-NOFPU-FAST-NOT:   .eabi_attribute 19
755;; Despite there being no FPU, we chose to flush to zero preserving
756;; sign. This matches what the hardware would do for this architecture
757;; revision.
758; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 20, 2
759; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 21
760; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 22
761; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 23, 1
762
763; CORTEX-A15: .cpu cortex-a15
764; CORTEX-A15: .eabi_attribute 6, 10
765; CORTEX-A15: .eabi_attribute 7, 65
766; CORTEX-A15: .eabi_attribute 8, 1
767; CORTEX-A15: .eabi_attribute 9, 2
768; CORTEX-A15: .fpu neon-vfpv4
769; CORTEX-A15-NOT:   .eabi_attribute 19
770;; We default to IEEE 754 compliance
771; CORTEX-A15: .eabi_attribute 20, 1
772; CORTEX-A15: .eabi_attribute 21, 1
773; CORTEX-A15-NOT: .eabi_attribute 22
774; CORTEX-A15: .eabi_attribute 23, 3
775; CORTEX-A15: .eabi_attribute 24, 1
776; CORTEX-A15: .eabi_attribute 25, 1
777; CORTEX-A15-NOT: .eabi_attribute 27
778; CORTEX-A15-NOT: .eabi_attribute 28
779; CORTEX-A15: .eabi_attribute 36, 1
780; CORTEX-A15: .eabi_attribute 38, 1
781; CORTEX-A15: .eabi_attribute 42, 1
782; CORTEX-A15: .eabi_attribute 44, 2
783; CORTEX-A15: .eabi_attribute 68, 3
784
785; CORTEX-A15-FAST-NOT:   .eabi_attribute 19
786;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when
787;; -ffast-math is specified.
788; CORTEX-A15-FAST: .eabi_attribute 20, 2
789; CORTEX-A15-FAST-NOT:  .eabi_attribute 21
790; CORTEX-A15-FAST-NOT:  .eabi_attribute 22
791; CORTEX-A15-FAST:  .eabi_attribute 23, 1
792
793; CORTEX-A17-DEFAULT:  .cpu cortex-a17
794; CORTEX-A17-DEFAULT:  .eabi_attribute 6, 10
795; CORTEX-A17-DEFAULT:  .eabi_attribute 7, 65
796; CORTEX-A17-DEFAULT:  .eabi_attribute 8, 1
797; CORTEX-A17-DEFAULT:  .eabi_attribute 9, 2
798; CORTEX-A17-DEFAULT:  .fpu neon-vfpv4
799; CORTEX-A17-DEFAULT-NOT:   .eabi_attribute 19
800;; We default to IEEE 754 compliance
801; CORTEX-A17-DEFAULT:  .eabi_attribute 20, 1
802; CORTEX-A17-DEFAULT:  .eabi_attribute 21, 1
803; CORTEX-A17-DEFAULT-NOT:  .eabi_attribute 22
804; CORTEX-A17-DEFAULT:  .eabi_attribute 23, 3
805; CORTEX-A17-DEFAULT:  .eabi_attribute 24, 1
806; CORTEX-A17-DEFAULT:  .eabi_attribute 25, 1
807; CORTEX-A17-DEFAULT:  .eabi_attribute 42, 1
808; CORTEX-A17-DEFAULT:  .eabi_attribute 44, 2
809; CORTEX-A17-DEFAULT:  .eabi_attribute 68, 3
810
811; CORTEX-A17-FAST-NOT:   .eabi_attribute 19
812;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when
813;; -ffast-math is specified.
814; CORTEX-A17-FAST:  .eabi_attribute 20, 2
815; CORTEX-A17-FAST-NOT:  .eabi_attribute 21
816; CORTEX-A17-FAST-NOT:  .eabi_attribute 22
817; CORTEX-A17-FAST:  .eabi_attribute 23, 1
818
819; CORTEX-A17-NOFPU:  .cpu cortex-a17
820; CORTEX-A17-NOFPU:  .eabi_attribute 6, 10
821; CORTEX-A17-NOFPU:  .eabi_attribute 7, 65
822; CORTEX-A17-NOFPU:  .eabi_attribute 8, 1
823; CORTEX-A17-NOFPU:  .eabi_attribute 9, 2
824; CORTEX-A17-NOFPU-NOT:  .fpu
825; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
826;; We default to IEEE 754 compliance
827; CORTEX-A17-NOFPU:  .eabi_attribute 20, 1
828; CORTEX-A17-NOFPU:  .eabi_attribute 21, 1
829; CORTEX-A17-NOFPU-NOT:  .eabi_attribute 22
830; CORTEX-A17-NOFPU:  .eabi_attribute 23, 3
831; CORTEX-A17-NOFPU:  .eabi_attribute 24, 1
832; CORTEX-A17-NOFPU:  .eabi_attribute 25, 1
833; CORTEX-A17-NOFPU:  .eabi_attribute 42, 1
834; CORTEX-A17-NOFPU:  .eabi_attribute 44, 2
835; CORTEX-A17-NOFPU:  .eabi_attribute 68, 3
836
837; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
838;; Despite there being no FPU, we chose to flush to zero preserving
839;; sign. This matches what the hardware would do for this architecture
840;; revision.
841; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 20, 2
842; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 21
843; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 22
844; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 23, 1
845
846; CORTEX-M0:  .cpu cortex-m0
847; CORTEX-M0:  .eabi_attribute 6, 12
848; CORTEX-M0-NOT:  .eabi_attribute 7
849; CORTEX-M0:  .eabi_attribute 8, 0
850; CORTEX-M0:  .eabi_attribute 9, 1
851; CORTEX-M0-NOT:   .eabi_attribute 19
852;; We default to IEEE 754 compliance
853; CORTEX-M0:  .eabi_attribute 20, 1
854; CORTEX-M0:  .eabi_attribute 21, 1
855; CORTEX-M0-NOT:  .eabi_attribute 22
856; CORTEX-M0:  .eabi_attribute 23, 3
857; CORTEX-M0: .eabi_attribute 34, 0
858; CORTEX-M0:  .eabi_attribute 24, 1
859; CORTEX-M0:  .eabi_attribute 25, 1
860; CORTEX-M0-NOT:  .eabi_attribute 27
861; CORTEX-M0-NOT:  .eabi_attribute 28
862; CORTEX-M0-NOT:  .eabi_attribute 36
863; CORTEX-M0:  .eabi_attribute 38, 1
864; CORTEX-M0-NOT:  .eabi_attribute 42
865; CORTEX-M0-NOT:  .eabi_attribute 44
866; CORTEX-M0-NOT:  .eabi_attribute 68
867
868; CORTEX-M0-FAST-NOT:   .eabi_attribute 19
869;; Despite the M0 CPU having no FPU in this scenario, we chose to
870;; flush to positive zero here. There's no hardware support doing
871;; this, but the fast maths software library might and such behaviour
872;; would match hardware support on this architecture revision if it
873;; existed.
874; CORTEX-M0-FAST-NOT:  .eabi_attribute 20
875; CORTEX-M0-FAST-NOT:  .eabi_attribute 21
876; CORTEX-M0-FAST-NOT:  .eabi_attribute 22
877; CORTEX-M0-FAST:  .eabi_attribute 23, 1
878
879; CORTEX-M0PLUS:  .cpu cortex-m0plus
880; CORTEX-M0PLUS:  .eabi_attribute 6, 12
881; CORTEX-M0PLUS-NOT:  .eabi_attribute 7
882; CORTEX-M0PLUS:  .eabi_attribute 8, 0
883; CORTEX-M0PLUS:  .eabi_attribute 9, 1
884; CORTEX-M0PLUS-NOT:   .eabi_attribute 19
885;; We default to IEEE 754 compliance
886; CORTEX-M0PLUS:  .eabi_attribute 20, 1
887; CORTEX-M0PLUS:  .eabi_attribute 21, 1
888; CORTEX-M0PLUS-NOT:  .eabi_attribute 22
889; CORTEX-M0PLUS:  .eabi_attribute 23, 3
890; CORTEX-M0PLUS:  .eabi_attribute 24, 1
891; CORTEX-M0PLUS:  .eabi_attribute 25, 1
892; CORTEX-M0PLUS-NOT:  .eabi_attribute 27
893; CORTEX-M0PLUS-NOT:  .eabi_attribute 28
894; CORTEX-M0PLUS-NOT:  .eabi_attribute 36
895; CORTEX-M0PLUS:  .eabi_attribute 38, 1
896; CORTEX-M0PLUS-NOT:  .eabi_attribute 42
897; CORTEX-M0PLUS-NOT:  .eabi_attribute 44
898; CORTEX-M0PLUS-NOT:  .eabi_attribute 68
899
900; CORTEX-M0PLUS-FAST-NOT:   .eabi_attribute 19
901;; Despite the M0+ CPU having no FPU in this scenario, we chose to
902;; flush to positive zero here. There's no hardware support doing
903;; this, but the fast maths software library might and such behaviour
904;; would match hardware support on this architecture revision if it
905;; existed.
906; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 20
907; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 21
908; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 22
909; CORTEX-M0PLUS-FAST:  .eabi_attribute 23, 1
910
911; CORTEX-M1:  .cpu cortex-m1
912; CORTEX-M1:  .eabi_attribute 6, 12
913; CORTEX-M1-NOT:  .eabi_attribute 7
914; CORTEX-M1:  .eabi_attribute 8, 0
915; CORTEX-M1:  .eabi_attribute 9, 1
916; CORTEX-M1-NOT:   .eabi_attribute 19
917;; We default to IEEE 754 compliance
918; CORTEX-M1:  .eabi_attribute 20, 1
919; CORTEX-M1:  .eabi_attribute 21, 1
920; CORTEX-M1-NOT:  .eabi_attribute 22
921; CORTEX-M1:  .eabi_attribute 23, 3
922; CORTEX-M1:  .eabi_attribute 24, 1
923; CORTEX-M1:  .eabi_attribute 25, 1
924; CORTEX-M1-NOT:  .eabi_attribute 27
925; CORTEX-M1-NOT:  .eabi_attribute 28
926; CORTEX-M1-NOT:  .eabi_attribute 36
927; CORTEX-M1:  .eabi_attribute 38, 1
928; CORTEX-M1-NOT:  .eabi_attribute 42
929; CORTEX-M1-NOT:  .eabi_attribute 44
930; CORTEX-M1-NOT:  .eabi_attribute 68
931
932; CORTEX-M1-FAST-NOT:   .eabi_attribute 19
933;; Despite the M1 CPU having no FPU in this scenario, we chose to
934;; flush to positive zero here. There's no hardware support doing
935;; this, but the fast maths software library might and such behaviour
936;; would match hardware support on this architecture revision if it
937;; existed.
938; CORTEX-M1-FAST-NOT:  .eabi_attribute 20
939; CORTEX-M1-FAST-NOT:  .eabi_attribute 21
940; CORTEX-M1-FAST-NOT:  .eabi_attribute 22
941; CORTEX-M1-FAST:  .eabi_attribute 23, 1
942
943; SC000:  .cpu sc000
944; SC000:  .eabi_attribute 6, 12
945; SC000-NOT:  .eabi_attribute 7
946; SC000:  .eabi_attribute 8, 0
947; SC000:  .eabi_attribute 9, 1
948; SC000-NOT:   .eabi_attribute 19
949;; We default to IEEE 754 compliance
950; SC000:  .eabi_attribute 20, 1
951; SC000:  .eabi_attribute 21, 1
952; SC000-NOT:  .eabi_attribute 22
953; SC000:  .eabi_attribute 23, 3
954; SC000:  .eabi_attribute 24, 1
955; SC000:  .eabi_attribute 25, 1
956; SC000-NOT:  .eabi_attribute 27
957; SC000-NOT:  .eabi_attribute 28
958; SC000-NOT:  .eabi_attribute 36
959; SC000:  .eabi_attribute 38, 1
960; SC000-NOT:  .eabi_attribute 42
961; SC000-NOT:  .eabi_attribute 44
962; SC000-NOT:  .eabi_attribute 68
963
964; SC000-FAST-NOT:   .eabi_attribute 19
965;; Despite the SC000 CPU having no FPU in this scenario, we chose to
966;; flush to positive zero here. There's no hardware support doing
967;; this, but the fast maths software library might and such behaviour
968;; would match hardware support on this architecture revision if it
969;; existed.
970; SC000-FAST-NOT:  .eabi_attribute 20
971; SC000-FAST-NOT:  .eabi_attribute 21
972; SC000-FAST-NOT:  .eabi_attribute 22
973; SC000-FAST:  .eabi_attribute 23, 1
974
975; CORTEX-M3:  .cpu cortex-m3
976; CORTEX-M3:  .eabi_attribute 6, 10
977; CORTEX-M3:  .eabi_attribute 7, 77
978; CORTEX-M3:  .eabi_attribute 8, 0
979; CORTEX-M3:  .eabi_attribute 9, 2
980; CORTEX-M3-NOT:   .eabi_attribute 19
981;; We default to IEEE 754 compliance
982; CORTEX-M3:  .eabi_attribute 20, 1
983; CORTEX-M3:  .eabi_attribute 21, 1
984; CORTEX-M3-NOT:  .eabi_attribute 22
985; CORTEX-M3:  .eabi_attribute 23, 3
986; CORTEX-M3:  .eabi_attribute 24, 1
987; CORTEX-M3:  .eabi_attribute 25, 1
988; CORTEX-M3-NOT:  .eabi_attribute 27
989; CORTEX-M3-NOT:  .eabi_attribute 28
990; CORTEX-M3-NOT:  .eabi_attribute 36
991; CORTEX-M3:  .eabi_attribute 38, 1
992; CORTEX-M3-NOT:  .eabi_attribute 42
993; CORTEX-M3-NOT:  .eabi_attribute 44
994; CORTEX-M3-NOT:  .eabi_attribute 68
995
996; CORTEX-M3-FAST-NOT:   .eabi_attribute 19
997;; Despite there being no FPU, we chose to flush to zero preserving
998;; sign. This matches what the hardware would do for this architecture
999;; revision.
1000; CORTEX-M3-FAST:  .eabi_attribute 20, 2
1001; CORTEX-M3-FAST-NOT:  .eabi_attribute 21
1002; CORTEX-M3-FAST-NOT:  .eabi_attribute 22
1003; CORTEX-M3-FAST:  .eabi_attribute 23, 1
1004
1005; SC300:  .cpu sc300
1006; SC300:  .eabi_attribute 6, 10
1007; SC300:  .eabi_attribute 7, 77
1008; SC300:  .eabi_attribute 8, 0
1009; SC300:  .eabi_attribute 9, 2
1010; SC300-NOT:   .eabi_attribute 19
1011;; We default to IEEE 754 compliance
1012; SC300:  .eabi_attribute 20, 1
1013; SC300:  .eabi_attribute 21, 1
1014; SC300-NOT:  .eabi_attribute 22
1015; SC300:  .eabi_attribute 23, 3
1016; SC300:  .eabi_attribute 24, 1
1017; SC300:  .eabi_attribute 25, 1
1018; SC300-NOT:  .eabi_attribute 27
1019; SC300-NOT:  .eabi_attribute 28
1020; SC300-NOT:  .eabi_attribute 36
1021; SC300:  .eabi_attribute 38, 1
1022; SC300-NOT:  .eabi_attribute 42
1023; SC300-NOT:  .eabi_attribute 44
1024; SC300-NOT:  .eabi_attribute 68
1025
1026; SC300-FAST-NOT:   .eabi_attribute 19
1027;; Despite there being no FPU, we chose to flush to zero preserving
1028;; sign. This matches what the hardware would do for this architecture
1029;; revision.
1030; SC300-FAST:  .eabi_attribute 20, 2
1031; SC300-FAST-NOT:  .eabi_attribute 21
1032; SC300-FAST-NOT:  .eabi_attribute 22
1033; SC300-FAST:  .eabi_attribute 23, 1
1034
1035; CORTEX-M4-SOFT:  .cpu cortex-m4
1036; CORTEX-M4-SOFT:  .eabi_attribute 6, 13
1037; CORTEX-M4-SOFT:  .eabi_attribute 7, 77
1038; CORTEX-M4-SOFT:  .eabi_attribute 8, 0
1039; CORTEX-M4-SOFT:  .eabi_attribute 9, 2
1040; CORTEX-M4-SOFT:  .fpu fpv4-sp-d16
1041; CORTEX-M4-SOFT-NOT:   .eabi_attribute 19
1042;; We default to IEEE 754 compliance
1043; CORTEX-M4-SOFT:  .eabi_attribute 20, 1
1044; CORTEX-M4-SOFT:  .eabi_attribute 21, 1
1045; CORTEX-M4-SOFT-NOT:  .eabi_attribute 22
1046; CORTEX-M4-SOFT:  .eabi_attribute 23, 3
1047; CORTEX-M4-SOFT:  .eabi_attribute 24, 1
1048; CORTEX-M4-SOFT:  .eabi_attribute 25, 1
1049; CORTEX-M4-SOFT:  .eabi_attribute 27, 1
1050; CORTEX-M4-SOFT-NOT:  .eabi_attribute 28
1051; CORTEX-M4-SOFT:  .eabi_attribute 36, 1
1052; CORTEX-M4-SOFT:  .eabi_attribute 38, 1
1053; CORTEX-M4-SOFT-NOT:  .eabi_attribute 42
1054; CORTEX-M4-SOFT-NOT:  .eabi_attribute 44
1055; CORTEX-M4-SOFT-NOT:  .eabi_attribute 68
1056
1057; CORTEX-M4-SOFT-FAST-NOT:   .eabi_attribute 19
1058;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1059;; -ffast-math is specified.
1060; CORTEX-M4-SOFT-FAST:  .eabi_attribute 20, 2
1061; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 21
1062; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 22
1063; CORTEX-M4-SOFT-FAST:  .eabi_attribute 23, 1
1064
1065; CORTEX-M4-HARD:  .cpu cortex-m4
1066; CORTEX-M4-HARD:  .eabi_attribute 6, 13
1067; CORTEX-M4-HARD:  .eabi_attribute 7, 77
1068; CORTEX-M4-HARD:  .eabi_attribute 8, 0
1069; CORTEX-M4-HARD:  .eabi_attribute 9, 2
1070; CORTEX-M4-HARD:  .fpu fpv4-sp-d16
1071; CORTEX-M4-HARD-NOT:   .eabi_attribute 19
1072;; We default to IEEE 754 compliance
1073; CORTEX-M4-HARD:  .eabi_attribute 20, 1
1074; CORTEX-M4-HARD:  .eabi_attribute 21, 1
1075; CORTEX-M4-HARD-NOT:  .eabi_attribute 22
1076; CORTEX-M4-HARD:  .eabi_attribute 23, 3
1077; CORTEX-M4-HARD:  .eabi_attribute 24, 1
1078; CORTEX-M4-HARD:  .eabi_attribute 25, 1
1079; CORTEX-M4-HARD:  .eabi_attribute 27, 1
1080; CORTEX-M4-HARD:  .eabi_attribute 28, 1
1081; CORTEX-M4-HARD:  .eabi_attribute 36, 1
1082; CORTEX-M4-HARD:  .eabi_attribute 38, 1
1083; CORTEX-M4-HARD-NOT:  .eabi_attribute 42
1084; CORTEX-M4-HARD-NOT:  .eabi_attribute 44
1085; CORTEX-M4-HARD-NOT:  .eabi_attribute 68
1086
1087; CORTEX-M4-HARD-FAST-NOT:   .eabi_attribute 19
1088;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1089;; -ffast-math is specified.
1090; CORTEX-M4-HARD-FAST:  .eabi_attribute 20, 2
1091; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 21
1092; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 22
1093; CORTEX-M4-HARD-FAST:  .eabi_attribute 23, 1
1094
1095; CORTEX-M7:  .cpu    cortex-m7
1096; CORTEX-M7:  .eabi_attribute 6, 13
1097; CORTEX-M7:  .eabi_attribute 7, 77
1098; CORTEX-M7:  .eabi_attribute 8, 0
1099; CORTEX-M7:  .eabi_attribute 9, 2
1100; CORTEX-M7-SOFT-NOT: .fpu
1101; CORTEX-M7-SINGLE:  .fpu fpv5-sp-d16
1102; CORTEX-M7-DOUBLE:  .fpu fpv5-d16
1103; CORTEX-M7:  .eabi_attribute 17, 1
1104; CORTEX-M7-NOT:   .eabi_attribute 19
1105;; We default to IEEE 754 compliance
1106; CORTEX-M7:  .eabi_attribute 20, 1
1107; CORTEX-M7:  .eabi_attribute 21, 1
1108; CORTEX-M7-NOT:  .eabi_attribute 22
1109; CORTEX-M7:  .eabi_attribute 23, 3
1110; CORTEX-M7:  .eabi_attribute 24, 1
1111; CORTEX-M7:  .eabi_attribute 25, 1
1112; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
1113; CORTEX-M7-SINGLE:  .eabi_attribute 27, 1
1114; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
1115; CORTEX-M7:  .eabi_attribute 36, 1
1116; CORTEX-M7:  .eabi_attribute 38, 1
1117; CORTEX-M7-NOT:  .eabi_attribute 44
1118; CORTEX-M7:  .eabi_attribute 14, 0
1119
1120; CORTEX-M7-NOFPU-FAST-NOT:   .eabi_attribute 19
1121;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1122; CORTEX-M7-FAST:  .eabi_attribute 20, 2
1123;; Despite there being no FPU, we chose to flush to zero preserving
1124;; sign. This matches what the hardware would do for this architecture
1125;; revision.
1126; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
1127; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 21
1128; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 22
1129; CORTEX-M7-NOFPU-FAST:  .eabi_attribute 23, 1
1130
1131; CORTEX-R4:  .cpu cortex-r4
1132; CORTEX-R4:  .eabi_attribute 6, 10
1133; CORTEX-R4:  .eabi_attribute 7, 82
1134; CORTEX-R4:  .eabi_attribute 8, 1
1135; CORTEX-R4:  .eabi_attribute 9, 2
1136; CORTEX-R4-NOT:  .fpu vfpv3-d16
1137; CORTEX-R4-NOT:   .eabi_attribute 19
1138;; We default to IEEE 754 compliance
1139; CORTEX-R4:  .eabi_attribute 20, 1
1140; CORTEX-R4:  .eabi_attribute 21, 1
1141; CORTEX-R4-NOT:  .eabi_attribute 22
1142; CORTEX-R4:  .eabi_attribute 23, 3
1143; CORTEX-R4:  .eabi_attribute 24, 1
1144; CORTEX-R4:  .eabi_attribute 25, 1
1145; CORTEX-R4-NOT:  .eabi_attribute 28
1146; CORTEX-R4-NOT:  .eabi_attribute 36
1147; CORTEX-R4:  .eabi_attribute 38, 1
1148; CORTEX-R4-NOT:  .eabi_attribute 42
1149; CORTEX-R4-NOT:  .eabi_attribute 44
1150; CORTEX-R4-NOT:  .eabi_attribute 68
1151
1152; CORTEX-R4F:  .cpu cortex-r4f
1153; CORTEX-R4F:  .eabi_attribute 6, 10
1154; CORTEX-R4F:  .eabi_attribute 7, 82
1155; CORTEX-R4F:  .eabi_attribute 8, 1
1156; CORTEX-R4F:  .eabi_attribute 9, 2
1157; CORTEX-R4F:  .fpu vfpv3-d16
1158; CORTEX-R4F-NOT:   .eabi_attribute 19
1159;; We default to IEEE 754 compliance
1160; CORTEX-R4F:  .eabi_attribute 20, 1
1161; CORTEX-R4F:  .eabi_attribute 21, 1
1162; CORTEX-R4F-NOT:  .eabi_attribute 22
1163; CORTEX-R4F:  .eabi_attribute 23, 3
1164; CORTEX-R4F:  .eabi_attribute 24, 1
1165; CORTEX-R4F:  .eabi_attribute 25, 1
1166; CORTEX-R4F-NOT:  .eabi_attribute 27, 1
1167; CORTEX-R4F-NOT:  .eabi_attribute 28
1168; CORTEX-R4F-NOT:  .eabi_attribute 36
1169; CORTEX-R4F:  .eabi_attribute 38, 1
1170; CORTEX-R4F-NOT:  .eabi_attribute 42
1171; CORTEX-R4F-NOT:  .eabi_attribute 44
1172; CORTEX-R4F-NOT:  .eabi_attribute 68
1173
1174; CORTEX-R5:  .cpu cortex-r5
1175; CORTEX-R5:  .eabi_attribute 6, 10
1176; CORTEX-R5:  .eabi_attribute 7, 82
1177; CORTEX-R5:  .eabi_attribute 8, 1
1178; CORTEX-R5:  .eabi_attribute 9, 2
1179; CORTEX-R5:  .fpu vfpv3-d16
1180; CORTEX-R5-NOT:   .eabi_attribute 19
1181;; We default to IEEE 754 compliance
1182; CORTEX-R5:  .eabi_attribute 20, 1
1183; CORTEX-R5:  .eabi_attribute 21, 1
1184; CORTEX-R5-NOT:  .eabi_attribute 22
1185; CORTEX-R5:  .eabi_attribute 23, 3
1186; CORTEX-R5:  .eabi_attribute 24, 1
1187; CORTEX-R5:  .eabi_attribute 25, 1
1188; CORTEX-R5-NOT:  .eabi_attribute 27, 1
1189; CORTEX-R5-NOT:  .eabi_attribute 28
1190; CORTEX-R5-NOT:  .eabi_attribute 36
1191; CORTEX-R5:  .eabi_attribute 38, 1
1192; CORTEX-R5-NOT:  .eabi_attribute 42
1193; CORTEX-R5:  .eabi_attribute 44, 2
1194; CORTEX-R5-NOT:  .eabi_attribute 68
1195
1196; CORTEX-R5-FAST-NOT:   .eabi_attribute 19
1197;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
1198; CORTEX-R5-FAST:  .eabi_attribute 20, 2
1199; CORTEX-R5-FAST-NOT:  .eabi_attribute 21
1200; CORTEX-R5-FAST-NOT:  .eabi_attribute 22
1201; CORTEX-R5-FAST:  .eabi_attribute 23, 1
1202
1203; CORTEX-R7:  .cpu cortex-r7
1204; CORTEX-R7:  .eabi_attribute 6, 10
1205; CORTEX-R7:  .eabi_attribute 7, 82
1206; CORTEX-R7:  .eabi_attribute 8, 1
1207; CORTEX-R7:  .eabi_attribute 9, 2
1208; CORTEX-R7:  .fpu vfpv3-d16-fp16
1209; CORTEX-R7-NOT:   .eabi_attribute 19
1210;; We default to IEEE 754 compliance
1211; CORTEX-R7:  .eabi_attribute 20, 1
1212; CORTEX-R7:  .eabi_attribute 21, 1
1213; CORTEX-R7-NOT:  .eabi_attribute 22
1214; CORTEX-R7:  .eabi_attribute 23, 3
1215; CORTEX-R7:  .eabi_attribute 24, 1
1216; CORTEX-R7:  .eabi_attribute 25, 1
1217; CORTEX-R7-NOT:  .eabi_attribute 28
1218; CORTEX-R7:  .eabi_attribute 36, 1
1219; CORTEX-R7:  .eabi_attribute 38, 1
1220; CORTEX-R7:  .eabi_attribute 42, 1
1221; CORTEX-R7:  .eabi_attribute 44, 2
1222; CORTEX-R7-NOT:  .eabi_attribute 68
1223
1224; CORTEX-R7-FAST-NOT:   .eabi_attribute 19
1225;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
1226; CORTEX-R7-FAST:  .eabi_attribute 20, 2
1227; CORTEX-R7-FAST-NOT:  .eabi_attribute 21
1228; CORTEX-R7-FAST-NOT:  .eabi_attribute 22
1229; CORTEX-R7-FAST:  .eabi_attribute 23, 1
1230
1231; CORTEX-R8:  .cpu cortex-r8
1232; CORTEX-R8:  .eabi_attribute 6, 10
1233; CORTEX-R8:  .eabi_attribute 7, 82
1234; CORTEX-R8:  .eabi_attribute 8, 1
1235; CORTEX-R8:  .eabi_attribute 9, 2
1236; CORTEX-R8:  .fpu vfpv3-d16-fp16
1237; CORTEX-R8-NOT:   .eabi_attribute 19
1238;; We default to IEEE 754 compliance
1239; CORTEX-R8:  .eabi_attribute 20, 1
1240; CORTEX-R8:  .eabi_attribute 21, 1
1241; CORTEX-R8-NOT:  .eabi_attribute 22
1242; CORTEX-R8:  .eabi_attribute 23, 3
1243; CORTEX-R8:  .eabi_attribute 24, 1
1244; CORTEX-R8:  .eabi_attribute 25, 1
1245; CORTEX-R8-NOT:  .eabi_attribute 28
1246; CORTEX-R8:  .eabi_attribute 36, 1
1247; CORTEX-R8:  .eabi_attribute 38, 1
1248; CORTEX-R8:  .eabi_attribute 42, 1
1249; CORTEX-R8:  .eabi_attribute 44, 2
1250; CORTEX-R8-NOT:  .eabi_attribute 68
1251
1252; CORTEX-R8-FAST-NOT:   .eabi_attribute 19
1253;; The R8 has the VFPv3 FP unit, which always flushes preserving sign.
1254; CORTEX-R8-FAST:  .eabi_attribute 20, 2
1255; CORTEX-R8-FAST-NOT:  .eabi_attribute 21
1256; CORTEX-R8-FAST-NOT:  .eabi_attribute 22
1257; CORTEX-R8-FAST:  .eabi_attribute 23, 1
1258
1259; CORTEX-A32:  .cpu cortex-a32
1260; CORTEX-A32:  .eabi_attribute 6, 14
1261; CORTEX-A32:  .eabi_attribute 7, 65
1262; CORTEX-A32:  .eabi_attribute 8, 1
1263; CORTEX-A32:  .eabi_attribute 9, 2
1264; CORTEX-A32:  .fpu crypto-neon-fp-armv8
1265; CORTEX-A32:  .eabi_attribute 12, 3
1266; CORTEX-A32-NOT:   .eabi_attribute 19
1267;; We default to IEEE 754 compliance
1268; CORTEX-A32:  .eabi_attribute 20, 1
1269; CORTEX-A32:  .eabi_attribute 21, 1
1270; CORTEX-A32-NOT:  .eabi_attribute 22
1271; CORTEX-A32:  .eabi_attribute 23, 3
1272; CORTEX-A32:  .eabi_attribute 24, 1
1273; CORTEX-A32:  .eabi_attribute 25, 1
1274; CORTEX-A32-NOT:  .eabi_attribute 27
1275; CORTEX-A32-NOT:  .eabi_attribute 28
1276; CORTEX-A32:  .eabi_attribute 36, 1
1277; CORTEX-A32:  .eabi_attribute 38, 1
1278; CORTEX-A32:  .eabi_attribute 42, 1
1279; CORTEX-A32-NOT:  .eabi_attribute 44
1280; CORTEX-A32:  .eabi_attribute 68, 3
1281
1282; CORTEX-A32-FAST-NOT:   .eabi_attribute 19
1283;; The A32 has the ARMv8 FP unit, which always flushes preserving sign.
1284; CORTEX-A32-FAST:  .eabi_attribute 20, 2
1285; CORTEX-A32-FAST-NOT:  .eabi_attribute 21
1286; CORTEX-A32-FAST-NOT:  .eabi_attribute 22
1287; CORTEX-A32-FAST:  .eabi_attribute 23, 1
1288
1289; CORTEX-A35:  .cpu cortex-a35
1290; CORTEX-A35:  .eabi_attribute 6, 14
1291; CORTEX-A35:  .eabi_attribute 7, 65
1292; CORTEX-A35:  .eabi_attribute 8, 1
1293; CORTEX-A35:  .eabi_attribute 9, 2
1294; CORTEX-A35:  .fpu crypto-neon-fp-armv8
1295; CORTEX-A35:  .eabi_attribute 12, 3
1296; CORTEX-A35-NOT:   .eabi_attribute 19
1297;; We default to IEEE 754 compliance
1298; CORTEX-A35:  .eabi_attribute 20, 1
1299; CORTEX-A35:  .eabi_attribute 21, 1
1300; CORTEX-A35-NOT:  .eabi_attribute 22
1301; CORTEX-A35:  .eabi_attribute 23, 3
1302; CORTEX-A35:  .eabi_attribute 24, 1
1303; CORTEX-A35:  .eabi_attribute 25, 1
1304; CORTEX-A35-NOT:  .eabi_attribute 27
1305; CORTEX-A35-NOT:  .eabi_attribute 28
1306; CORTEX-A35:  .eabi_attribute 36, 1
1307; CORTEX-A35:  .eabi_attribute 38, 1
1308; CORTEX-A35:  .eabi_attribute 42, 1
1309; CORTEX-A35-NOT:  .eabi_attribute 44
1310; CORTEX-A35:  .eabi_attribute 68, 3
1311
1312; CORTEX-A35-FAST-NOT:   .eabi_attribute 19
1313;; The A35 has the ARMv8 FP unit, which always flushes preserving sign.
1314; CORTEX-A35-FAST:  .eabi_attribute 20, 2
1315; CORTEX-A35-FAST-NOT:  .eabi_attribute 21
1316; CORTEX-A35-FAST-NOT:  .eabi_attribute 22
1317; CORTEX-A35-FAST:  .eabi_attribute 23, 1
1318
1319; CORTEX-A53:  .cpu cortex-a53
1320; CORTEX-A53:  .eabi_attribute 6, 14
1321; CORTEX-A53:  .eabi_attribute 7, 65
1322; CORTEX-A53:  .eabi_attribute 8, 1
1323; CORTEX-A53:  .eabi_attribute 9, 2
1324; CORTEX-A53:  .fpu crypto-neon-fp-armv8
1325; CORTEX-A53:  .eabi_attribute 12, 3
1326; CORTEX-A53-NOT:   .eabi_attribute 19
1327;; We default to IEEE 754 compliance
1328; CORTEX-A53:  .eabi_attribute 20, 1
1329; CORTEX-A53:  .eabi_attribute 21, 1
1330; CORTEX-A53-NOT:  .eabi_attribute 22
1331; CORTEX-A53:  .eabi_attribute 23, 3
1332; CORTEX-A53:  .eabi_attribute 24, 1
1333; CORTEX-A53:  .eabi_attribute 25, 1
1334; CORTEX-A53-NOT:  .eabi_attribute 27
1335; CORTEX-A53-NOT:  .eabi_attribute 28
1336; CORTEX-A53:  .eabi_attribute 36, 1
1337; CORTEX-A53:  .eabi_attribute 38, 1
1338; CORTEX-A53:  .eabi_attribute 42, 1
1339; CORTEX-A53-NOT:  .eabi_attribute 44
1340; CORTEX-A53:  .eabi_attribute 68, 3
1341
1342; CORTEX-A53-FAST-NOT:   .eabi_attribute 19
1343;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1344; CORTEX-A53-FAST:  .eabi_attribute 20, 2
1345; CORTEX-A53-FAST-NOT:  .eabi_attribute 21
1346; CORTEX-A53-FAST-NOT:  .eabi_attribute 22
1347; CORTEX-A53-FAST:  .eabi_attribute 23, 1
1348
1349; CORTEX-A57:  .cpu cortex-a57
1350; CORTEX-A57:  .eabi_attribute 6, 14
1351; CORTEX-A57:  .eabi_attribute 7, 65
1352; CORTEX-A57:  .eabi_attribute 8, 1
1353; CORTEX-A57:  .eabi_attribute 9, 2
1354; CORTEX-A57:  .fpu crypto-neon-fp-armv8
1355; CORTEX-A57:  .eabi_attribute 12, 3
1356; CORTEX-A57-NOT:   .eabi_attribute 19
1357;; We default to IEEE 754 compliance
1358; CORTEX-A57:  .eabi_attribute 20, 1
1359; CORTEX-A57:  .eabi_attribute 21, 1
1360; CORTEX-A57-NOT:  .eabi_attribute 22
1361; CORTEX-A57:  .eabi_attribute 23, 3
1362; CORTEX-A57:  .eabi_attribute 24, 1
1363; CORTEX-A57:  .eabi_attribute 25, 1
1364; CORTEX-A57-NOT:  .eabi_attribute 27
1365; CORTEX-A57-NOT:  .eabi_attribute 28
1366; CORTEX-A57:  .eabi_attribute 36, 1
1367; CORTEX-A57:  .eabi_attribute 38, 1
1368; CORTEX-A57:  .eabi_attribute 42, 1
1369; CORTEX-A57-NOT:  .eabi_attribute 44
1370; CORTEX-A57:  .eabi_attribute 68, 3
1371
1372; CORTEX-A57-FAST-NOT:   .eabi_attribute 19
1373;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1374; CORTEX-A57-FAST:  .eabi_attribute 20, 2
1375; CORTEX-A57-FAST-NOT:  .eabi_attribute 21
1376; CORTEX-A57-FAST-NOT:  .eabi_attribute 22
1377; CORTEX-A57-FAST:  .eabi_attribute 23, 1
1378
1379; CORTEX-A72:  .cpu cortex-a72
1380; CORTEX-A72:  .eabi_attribute 6, 14
1381; CORTEX-A72:  .eabi_attribute 7, 65
1382; CORTEX-A72:  .eabi_attribute 8, 1
1383; CORTEX-A72:  .eabi_attribute 9, 2
1384; CORTEX-A72:  .fpu crypto-neon-fp-armv8
1385; CORTEX-A72:  .eabi_attribute 12, 3
1386; CORTEX-A72-NOT:   .eabi_attribute 19
1387;; We default to IEEE 754 compliance
1388; CORTEX-A72:  .eabi_attribute 20, 1
1389; CORTEX-A72:  .eabi_attribute 21, 1
1390; CORTEX-A72-NOT:  .eabi_attribute 22
1391; CORTEX-A72:  .eabi_attribute 23, 3
1392; CORTEX-A72:  .eabi_attribute 24, 1
1393; CORTEX-A72:  .eabi_attribute 25, 1
1394; CORTEX-A72-NOT:  .eabi_attribute 27
1395; CORTEX-A72-NOT:  .eabi_attribute 28
1396; CORTEX-A72:  .eabi_attribute 36, 1
1397; CORTEX-A72:  .eabi_attribute 38, 1
1398; CORTEX-A72:  .eabi_attribute 42, 1
1399; CORTEX-A72-NOT:  .eabi_attribute 44
1400; CORTEX-A72:  .eabi_attribute 68, 3
1401
1402; CORTEX-A72-FAST-NOT:   .eabi_attribute 19
1403;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1404; CORTEX-A72-FAST:  .eabi_attribute 20, 2
1405; CORTEX-A72-FAST-NOT:  .eabi_attribute 21
1406; CORTEX-A72-FAST-NOT:  .eabi_attribute 22
1407; CORTEX-A72-FAST:  .eabi_attribute 23, 1
1408
1409; CORTEX-A73:  .cpu cortex-a73
1410; CORTEX-A73:  .eabi_attribute 6, 14
1411; CORTEX-A73:  .eabi_attribute 7, 65
1412; CORTEX-A73:  .eabi_attribute 8, 1
1413; CORTEX-A73:  .eabi_attribute 9, 2
1414; CORTEX-A73:  .fpu  crypto-neon-fp-armv8
1415; CORTEX-A73:  .eabi_attribute 12, 3
1416; CORTEX-A73-NOT: .eabi_attribute 19
1417;; We default to IEEE 754 compliance
1418; CORTEX-A73:  .eabi_attribute 20, 1
1419; CORTEX-A73:  .eabi_attribute 21, 1
1420; CORTEX-A73-NOT:  .eabi_attribute 22
1421; CORTEX-A73:  .eabi_attribute 23, 3
1422; CORTEX-A73:  .eabi_attribute 24, 1
1423; CORTEX-A73:  .eabi_attribute 25, 1
1424; CORTEX-A73-NOT: .eabi_attribute 27
1425; CORTEX-A73-NOT: .eabi_attribute 28
1426; CORTEX-A73:  .eabi_attribute 36, 1
1427; CORTEX-A73:  .eabi_attribute 38, 1
1428; CORTEX-A73:  .eabi_attribute 42, 1
1429; CORTEX-A73-NOT: .eabi_attribute 44
1430; CORTEX-A73:  .eabi_attribute 14, 0
1431; CORTEX-A73:  .eabi_attribute 68, 3
1432
1433; EXYNOS-M1:  .cpu exynos-m1
1434; EXYNOS-M1:  .eabi_attribute 6, 14
1435; EXYNOS-M1:  .eabi_attribute 7, 65
1436; EXYNOS-M1:  .eabi_attribute 8, 1
1437; EXYNOS-M1:  .eabi_attribute 9, 2
1438; EXYNOS-M1:  .fpu crypto-neon-fp-armv8
1439; EXYNOS-M1:  .eabi_attribute 12, 3
1440; EXYNOS-M1-NOT:   .eabi_attribute 19
1441;; We default to IEEE 754 compliance
1442; EXYNOS-M1:  .eabi_attribute 20, 1
1443; EXYNOS-M1:  .eabi_attribute 21, 1
1444; EXYNOS-M1-NOT:  .eabi_attribute 22
1445; EXYNOS-M1:  .eabi_attribute 23, 3
1446; EXYNOS-M1:  .eabi_attribute 24, 1
1447; EXYNOS-M1:  .eabi_attribute 25, 1
1448; EXYNOS-M1-NOT:  .eabi_attribute 27
1449; EXYNOS-M1-NOT:  .eabi_attribute 28
1450; EXYNOS-M1:  .eabi_attribute 36, 1
1451; EXYNOS-M1:  .eabi_attribute 38, 1
1452; EXYNOS-M1:  .eabi_attribute 42, 1
1453; EXYNOS-M1-NOT:  .eabi_attribute 44
1454; EXYNOS-M1:  .eabi_attribute 68, 3
1455
1456; EXYNOS-M1-FAST-NOT:   .eabi_attribute 19
1457;; The exynos-m1 has the ARMv8 FP unit, which always flushes preserving sign.
1458; EXYNOS-M1-FAST:  .eabi_attribute 20, 2
1459; EXYNOS-M1-FAST-NOT:  .eabi_attribute 21
1460; EXYNOS-M1-FAST-NOT:  .eabi_attribute 22
1461; EXYNOS-M1-FAST:  .eabi_attribute 23, 1
1462
1463; EXYNOS-M2:  .cpu exynos-m2
1464; EXYNOS-M2:  .eabi_attribute 6, 14
1465; EXYNOS-M2:  .eabi_attribute 7, 65
1466; EXYNOS-M2:  .eabi_attribute 8, 1
1467; EXYNOS-M2:  .eabi_attribute 9, 2
1468; EXYNOS-M2:  .fpu crypto-neon-fp-armv8
1469; EXYNOS-M2:  .eabi_attribute 12, 3
1470; EXYNOS-M2-NOT:   .eabi_attribute 19
1471;; We default to IEEE 754 compliance
1472; EXYNOS-M2:  .eabi_attribute 20, 1
1473; EXYNOS-M2:  .eabi_attribute 21, 1
1474; EXYNOS-M2-NOT:  .eabi_attribute 22
1475; EXYNOS-M2:  .eabi_attribute 23, 3
1476; EXYNOS-M2:  .eabi_attribute 24, 1
1477; EXYNOS-M2:  .eabi_attribute 25, 1
1478; EXYNOS-M2-NOT:  .eabi_attribute 27
1479; EXYNOS-M2-NOT:  .eabi_attribute 28
1480; EXYNOS-M2:  .eabi_attribute 36, 1
1481; EXYNOS-M2:  .eabi_attribute 38, 1
1482; EXYNOS-M2:  .eabi_attribute 42, 1
1483; EXYNOS-M2-NOT:  .eabi_attribute 44
1484; EXYNOS-M2:  .eabi_attribute 68, 3
1485
1486; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
1487; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
1488; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
1489; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16
1490; GENERIC-FPU-NEON-FP16: .fpu neon-fp16
1491
1492; GENERIC-ARMV8_1-A:  .eabi_attribute 6, 14
1493; GENERIC-ARMV8_1-A:  .eabi_attribute 7, 65
1494; GENERIC-ARMV8_1-A:  .eabi_attribute 8, 1
1495; GENERIC-ARMV8_1-A:  .eabi_attribute 9, 2
1496; GENERIC-ARMV8_1-A:  .fpu crypto-neon-fp-armv8
1497; GENERIC-ARMV8_1-A:  .eabi_attribute 12, 4
1498; GENERIC-ARMV8_1-A-NOT:   .eabi_attribute 19
1499;; We default to IEEE 754 compliance
1500; GENERIC-ARMV8_1-A:  .eabi_attribute 20, 1
1501; GENERIC-ARMV8_1-A:  .eabi_attribute 21, 1
1502; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 22
1503; GENERIC-ARMV8_1-A:  .eabi_attribute 23, 3
1504; GENERIC-ARMV8_1-A:  .eabi_attribute 24, 1
1505; GENERIC-ARMV8_1-A:  .eabi_attribute 25, 1
1506; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 27
1507; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 28
1508; GENERIC-ARMV8_1-A:  .eabi_attribute 36, 1
1509; GENERIC-ARMV8_1-A:  .eabi_attribute 38, 1
1510; GENERIC-ARMV8_1-A:  .eabi_attribute 42, 1
1511; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 44
1512; GENERIC-ARMV8_1-A:  .eabi_attribute 68, 3
1513
1514; GENERIC-ARMV8_1-A-FAST-NOT:   .eabi_attribute 19
1515;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign.
1516; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 20, 2
1517; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 21
1518; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 22
1519; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 23, 1
1520
1521; RELOC-PIC:  .eabi_attribute 15, 1
1522; RELOC-PIC:  .eabi_attribute 16, 1
1523; RELOC-PIC:  .eabi_attribute 17, 2
1524; RELOC-OTHER:  .eabi_attribute 17, 1
1525
1526; PCS-R9-USE:  .eabi_attribute 14, 0
1527; PCS-R9-RESERVE:  .eabi_attribute 14, 3
1528
1529define i32 @f(i64 %z) {
1530    ret i32 0
1531}
1532