xref: /llvm-project/llvm/test/CodeGen/ARM/build-attributes.ll (revision 42427d2c3833ece68daae2d405e2a840bde31a82) 
1; This tests that MC/asm header conversion is smooth and that the
2; build attributes are correct
3
4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale | FileCheck %s --check-prefix=XSCALE
5; RUN: llc < %s -mtriple=armv6-linux-gnueabi | FileCheck %s --check-prefix=V6
6; RUN: llc < %s -mtriple=armv6-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST
7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi | FileCheck %s --check-prefix=V6M
9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi | FileCheck %s --check-prefix=V6M
11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s | FileCheck %s --check-prefix=ARM1156T2F-S
13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast  | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST
17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
20; RUN: llc < %s -mtriple=armv7-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST
21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
22; RUN: llc < %s -mtriple=armv8-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST
23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
30; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
31; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
32; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST
49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST
52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
54
55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16
56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16
57; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD
58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16
59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16
60
61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
62; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0
63; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
64; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
65; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus | FileCheck %s --check-prefix=CORTEX-M0PLUS
66; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
67; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
68; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 | FileCheck %s --check-prefix=CORTEX-M1
69; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
70; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
71; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 | FileCheck %s --check-prefix=SC000
72; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
73; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
74; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
75; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
76; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
77; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
78; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
79; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
80; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
81; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
82; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
83; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
84; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
85; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
86; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
87; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
88; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
89; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
90; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
91; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
92; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
93; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
94; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
95; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
96; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
97; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
98; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
99; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
100; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
101; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
102; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
103; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST
104; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
105; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
106; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
107; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
108; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
109; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
110; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
111; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s  --check-prefix=CORTEX-A7-CHECK
112; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s  --check-prefix=CORTEX-A7-CHECK-FAST
113; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
114; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
115; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
116; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
117; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
118; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
119; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
120; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
121; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=default | FileCheck %s --check-prefix=RELOC-OTHER
122; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
123; RUN: llc < %s -mtriple=arm-none-linux-gnueabi | FileCheck %s --check-prefix=RELOC-OTHER
124; RUN: llc < %s -mtriple=arm-none-linux-gnueabi | FileCheck %s --check-prefix=PCS-R9-USE
125; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -arm-reserve-r9 | FileCheck %s --check-prefix=PCS-R9-RESERVE
126
127; ARMv8.1a (AArch32)
128; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
129; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
130; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
131; ARMv8a (AArch32)
132; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
133; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
134; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
135; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
136; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
137; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
138; ARMv7a
139; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
140; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
141; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
142; ARMv7r
143; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
144; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
145; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
146; ARMv7m
147; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
148; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
149; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
150; ARMv6
151; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
152; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=STRICT-ALIGN
153; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
154; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
155; ARMv6k
156; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
157; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=STRICT-ALIGN
158; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
159; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
160; ARMv6m
161; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -arm-no-strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
162; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -arm-strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
163; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -arm-no-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
164; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
165; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
166; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
167; ARMv5
168; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -arm-no-strict-align | FileCheck %s --check-prefix=NO-STRICT-ALIGN
169; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -arm-strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
170; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=STRICT-ALIGN
171
172; XSCALE:      .eabi_attribute 6, 5
173; XSCALE:      .eabi_attribute 8, 1
174; XSCALE:      .eabi_attribute 9, 1
175
176; DYN-ROUNDING: .eabi_attribute 19, 1
177
178; V6:   .eabi_attribute 6, 6
179; V6:   .eabi_attribute 8, 1
180;; We assume round-to-nearest by default (matches GCC)
181; V6-NOT:   .eabi_attribute 19
182;; The default choice made by llc is for a V6 CPU without an FPU.
183;; This is not an interesting detail, but for such CPUs, the default intention is to use
184;; software floating-point support. The choice is not important for targets without
185;; FPU support!
186; V6:   .eabi_attribute 20, 1
187; V6:   .eabi_attribute 21, 1
188; V6-NOT:   .eabi_attribute 22
189; V6:   .eabi_attribute 23, 3
190; V6:   .eabi_attribute 24, 1
191; V6:   .eabi_attribute 25, 1
192; V6-NOT:   .eabi_attribute 27
193; V6-NOT:   .eabi_attribute 28
194; V6-NOT:    .eabi_attribute 36
195; V6:    .eabi_attribute 38, 1
196; V6-NOT:    .eabi_attribute 42
197; V6-NOT:  .eabi_attribute 44
198; V6-NOT:    .eabi_attribute 68
199
200; V6-FAST-NOT:   .eabi_attribute 19
201;; Despite the V6 CPU having no FPU by default, we chose to flush to
202;; positive zero here. There's no hardware support doing this, but the
203;; fast maths software library might.
204; V6-FAST-NOT:   .eabi_attribute 20
205; V6-FAST-NOT:   .eabi_attribute 21
206; V6-FAST-NOT:   .eabi_attribute 22
207; V6-FAST:   .eabi_attribute 23, 1
208
209;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for
210;; V6-M, however we don't model the OS extension so this is fine.
211; V6M:  .eabi_attribute 6, 12
212; V6M-NOT:  .eabi_attribute 7
213; V6M:  .eabi_attribute 8, 0
214; V6M:  .eabi_attribute 9, 1
215; V6M-NOT:   .eabi_attribute 19
216;; The default choice made by llc is for a V6M CPU without an FPU.
217;; This is not an interesting detail, but for such CPUs, the default intention is to use
218;; software floating-point support. The choice is not important for targets without
219;; FPU support!
220; V6M:  .eabi_attribute 20, 1
221; V6M:   .eabi_attribute 21, 1
222; V6M-NOT:   .eabi_attribute 22
223; V6M:   .eabi_attribute 23, 3
224; V6M:  .eabi_attribute 24, 1
225; V6M:  .eabi_attribute 25, 1
226; V6M-NOT:  .eabi_attribute 27
227; V6M-NOT:  .eabi_attribute 28
228; V6M-NOT:  .eabi_attribute 36
229; V6M:  .eabi_attribute 38, 1
230; V6M-NOT:  .eabi_attribute 42
231; V6M-NOT:  .eabi_attribute 44
232; V6M-NOT:  .eabi_attribute 68
233
234; V6M-FAST-NOT:   .eabi_attribute 19
235;; Despite the V6M CPU having no FPU by default, we chose to flush to
236;; positive zero here. There's no hardware support doing this, but the
237;; fast maths software library might.
238; V6M-FAST-NOT:  .eabi_attribute 20
239; V6M-FAST-NOT:   .eabi_attribute 21
240; V6M-FAST-NOT:   .eabi_attribute 22
241; V6M-FAST:   .eabi_attribute 23, 1
242
243; ARM1156T2F-S: .cpu arm1156t2f-s
244; ARM1156T2F-S: .eabi_attribute 6, 8
245; ARM1156T2F-S: .eabi_attribute 8, 1
246; ARM1156T2F-S: .eabi_attribute 9, 2
247; ARM1156T2F-S: .fpu vfpv2
248; ARM1156T2F-S-NOT:   .eabi_attribute 19
249;; We default to IEEE 754 compliance
250; ARM1156T2F-S: .eabi_attribute 20, 1
251; ARM1156T2F-S: .eabi_attribute 21, 1
252; ARM1156T2F-S-NOT: .eabi_attribute 22
253; ARM1156T2F-S: .eabi_attribute 23, 3
254; ARM1156T2F-S: .eabi_attribute 24, 1
255; ARM1156T2F-S: .eabi_attribute 25, 1
256; ARM1156T2F-S-NOT: .eabi_attribute 27
257; ARM1156T2F-S-NOT: .eabi_attribute 28
258; ARM1156T2F-S-NOT: .eabi_attribute 36
259; ARM1156T2F-S: .eabi_attribute 38, 1
260; ARM1156T2F-S-NOT:    .eabi_attribute 42
261; ARM1156T2F-S-NOT:    .eabi_attribute 44
262; ARM1156T2F-S-NOT:    .eabi_attribute 68
263
264; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 19
265;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
266;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
267;; select. LLVM historically picks 0.
268; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
269; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 21
270; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 22
271; ARM1156T2F-S-FAST:   .eabi_attribute 23, 1
272
273; V7M:  .eabi_attribute 6, 10
274; V7M:  .eabi_attribute 7, 77
275; V7M:  .eabi_attribute 8, 0
276; V7M:  .eabi_attribute 9, 2
277; V7M-NOT:   .eabi_attribute 19
278;; The default choice made by llc is for a V7M CPU without an FPU.
279;; This is not an interesting detail, but for such CPUs, the default intention is to use
280;; software floating-point support. The choice is not important for targets without
281;; FPU support!
282; V7M:  .eabi_attribute 20, 1
283; V7M: .eabi_attribute 21, 1
284; V7M-NOT: .eabi_attribute 22
285; V7M: .eabi_attribute 23, 3
286; V7M:  .eabi_attribute 24, 1
287; V7M:  .eabi_attribute 25, 1
288; V7M-NOT:  .eabi_attribute 27
289; V7M-NOT:  .eabi_attribute 28
290; V7M-NOT:  .eabi_attribute 36
291; V7M:  .eabi_attribute 38, 1
292; V7M-NOT:  .eabi_attribute 42
293; V7M-NOT:  .eabi_attribute 44
294; V7M-NOT:  .eabi_attribute 68
295
296; V7M-FAST-NOT:   .eabi_attribute 19
297;; Despite the V7M CPU having no FPU by default, we chose to flush
298;; preserving sign. This matches what the hardware would do in the
299;; architecture revision were to exist on the current target.
300; V7M-FAST:  .eabi_attribute 20, 2
301; V7M-FAST-NOT:   .eabi_attribute 21
302; V7M-FAST-NOT:   .eabi_attribute 22
303; V7M-FAST:   .eabi_attribute 23, 1
304
305; V7:      .syntax unified
306; V7: .eabi_attribute 6, 10
307; V7-NOT:   .eabi_attribute 19
308;; In safe-maths mode we default to an IEEE 754 compliant choice.
309; V7: .eabi_attribute 20, 1
310; V7: .eabi_attribute 21, 1
311; V7-NOT: .eabi_attribute 22
312; V7: .eabi_attribute 23, 3
313; V7: .eabi_attribute 24, 1
314; V7: .eabi_attribute 25, 1
315; V7-NOT: .eabi_attribute 27
316; V7-NOT: .eabi_attribute 28
317; V7-NOT: .eabi_attribute 36
318; V7: .eabi_attribute 38, 1
319; V7-NOT:    .eabi_attribute 42
320; V7-NOT:    .eabi_attribute 44
321; V7-NOT:    .eabi_attribute 68
322
323; V7-FAST-NOT:   .eabi_attribute 19
324;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
325;; denormals to zero preserving the sign.
326; V7-FAST: .eabi_attribute 20, 2
327; V7-FAST-NOT:   .eabi_attribute 21
328; V7-FAST-NOT:   .eabi_attribute 22
329; V7-FAST:   .eabi_attribute 23, 1
330
331; V8:      .syntax unified
332; V8: .eabi_attribute 67, "2.09"
333; V8: .eabi_attribute 6, 14
334; V8-NOT:   .eabi_attribute 19
335; V8: .eabi_attribute 20, 1
336; V8: .eabi_attribute 21, 1
337; V8-NOT: .eabi_attribute 22
338; V8: .eabi_attribute 23, 3
339; V8-NOT: .eabi_attribute 44
340
341; V8-FAST-NOT:   .eabi_attribute 19
342;; The default does have an FPU, and for V8-A, it flushes preserving sign.
343; V8-FAST: .eabi_attribute 20, 2
344; V8-FAST-NOT: .eabi_attribute 21
345; V8-FAST-NOT: .eabi_attribute 22
346; V8-FAST: .eabi_attribute 23, 1
347
348; Vt8:     .syntax unified
349; Vt8: .eabi_attribute 6, 14
350; Vt8-NOT:   .eabi_attribute 19
351; Vt8: .eabi_attribute 20, 1
352; Vt8: .eabi_attribute 21, 1
353; Vt8-NOT: .eabi_attribute 22
354; Vt8: .eabi_attribute 23, 3
355
356; V8-FPARMv8:      .syntax unified
357; V8-FPARMv8: .eabi_attribute 6, 14
358; V8-FPARMv8: .fpu fp-armv8
359
360; V8-NEON:      .syntax unified
361; V8-NEON: .eabi_attribute 6, 14
362; V8-NEON: .fpu neon
363; V8-NEON: .eabi_attribute 12, 3
364
365; V8-FPARMv8-NEON:      .syntax unified
366; V8-FPARMv8-NEON: .eabi_attribute 6, 14
367; V8-FPARMv8-NEON: .fpu neon-fp-armv8
368; V8-FPARMv8-NEON: .eabi_attribute 12, 3
369
370; V8-FPARMv8-NEON-CRYPTO:      .syntax unified
371; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
372; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
373; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
374
375; Tag_CPU_unaligned_access
376; NO-STRICT-ALIGN: .eabi_attribute 34, 1
377; STRICT-ALIGN: .eabi_attribute 34, 0
378
379; Tag_CPU_arch  'ARMv7'
380; CORTEX-A7-CHECK: .eabi_attribute      6, 10
381; CORTEX-A7-NOFPU: .eabi_attribute      6, 10
382
383; CORTEX-A7-FPUV4: .eabi_attribute      6, 10
384
385; Tag_CPU_arch_profile 'A'
386; CORTEX-A7-CHECK: .eabi_attribute      7, 65
387; CORTEX-A7-NOFPU: .eabi_attribute      7, 65
388; CORTEX-A7-FPUV4: .eabi_attribute      7, 65
389
390; Tag_ARM_ISA_use
391; CORTEX-A7-CHECK: .eabi_attribute      8, 1
392; CORTEX-A7-NOFPU: .eabi_attribute      8, 1
393; CORTEX-A7-FPUV4: .eabi_attribute      8, 1
394
395; Tag_THUMB_ISA_use
396; CORTEX-A7-CHECK: .eabi_attribute      9, 2
397; CORTEX-A7-NOFPU: .eabi_attribute      9, 2
398; CORTEX-A7-FPUV4: .eabi_attribute      9, 2
399
400; CORTEX-A7-CHECK: .fpu neon-vfpv4
401; CORTEX-A7-NOFPU-NOT: .fpu
402; CORTEX-A7-FPUV4: .fpu vfpv4
403
404; CORTEX-A7-CHECK-NOT:   .eabi_attribute 19
405; Tag_ABI_FP_denormal
406;; We default to IEEE 754 compliance
407; CORTEX-A7-CHECK: .eabi_attribute      20, 1
408;; The A7 has VFPv3 support by default, so flush preserving sign.
409; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
410; CORTEX-A7-NOFPU: .eabi_attribute      20, 1
411;; Despite there being no FPU, we chose to flush to zero preserving
412;; sign. This matches what the hardware would do for this architecture
413;; revision.
414; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
415; CORTEX-A7-FPUV4: .eabi_attribute      20, 1
416;; The VFPv4 FPU flushes preserving sign.
417; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
418
419; Tag_ABI_FP_exceptions
420; CORTEX-A7-CHECK: .eabi_attribute      21, 1
421; CORTEX-A7-NOFPU: .eabi_attribute      21, 1
422; CORTEX-A7-FPUV4: .eabi_attribute      21, 1
423
424; Tag_ABI_FP_user_exceptions
425; CORTEX-A7-CHECK-NOT: .eabi_attribute      22
426; CORTEX-A7-NOFPU-NOT: .eabi_attribute      22
427; CORTEX-A7-FPUV4-NOT: .eabi_attribute      22
428
429; Tag_ABI_FP_number_model
430; CORTEX-A7-CHECK: .eabi_attribute      23, 3
431; CORTEX-A7-NOFPU: .eabi_attribute      23, 3
432; CORTEX-A7-FPUV4: .eabi_attribute      23, 3
433
434; Tag_ABI_align_needed
435; CORTEX-A7-CHECK: .eabi_attribute      24, 1
436; CORTEX-A7-NOFPU: .eabi_attribute      24, 1
437; CORTEX-A7-FPUV4: .eabi_attribute      24, 1
438
439; Tag_ABI_align_preserved
440; CORTEX-A7-CHECK: .eabi_attribute      25, 1
441; CORTEX-A7-NOFPU: .eabi_attribute      25, 1
442; CORTEX-A7-FPUV4: .eabi_attribute      25, 1
443
444; Tag_FP_HP_extension
445; CORTEX-A7-CHECK: .eabi_attribute      36, 1
446; CORTEX-A7-NOFPU-NOT: .eabi_attribute  36
447; CORTEX-A7-FPUV4: .eabi_attribute      36, 1
448
449; Tag_FP_16bit_format
450; CORTEX-A7-CHECK: .eabi_attribute      38, 1
451; CORTEX-A7-NOFPU: .eabi_attribute      38, 1
452; CORTEX-A7-FPUV4: .eabi_attribute      38, 1
453
454; Tag_MPextension_use
455; CORTEX-A7-CHECK: .eabi_attribute      42, 1
456; CORTEX-A7-NOFPU: .eabi_attribute      42, 1
457; CORTEX-A7-FPUV4: .eabi_attribute      42, 1
458
459; Tag_DIV_use
460; CORTEX-A7-CHECK: .eabi_attribute      44, 2
461; CORTEX-A7-NOFPU: .eabi_attribute      44, 2
462; CORTEX-A7-FPUV4: .eabi_attribute      44, 2
463
464; Tag_Virtualization_use
465; CORTEX-A7-CHECK: .eabi_attribute      68, 3
466; CORTEX-A7-NOFPU: .eabi_attribute      68, 3
467; CORTEX-A7-FPUV4: .eabi_attribute      68, 3
468
469; CORTEX-A5-DEFAULT:        .cpu    cortex-a5
470; CORTEX-A5-DEFAULT:        .eabi_attribute 6, 10
471; CORTEX-A5-DEFAULT:        .eabi_attribute 7, 65
472; CORTEX-A5-DEFAULT:        .eabi_attribute 8, 1
473; CORTEX-A5-DEFAULT:        .eabi_attribute 9, 2
474; CORTEX-A5-DEFAULT:        .fpu    neon-vfpv4
475; CORTEX-A5-NOT:   .eabi_attribute 19
476;; We default to IEEE 754 compliance
477; CORTEX-A5-DEFAULT:        .eabi_attribute 20, 1
478; CORTEX-A5-DEFAULT:        .eabi_attribute 21, 1
479; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 22
480; CORTEX-A5-DEFAULT:        .eabi_attribute 23, 3
481; CORTEX-A5-DEFAULT:        .eabi_attribute 24, 1
482; CORTEX-A5-DEFAULT:        .eabi_attribute 25, 1
483; CORTEX-A5-DEFAULT:        .eabi_attribute 42, 1
484; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 44
485; CORTEX-A5-DEFAULT:        .eabi_attribute 68, 1
486
487; CORTEX-A5-DEFAULT-FAST-NOT:   .eabi_attribute 19
488;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
489;; is given.
490; CORTEX-A5-DEFAULT-FAST:        .eabi_attribute 20, 2
491; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21
492; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22
493; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1
494
495; CORTEX-A5-NONEON:        .cpu    cortex-a5
496; CORTEX-A5-NONEON:        .eabi_attribute 6, 10
497; CORTEX-A5-NONEON:        .eabi_attribute 7, 65
498; CORTEX-A5-NONEON:        .eabi_attribute 8, 1
499; CORTEX-A5-NONEON:        .eabi_attribute 9, 2
500; CORTEX-A5-NONEON:        .fpu    vfpv4-d16
501;; We default to IEEE 754 compliance
502; CORTEX-A5-NONEON:        .eabi_attribute 20, 1
503; CORTEX-A5-NONEON:        .eabi_attribute 21, 1
504; CORTEX-A5-NONEON-NOT:    .eabi_attribute 22
505; CORTEX-A5-NONEON:        .eabi_attribute 23, 3
506; CORTEX-A5-NONEON:        .eabi_attribute 24, 1
507; CORTEX-A5-NONEON:        .eabi_attribute 25, 1
508; CORTEX-A5-NONEON:        .eabi_attribute 42, 1
509; CORTEX-A5-NONEON:        .eabi_attribute 68, 1
510
511; CORTEX-A5-NONEON-FAST-NOT:   .eabi_attribute 19
512;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
513;; is given.
514; CORTEX-A5-NONEON-FAST:        .eabi_attribute 20, 2
515; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21
516; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22
517; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1
518
519; CORTEX-A5-NOFPU:        .cpu    cortex-a5
520; CORTEX-A5-NOFPU:        .eabi_attribute 6, 10
521; CORTEX-A5-NOFPU:        .eabi_attribute 7, 65
522; CORTEX-A5-NOFPU:        .eabi_attribute 8, 1
523; CORTEX-A5-NOFPU:        .eabi_attribute 9, 2
524; CORTEX-A5-NOFPU-NOT:    .fpu
525; CORTEX-A5-NOFPU-NOT:   .eabi_attribute 19
526;; We default to IEEE 754 compliance
527; CORTEX-A5-NOFPU:        .eabi_attribute 20, 1
528; CORTEX-A5-NOFPU:        .eabi_attribute 21, 1
529; CORTEX-A5-NOFPU-NOT:    .eabi_attribute 22
530; CORTEX-A5-NOFPU:        .eabi_attribute 23, 3
531; CORTEX-A5-NOFPU:        .eabi_attribute 24, 1
532; CORTEX-A5-NOFPU:        .eabi_attribute 25, 1
533; CORTEX-A5-NOFPU:        .eabi_attribute 42, 1
534; CORTEX-A5-NOFPU:        .eabi_attribute 68, 1
535
536; CORTEX-A5-NOFPU-FAST-NOT:   .eabi_attribute 19
537;; Despite there being no FPU, we chose to flush to zero preserving
538;; sign. This matches what the hardware would do for this architecture
539;; revision.
540; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
541; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21
542; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22
543; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1
544
545; CORTEX-A9-SOFT:  .cpu cortex-a9
546; CORTEX-A9-SOFT:  .eabi_attribute 6, 10
547; CORTEX-A9-SOFT:  .eabi_attribute 7, 65
548; CORTEX-A9-SOFT:  .eabi_attribute 8, 1
549; CORTEX-A9-SOFT:  .eabi_attribute 9, 2
550; CORTEX-A9-SOFT:  .fpu neon
551; CORTEX-A9-SOFT-NOT:   .eabi_attribute 19
552;; We default to IEEE 754 compliance
553; CORTEX-A9-SOFT:  .eabi_attribute 20, 1
554; CORTEX-A9-SOFT:  .eabi_attribute 21, 1
555; CORTEX-A9-SOFT-NOT:  .eabi_attribute 22
556; CORTEX-A9-SOFT:  .eabi_attribute 23, 3
557; CORTEX-A9-SOFT:  .eabi_attribute 24, 1
558; CORTEX-A9-SOFT:  .eabi_attribute 25, 1
559; CORTEX-A9-SOFT-NOT:  .eabi_attribute 27
560; CORTEX-A9-SOFT-NOT:  .eabi_attribute 28
561; CORTEX-A9-SOFT:  .eabi_attribute 36, 1
562; CORTEX-A9-SOFT:  .eabi_attribute 38, 1
563; CORTEX-A9-SOFT:  .eabi_attribute 42, 1
564; CORTEX-A9-SOFT-NOT:  .eabi_attribute 44
565; CORTEX-A9-SOFT:  .eabi_attribute 68, 1
566
567; CORTEX-A9-SOFT-FAST-NOT:   .eabi_attribute 19
568;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when
569;; -ffast-math is specified.
570; CORTEX-A9-SOFT-FAST:  .eabi_attribute 20, 2
571; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21
572; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22
573; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1
574
575; CORTEX-A9-HARD:  .cpu cortex-a9
576; CORTEX-A9-HARD:  .eabi_attribute 6, 10
577; CORTEX-A9-HARD:  .eabi_attribute 7, 65
578; CORTEX-A9-HARD:  .eabi_attribute 8, 1
579; CORTEX-A9-HARD:  .eabi_attribute 9, 2
580; CORTEX-A9-HARD:  .fpu neon
581; CORTEX-A9-HARD-NOT:   .eabi_attribute 19
582;; We default to IEEE 754 compliance
583; CORTEX-A9-HARD:  .eabi_attribute 20, 1
584; CORTEX-A9-HARD:  .eabi_attribute 21, 1
585; CORTEX-A9-HARD-NOT:  .eabi_attribute 22
586; CORTEX-A9-HARD:  .eabi_attribute 23, 3
587; CORTEX-A9-HARD:  .eabi_attribute 24, 1
588; CORTEX-A9-HARD:  .eabi_attribute 25, 1
589; CORTEX-A9-HARD-NOT:  .eabi_attribute 27
590; CORTEX-A9-HARD:  .eabi_attribute 28, 1
591; CORTEX-A9-HARD:  .eabi_attribute 36, 1
592; CORTEX-A9-HARD:  .eabi_attribute 38, 1
593; CORTEX-A9-HARD:  .eabi_attribute 42, 1
594; CORTEX-A9-HARD:  .eabi_attribute 68, 1
595
596; CORTEX-A9-HARD-FAST-NOT:   .eabi_attribute 19
597;; The A9 defaults to a VFPv3 FPU, so it flushes preseving sign when
598;; -ffast-math is specified.
599; CORTEX-A9-HARD-FAST:  .eabi_attribute 20, 2
600; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 21
601; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 22
602; CORTEX-A9-HARD-FAST:  .eabi_attribute 23, 1
603
604; CORTEX-A12-DEFAULT:  .cpu cortex-a12
605; CORTEX-A12-DEFAULT:  .eabi_attribute 6, 10
606; CORTEX-A12-DEFAULT:  .eabi_attribute 7, 65
607; CORTEX-A12-DEFAULT:  .eabi_attribute 8, 1
608; CORTEX-A12-DEFAULT:  .eabi_attribute 9, 2
609; CORTEX-A12-DEFAULT:  .fpu neon-vfpv4
610; CORTEX-A12-DEFAULT-NOT:   .eabi_attribute 19
611;; We default to IEEE 754 compliance
612; CORTEX-A12-DEFAULT:  .eabi_attribute 20, 1
613; CORTEX-A12-DEFAULT:  .eabi_attribute 21, 1
614; CORTEX-A12-DEFAULT-NOT:  .eabi_attribute 22
615; CORTEX-A12-DEFAULT:  .eabi_attribute 23, 3
616; CORTEX-A12-DEFAULT:  .eabi_attribute 24, 1
617; CORTEX-A12-DEFAULT:  .eabi_attribute 25, 1
618; CORTEX-A12-DEFAULT:  .eabi_attribute 42, 1
619; CORTEX-A12-DEFAULT:  .eabi_attribute 44, 2
620; CORTEX-A12-DEFAULT:  .eabi_attribute 68, 3
621
622; CORTEX-A12-DEFAULT-FAST-NOT:   .eabi_attribute 19
623;; The A12 defaults to a VFPv3 FPU, so it flushes preseving sign when
624;; -ffast-math is specified.
625; CORTEX-A12-DEFAULT-FAST:  .eabi_attribute 20, 2
626; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 21
627; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 22
628; CORTEX-A12-HARD-FAST:  .eabi_attribute 23, 1
629
630; CORTEX-A12-NOFPU:  .cpu cortex-a12
631; CORTEX-A12-NOFPU:  .eabi_attribute 6, 10
632; CORTEX-A12-NOFPU:  .eabi_attribute 7, 65
633; CORTEX-A12-NOFPU:  .eabi_attribute 8, 1
634; CORTEX-A12-NOFPU:  .eabi_attribute 9, 2
635; CORTEX-A12-NOFPU-NOT:  .fpu
636; CORTEX-A12-NOFPU-NOT:   .eabi_attribute 19
637;; We default to IEEE 754 compliance
638; CORTEX-A12-NOFPU:  .eabi_attribute 20, 1
639; CORTEX-A12-NOFPU:  .eabi_attribute 21, 1
640; CORTEX-A12-NOFPU-NOT:  .eabi_attribute 22
641; CORTEX-A12-NOFPU:  .eabi_attribute 23, 3
642; CORTEX-A12-NOFPU:  .eabi_attribute 24, 1
643; CORTEX-A12-NOFPU:  .eabi_attribute 25, 1
644; CORTEX-A12-NOFPU:  .eabi_attribute 42, 1
645; CORTEX-A12-NOFPU:  .eabi_attribute 44, 2
646; CORTEX-A12-NOFPU:  .eabi_attribute 68, 3
647
648; CORTEX-A12-NOFPU-FAST-NOT:   .eabi_attribute 19
649;; Despite there being no FPU, we chose to flush to zero preserving
650;; sign. This matches what the hardware would do for this architecture
651;; revision.
652; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 20, 2
653; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 21
654; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 22
655; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 23, 1
656
657; CORTEX-A15: .cpu cortex-a15
658; CORTEX-A15: .eabi_attribute 6, 10
659; CORTEX-A15: .eabi_attribute 7, 65
660; CORTEX-A15: .eabi_attribute 8, 1
661; CORTEX-A15: .eabi_attribute 9, 2
662; CORTEX-A15: .fpu neon-vfpv4
663; CORTEX-A15-NOT:   .eabi_attribute 19
664;; We default to IEEE 754 compliance
665; CORTEX-A15: .eabi_attribute 20, 1
666; CORTEX-A15: .eabi_attribute 21, 1
667; CORTEX-A15-NOT: .eabi_attribute 22
668; CORTEX-A15: .eabi_attribute 23, 3
669; CORTEX-A15: .eabi_attribute 24, 1
670; CORTEX-A15: .eabi_attribute 25, 1
671; CORTEX-A15-NOT: .eabi_attribute 27
672; CORTEX-A15-NOT: .eabi_attribute 28
673; CORTEX-A15: .eabi_attribute 36, 1
674; CORTEX-A15: .eabi_attribute 38, 1
675; CORTEX-A15: .eabi_attribute 42, 1
676; CORTEX-A15: .eabi_attribute 44, 2
677; CORTEX-A15: .eabi_attribute 68, 3
678
679; CORTEX-A15-FAST-NOT:   .eabi_attribute 19
680;; The A15 defaults to a VFPv3 FPU, so it flushes preseving sign when
681;; -ffast-math is specified.
682; CORTEX-A15-FAST: .eabi_attribute 20, 2
683; CORTEX-A15-FAST-NOT:  .eabi_attribute 21
684; CORTEX-A15-FAST-NOT:  .eabi_attribute 22
685; CORTEX-A15-FAST:  .eabi_attribute 23, 1
686
687; CORTEX-A17-DEFAULT:  .cpu cortex-a17
688; CORTEX-A17-DEFAULT:  .eabi_attribute 6, 10
689; CORTEX-A17-DEFAULT:  .eabi_attribute 7, 65
690; CORTEX-A17-DEFAULT:  .eabi_attribute 8, 1
691; CORTEX-A17-DEFAULT:  .eabi_attribute 9, 2
692; CORTEX-A17-DEFAULT:  .fpu neon-vfpv4
693; CORTEX-A17-DEFAULT-NOT:   .eabi_attribute 19
694;; We default to IEEE 754 compliance
695; CORTEX-A17-DEFAULT:  .eabi_attribute 20, 1
696; CORTEX-A17-DEFAULT:  .eabi_attribute 21, 1
697; CORTEX-A17-DEFAULT-NOT:  .eabi_attribute 22
698; CORTEX-A17-DEFAULT:  .eabi_attribute 23, 3
699; CORTEX-A17-DEFAULT:  .eabi_attribute 24, 1
700; CORTEX-A17-DEFAULT:  .eabi_attribute 25, 1
701; CORTEX-A17-DEFAULT:  .eabi_attribute 42, 1
702; CORTEX-A17-DEFAULT:  .eabi_attribute 44, 2
703; CORTEX-A17-DEFAULT:  .eabi_attribute 68, 3
704
705; CORTEX-A17-FAST-NOT:   .eabi_attribute 19
706;; The A17 defaults to a VFPv3 FPU, so it flushes preseving sign when
707;; -ffast-math is specified.
708; CORTEX-A17-FAST:  .eabi_attribute 20, 2
709; CORTEX-A17-FAST-NOT:  .eabi_attribute 21
710; CORTEX-A17-FAST-NOT:  .eabi_attribute 22
711; CORTEX-A17-FAST:  .eabi_attribute 23, 1
712
713; CORTEX-A17-NOFPU:  .cpu cortex-a17
714; CORTEX-A17-NOFPU:  .eabi_attribute 6, 10
715; CORTEX-A17-NOFPU:  .eabi_attribute 7, 65
716; CORTEX-A17-NOFPU:  .eabi_attribute 8, 1
717; CORTEX-A17-NOFPU:  .eabi_attribute 9, 2
718; CORTEX-A17-NOFPU-NOT:  .fpu
719; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
720;; We default to IEEE 754 compliance
721; CORTEX-A17-NOFPU:  .eabi_attribute 20, 1
722; CORTEX-A17-NOFPU:  .eabi_attribute 21, 1
723; CORTEX-A17-NOFPU-NOT:  .eabi_attribute 22
724; CORTEX-A17-NOFPU:  .eabi_attribute 23, 3
725; CORTEX-A17-NOFPU:  .eabi_attribute 24, 1
726; CORTEX-A17-NOFPU:  .eabi_attribute 25, 1
727; CORTEX-A17-NOFPU:  .eabi_attribute 42, 1
728; CORTEX-A17-NOFPU:  .eabi_attribute 44, 2
729; CORTEX-A17-NOFPU:  .eabi_attribute 68, 3
730
731; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
732;; Despite there being no FPU, we chose to flush to zero preserving
733;; sign. This matches what the hardware would do for this architecture
734;; revision.
735; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 20, 2
736; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 21
737; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 22
738; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 23, 1
739
740; CORTEX-M0:  .cpu cortex-m0
741; CORTEX-M0:  .eabi_attribute 6, 12
742; CORTEX-M0-NOT:  .eabi_attribute 7
743; CORTEX-M0:  .eabi_attribute 8, 0
744; CORTEX-M0:  .eabi_attribute 9, 1
745; CORTEX-M0-NOT:   .eabi_attribute 19
746;; We default to IEEE 754 compliance
747; CORTEX-M0:  .eabi_attribute 20, 1
748; CORTEX-M0:  .eabi_attribute 21, 1
749; CORTEX-M0-NOT:  .eabi_attribute 22
750; CORTEX-M0:  .eabi_attribute 23, 3
751; CORTEX-M0:  .eabi_attribute 24, 1
752; CORTEX-M0:  .eabi_attribute 25, 1
753; CORTEX-M0-NOT:  .eabi_attribute 27
754; CORTEX-M0-NOT:  .eabi_attribute 28
755; CORTEX-M0-NOT:  .eabi_attribute 36
756; CORTEX-M0:  .eabi_attribute 38, 1
757; CORTEX-M0-NOT:  .eabi_attribute 42
758; CORTEX-M0-NOT:  .eabi_attribute 44
759; CORTEX-M0-NOT:  .eabi_attribute 68
760
761; CORTEX-M0-FAST-NOT:   .eabi_attribute 19
762;; Despite the M0 CPU having no FPU in this scenario, we chose to
763;; flush to positive zero here. There's no hardware support doing
764;; this, but the fast maths software library might and such behaviour
765;; would match hardware support on this architecture revision if it
766;; existed.
767; CORTEX-M0-FAST-NOT:  .eabi_attribute 20
768; CORTEX-M0-FAST-NOT:  .eabi_attribute 21
769; CORTEX-M0-FAST-NOT:  .eabi_attribute 22
770; CORTEX-M0-FAST:  .eabi_attribute 23, 1
771
772; CORTEX-M0PLUS:  .cpu cortex-m0plus
773; CORTEX-M0PLUS:  .eabi_attribute 6, 12
774; CORTEX-M0PLUS-NOT:  .eabi_attribute 7
775; CORTEX-M0PLUS:  .eabi_attribute 8, 0
776; CORTEX-M0PLUS:  .eabi_attribute 9, 1
777; CORTEX-M0PLUS-NOT:   .eabi_attribute 19
778;; We default to IEEE 754 compliance
779; CORTEX-M0PLUS:  .eabi_attribute 20, 1
780; CORTEX-M0PLUS:  .eabi_attribute 21, 1
781; CORTEX-M0PLUS-NOT:  .eabi_attribute 22
782; CORTEX-M0PLUS:  .eabi_attribute 23, 3
783; CORTEX-M0PLUS:  .eabi_attribute 24, 1
784; CORTEX-M0PLUS:  .eabi_attribute 25, 1
785; CORTEX-M0PLUS-NOT:  .eabi_attribute 27
786; CORTEX-M0PLUS-NOT:  .eabi_attribute 28
787; CORTEX-M0PLUS-NOT:  .eabi_attribute 36
788; CORTEX-M0PLUS:  .eabi_attribute 38, 1
789; CORTEX-M0PLUS-NOT:  .eabi_attribute 42
790; CORTEX-M0PLUS-NOT:  .eabi_attribute 44
791; CORTEX-M0PLUS-NOT:  .eabi_attribute 68
792
793; CORTEX-M0PLUS-FAST-NOT:   .eabi_attribute 19
794;; Despite the M0+ CPU having no FPU in this scenario, we chose to
795;; flush to positive zero here. There's no hardware support doing
796;; this, but the fast maths software library might and such behaviour
797;; would match hardware support on this architecture revision if it
798;; existed.
799; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 20
800; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 21
801; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 22
802; CORTEX-M0PLUS-FAST:  .eabi_attribute 23, 1
803
804; CORTEX-M1:  .cpu cortex-m1
805; CORTEX-M1:  .eabi_attribute 6, 12
806; CORTEX-M1-NOT:  .eabi_attribute 7
807; CORTEX-M1:  .eabi_attribute 8, 0
808; CORTEX-M1:  .eabi_attribute 9, 1
809; CORTEX-M1-NOT:   .eabi_attribute 19
810;; We default to IEEE 754 compliance
811; CORTEX-M1:  .eabi_attribute 20, 1
812; CORTEX-M1:  .eabi_attribute 21, 1
813; CORTEX-M1-NOT:  .eabi_attribute 22
814; CORTEX-M1:  .eabi_attribute 23, 3
815; CORTEX-M1:  .eabi_attribute 24, 1
816; CORTEX-M1:  .eabi_attribute 25, 1
817; CORTEX-M1-NOT:  .eabi_attribute 27
818; CORTEX-M1-NOT:  .eabi_attribute 28
819; CORTEX-M1-NOT:  .eabi_attribute 36
820; CORTEX-M1:  .eabi_attribute 38, 1
821; CORTEX-M1-NOT:  .eabi_attribute 42
822; CORTEX-M1-NOT:  .eabi_attribute 44
823; CORTEX-M1-NOT:  .eabi_attribute 68
824
825; CORTEX-M1-FAST-NOT:   .eabi_attribute 19
826;; Despite the M1 CPU having no FPU in this scenario, we chose to
827;; flush to positive zero here. There's no hardware support doing
828;; this, but the fast maths software library might and such behaviour
829;; would match hardware support on this architecture revision if it
830;; existed.
831; CORTEX-M1-FAST-NOT:  .eabi_attribute 20
832; CORTEX-M1-FAST-NOT:  .eabi_attribute 21
833; CORTEX-M1-FAST-NOT:  .eabi_attribute 22
834; CORTEX-M1-FAST:  .eabi_attribute 23, 1
835
836; SC000:  .cpu sc000
837; SC000:  .eabi_attribute 6, 12
838; SC000-NOT:  .eabi_attribute 7
839; SC000:  .eabi_attribute 8, 0
840; SC000:  .eabi_attribute 9, 1
841; SC000-NOT:   .eabi_attribute 19
842;; We default to IEEE 754 compliance
843; SC000:  .eabi_attribute 20, 1
844; SC000:  .eabi_attribute 21, 1
845; SC000-NOT:  .eabi_attribute 22
846; SC000:  .eabi_attribute 23, 3
847; SC000:  .eabi_attribute 24, 1
848; SC000:  .eabi_attribute 25, 1
849; SC000-NOT:  .eabi_attribute 27
850; SC000-NOT:  .eabi_attribute 28
851; SC000-NOT:  .eabi_attribute 36
852; SC000:  .eabi_attribute 38, 1
853; SC000-NOT:  .eabi_attribute 42
854; SC000-NOT:  .eabi_attribute 44
855; SC000-NOT:  .eabi_attribute 68
856
857; SC000-FAST-NOT:   .eabi_attribute 19
858;; Despite the SC000 CPU having no FPU in this scenario, we chose to
859;; flush to positive zero here. There's no hardware support doing
860;; this, but the fast maths software library might and such behaviour
861;; would match hardware support on this architecture revision if it
862;; existed.
863; SC000-FAST-NOT:  .eabi_attribute 20
864; SC000-FAST-NOT:  .eabi_attribute 21
865; SC000-FAST-NOT:  .eabi_attribute 22
866; SC000-FAST:  .eabi_attribute 23, 1
867
868; CORTEX-M3:  .cpu cortex-m3
869; CORTEX-M3:  .eabi_attribute 6, 10
870; CORTEX-M3:  .eabi_attribute 7, 77
871; CORTEX-M3:  .eabi_attribute 8, 0
872; CORTEX-M3:  .eabi_attribute 9, 2
873; CORTEX-M3-NOT:   .eabi_attribute 19
874;; We default to IEEE 754 compliance
875; CORTEX-M3:  .eabi_attribute 20, 1
876; CORTEX-M3:  .eabi_attribute 21, 1
877; CORTEX-M3-NOT:  .eabi_attribute 22
878; CORTEX-M3:  .eabi_attribute 23, 3
879; CORTEX-M3:  .eabi_attribute 24, 1
880; CORTEX-M3:  .eabi_attribute 25, 1
881; CORTEX-M3-NOT:  .eabi_attribute 27
882; CORTEX-M3-NOT:  .eabi_attribute 28
883; CORTEX-M3-NOT:  .eabi_attribute 36
884; CORTEX-M3:  .eabi_attribute 38, 1
885; CORTEX-M3-NOT:  .eabi_attribute 42
886; CORTEX-M3-NOT:  .eabi_attribute 44
887; CORTEX-M3-NOT:  .eabi_attribute 68
888
889; CORTEX-M3-FAST-NOT:   .eabi_attribute 19
890;; Despite there being no FPU, we chose to flush to zero preserving
891;; sign. This matches what the hardware would do for this architecture
892;; revision.
893; CORTEX-M3-FAST:  .eabi_attribute 20, 2
894; CORTEX-M3-FAST-NOT:  .eabi_attribute 21
895; CORTEX-M3-FAST-NOT:  .eabi_attribute 22
896; CORTEX-M3-FAST:  .eabi_attribute 23, 1
897
898; SC300:  .cpu sc300
899; SC300:  .eabi_attribute 6, 10
900; SC300:  .eabi_attribute 7, 77
901; SC300:  .eabi_attribute 8, 0
902; SC300:  .eabi_attribute 9, 2
903; SC300-NOT:   .eabi_attribute 19
904;; We default to IEEE 754 compliance
905; SC300:  .eabi_attribute 20, 1
906; SC300:  .eabi_attribute 21, 1
907; SC300-NOT:  .eabi_attribute 22
908; SC300:  .eabi_attribute 23, 3
909; SC300:  .eabi_attribute 24, 1
910; SC300:  .eabi_attribute 25, 1
911; SC300-NOT:  .eabi_attribute 27
912; SC300-NOT:  .eabi_attribute 28
913; SC300-NOT:  .eabi_attribute 36
914; SC300:  .eabi_attribute 38, 1
915; SC300-NOT:  .eabi_attribute 42
916; SC300-NOT:  .eabi_attribute 44
917; SC300-NOT:  .eabi_attribute 68
918
919; SC300-FAST-NOT:   .eabi_attribute 19
920;; Despite there being no FPU, we chose to flush to zero preserving
921;; sign. This matches what the hardware would do for this architecture
922;; revision.
923; SC300-FAST:  .eabi_attribute 20, 2
924; SC300-FAST-NOT:  .eabi_attribute 21
925; SC300-FAST-NOT:  .eabi_attribute 22
926; SC300-FAST:  .eabi_attribute 23, 1
927
928; CORTEX-M4-SOFT:  .cpu cortex-m4
929; CORTEX-M4-SOFT:  .eabi_attribute 6, 13
930; CORTEX-M4-SOFT:  .eabi_attribute 7, 77
931; CORTEX-M4-SOFT:  .eabi_attribute 8, 0
932; CORTEX-M4-SOFT:  .eabi_attribute 9, 2
933; CORTEX-M4-SOFT:  .fpu fpv4-sp-d16
934; CORTEX-M4-SOFT-NOT:   .eabi_attribute 19
935;; We default to IEEE 754 compliance
936; CORTEX-M4-SOFT:  .eabi_attribute 20, 1
937; CORTEX-M4-SOFT:  .eabi_attribute 21, 1
938; CORTEX-M4-SOFT-NOT:  .eabi_attribute 22
939; CORTEX-M4-SOFT:  .eabi_attribute 23, 3
940; CORTEX-M4-SOFT:  .eabi_attribute 24, 1
941; CORTEX-M4-SOFT:  .eabi_attribute 25, 1
942; CORTEX-M4-SOFT:  .eabi_attribute 27, 1
943; CORTEX-M4-SOFT-NOT:  .eabi_attribute 28
944; CORTEX-M4-SOFT:  .eabi_attribute 36, 1
945; CORTEX-M4-SOFT:  .eabi_attribute 38, 1
946; CORTEX-M4-SOFT-NOT:  .eabi_attribute 42
947; CORTEX-M4-SOFT-NOT:  .eabi_attribute 44
948; CORTEX-M4-SOFT-NOT:  .eabi_attribute 68
949
950; CORTEX-M4-SOFT-FAST-NOT:   .eabi_attribute 19
951;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when
952;; -ffast-math is specified.
953; CORTEX-M4-SOFT-FAST:  .eabi_attribute 20, 2
954; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 21
955; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 22
956; CORTEX-M4-SOFT-FAST:  .eabi_attribute 23, 1
957
958; CORTEX-M4-HARD:  .cpu cortex-m4
959; CORTEX-M4-HARD:  .eabi_attribute 6, 13
960; CORTEX-M4-HARD:  .eabi_attribute 7, 77
961; CORTEX-M4-HARD:  .eabi_attribute 8, 0
962; CORTEX-M4-HARD:  .eabi_attribute 9, 2
963; CORTEX-M4-HARD:  .fpu fpv4-sp-d16
964; CORTEX-M4-HARD-NOT:   .eabi_attribute 19
965;; We default to IEEE 754 compliance
966; CORTEX-M4-HARD:  .eabi_attribute 20, 1
967; CORTEX-M4-HARD:  .eabi_attribute 21, 1
968; CORTEX-M4-HARD-NOT:  .eabi_attribute 22
969; CORTEX-M4-HARD:  .eabi_attribute 23, 3
970; CORTEX-M4-HARD:  .eabi_attribute 24, 1
971; CORTEX-M4-HARD:  .eabi_attribute 25, 1
972; CORTEX-M4-HARD:  .eabi_attribute 27, 1
973; CORTEX-M4-HARD:  .eabi_attribute 28, 1
974; CORTEX-M4-HARD:  .eabi_attribute 36, 1
975; CORTEX-M4-HARD:  .eabi_attribute 38, 1
976; CORTEX-M4-HARD-NOT:  .eabi_attribute 42
977; CORTEX-M4-HARD-NOT:  .eabi_attribute 44
978; CORTEX-M4-HARD-NOT:  .eabi_attribute 68
979
980; CORTEX-M4-HARD-FAST-NOT:   .eabi_attribute 19
981;; The M4 defaults to a VFPv4 FPU, so it flushes preseving sign when
982;; -ffast-math is specified.
983; CORTEX-M4-HARD-FAST:  .eabi_attribute 20, 2
984; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 21
985; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 22
986; CORTEX-M4-HARD-FAST:  .eabi_attribute 23, 1
987
988; CORTEX-M7:  .cpu    cortex-m7
989; CORTEX-M7:  .eabi_attribute 6, 13
990; CORTEX-M7:  .eabi_attribute 7, 77
991; CORTEX-M7:  .eabi_attribute 8, 0
992; CORTEX-M7:  .eabi_attribute 9, 2
993; CORTEX-M7-SOFT-NOT: .fpu
994; CORTEX-M7-SINGLE:  .fpu fpv5-sp-d16
995; CORTEX-M7-DOUBLE:  .fpu fpv5-d16
996; CORTEX-M7:  .eabi_attribute 17, 1
997; CORTEX-M7-NOT:   .eabi_attribute 19
998;; We default to IEEE 754 compliance
999; CORTEX-M7:  .eabi_attribute 20, 1
1000; CORTEX-M7:  .eabi_attribute 21, 1
1001; CORTEX-M7-NOT:  .eabi_attribute 22
1002; CORTEX-M7:  .eabi_attribute 23, 3
1003; CORTEX-M7:  .eabi_attribute 24, 1
1004; CORTEX-M7:  .eabi_attribute 25, 1
1005; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
1006; CORTEX-M7-SINGLE:  .eabi_attribute 27, 1
1007; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
1008; CORTEX-M7:  .eabi_attribute 36, 1
1009; CORTEX-M7:  .eabi_attribute 38, 1
1010; CORTEX-M7-NOT:  .eabi_attribute 44
1011; CORTEX-M7:  .eabi_attribute 14, 0
1012
1013; CORTEX-M7-NOFPU-FAST-NOT:   .eabi_attribute 19
1014;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1015; CORTEX-M7-FAST:  .eabi_attribute 20, 2
1016;; Despite there being no FPU, we chose to flush to zero preserving
1017;; sign. This matches what the hardware would do for this architecture
1018;; revision.
1019; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
1020; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 21
1021; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 22
1022; CORTEX-M7-NOFPU-FAST:  .eabi_attribute 23, 1
1023
1024; CORTEX-R4:  .cpu cortex-r4
1025; CORTEX-R4:  .eabi_attribute 6, 10
1026; CORTEX-R4:  .eabi_attribute 7, 82
1027; CORTEX-R4:  .eabi_attribute 8, 1
1028; CORTEX-R4:  .eabi_attribute 9, 2
1029; CORTEX-R4-NOT:  .fpu vfpv3-d16
1030; CORTEX-R4-NOT:   .eabi_attribute 19
1031;; We default to IEEE 754 compliance
1032; CORTEX-R4:  .eabi_attribute 20, 1
1033; CORTEX-R4:  .eabi_attribute 21, 1
1034; CORTEX-R4-NOT:  .eabi_attribute 22
1035; CORTEX-R4:  .eabi_attribute 23, 3
1036; CORTEX-R4:  .eabi_attribute 24, 1
1037; CORTEX-R4:  .eabi_attribute 25, 1
1038; CORTEX-R4-NOT:  .eabi_attribute 28
1039; CORTEX-R4-NOT:  .eabi_attribute 36
1040; CORTEX-R4:  .eabi_attribute 38, 1
1041; CORTEX-R4-NOT:  .eabi_attribute 42
1042; CORTEX-R4-NOT:  .eabi_attribute 44
1043; CORTEX-R4-NOT:  .eabi_attribute 68
1044
1045; CORTEX-R4F:  .cpu cortex-r4f
1046; CORTEX-R4F:  .eabi_attribute 6, 10
1047; CORTEX-R4F:  .eabi_attribute 7, 82
1048; CORTEX-R4F:  .eabi_attribute 8, 1
1049; CORTEX-R4F:  .eabi_attribute 9, 2
1050; CORTEX-R4F:  .fpu vfpv3-d16
1051; CORTEX-R4F-NOT:   .eabi_attribute 19
1052;; We default to IEEE 754 compliance
1053; CORTEX-R4F:  .eabi_attribute 20, 1
1054; CORTEX-R4F:  .eabi_attribute 21, 1
1055; CORTEX-R4F-NOT:  .eabi_attribute 22
1056; CORTEX-R4F:  .eabi_attribute 23, 3
1057; CORTEX-R4F:  .eabi_attribute 24, 1
1058; CORTEX-R4F:  .eabi_attribute 25, 1
1059; CORTEX-R4F-NOT:  .eabi_attribute 27, 1
1060; CORTEX-R4F-NOT:  .eabi_attribute 28
1061; CORTEX-R4F-NOT:  .eabi_attribute 36
1062; CORTEX-R4F:  .eabi_attribute 38, 1
1063; CORTEX-R4F-NOT:  .eabi_attribute 42
1064; CORTEX-R4F-NOT:  .eabi_attribute 44
1065; CORTEX-R4F-NOT:  .eabi_attribute 68
1066
1067; CORTEX-R5:  .cpu cortex-r5
1068; CORTEX-R5:  .eabi_attribute 6, 10
1069; CORTEX-R5:  .eabi_attribute 7, 82
1070; CORTEX-R5:  .eabi_attribute 8, 1
1071; CORTEX-R5:  .eabi_attribute 9, 2
1072; CORTEX-R5:  .fpu vfpv3-d16
1073; CORTEX-R5-NOT:   .eabi_attribute 19
1074;; We default to IEEE 754 compliance
1075; CORTEX-R5:  .eabi_attribute 20, 1
1076; CORTEX-R5:  .eabi_attribute 21, 1
1077; CORTEX-R5-NOT:  .eabi_attribute 22
1078; CORTEX-R5:  .eabi_attribute 23, 3
1079; CORTEX-R5:  .eabi_attribute 24, 1
1080; CORTEX-R5:  .eabi_attribute 25, 1
1081; CORTEX-R5-NOT:  .eabi_attribute 27, 1
1082; CORTEX-R5-NOT:  .eabi_attribute 28
1083; CORTEX-R5-NOT:  .eabi_attribute 36
1084; CORTEX-R5:  .eabi_attribute 38, 1
1085; CORTEX-R5-NOT:  .eabi_attribute 42
1086; CORTEX-R5:  .eabi_attribute 44, 2
1087; CORTEX-R5-NOT:  .eabi_attribute 68
1088
1089; CORTEX-R5-FAST-NOT:   .eabi_attribute 19
1090;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
1091; CORTEX-R5-FAST:  .eabi_attribute 20, 2
1092; CORTEX-R5-FAST-NOT:  .eabi_attribute 21
1093; CORTEX-R5-FAST-NOT:  .eabi_attribute 22
1094; CORTEX-R5-FAST:  .eabi_attribute 23, 1
1095
1096; CORTEX-R7:  .cpu cortex-r7
1097; CORTEX-R7:  .eabi_attribute 6, 10
1098; CORTEX-R7:  .eabi_attribute 7, 82
1099; CORTEX-R7:  .eabi_attribute 8, 1
1100; CORTEX-R7:  .eabi_attribute 9, 2
1101; CORTEX-R7:  .fpu vfpv3xd
1102; CORTEX-R7-NOT:   .eabi_attribute 19
1103;; We default to IEEE 754 compliance
1104; CORTEX-R7:  .eabi_attribute 20, 1
1105; CORTEX-R7:  .eabi_attribute 21, 1
1106; CORTEX-R7-NOT:  .eabi_attribute 22
1107; CORTEX-R7:  .eabi_attribute 23, 3
1108; CORTEX-R7:  .eabi_attribute 24, 1
1109; CORTEX-R7:  .eabi_attribute 25, 1
1110; CORTEX-R7:  .eabi_attribute 27, 1
1111; CORTEX-R7-NOT:  .eabi_attribute 28
1112; CORTEX-R7-NOT:  .eabi_attribute 36
1113; CORTEX-R7:  .eabi_attribute 38, 1
1114; CORTEX-R7:  .eabi_attribute 42, 1
1115; CORTEX-R7:  .eabi_attribute 44, 2
1116; CORTEX-R7-NOT:  .eabi_attribute 68
1117
1118; CORTEX-R7-FAST-NOT:   .eabi_attribute 19
1119;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
1120; CORTEX-R7-FAST:  .eabi_attribute 20, 2
1121; CORTEX-R7-FAST-NOT:  .eabi_attribute 21
1122; CORTEX-R7-FAST-NOT:  .eabi_attribute 22
1123; CORTEX-R7-FAST:  .eabi_attribute 23, 1
1124
1125; CORTEX-A53:  .cpu cortex-a53
1126; CORTEX-A53:  .eabi_attribute 6, 14
1127; CORTEX-A53:  .eabi_attribute 7, 65
1128; CORTEX-A53:  .eabi_attribute 8, 1
1129; CORTEX-A53:  .eabi_attribute 9, 2
1130; CORTEX-A53:  .fpu crypto-neon-fp-armv8
1131; CORTEX-A53:  .eabi_attribute 12, 3
1132; CORTEX-A53-NOT:   .eabi_attribute 19
1133;; We default to IEEE 754 compliance
1134; CORTEX-A53:  .eabi_attribute 20, 1
1135; CORTEX-A53:  .eabi_attribute 21, 1
1136; CORTEX-A53-NOT:  .eabi_attribute 22
1137; CORTEX-A53:  .eabi_attribute 23, 3
1138; CORTEX-A53:  .eabi_attribute 24, 1
1139; CORTEX-A53:  .eabi_attribute 25, 1
1140; CORTEX-A53-NOT:  .eabi_attribute 27
1141; CORTEX-A53-NOT:  .eabi_attribute 28
1142; CORTEX-A53:  .eabi_attribute 36, 1
1143; CORTEX-A53:  .eabi_attribute 38, 1
1144; CORTEX-A53:  .eabi_attribute 42, 1
1145; CORTEX-A53-NOT:  .eabi_attribute 44
1146; CORTEX-A53:  .eabi_attribute 68, 3
1147
1148; CORTEX-A53-FAST-NOT:   .eabi_attribute 19
1149;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1150; CORTEX-A53-FAST:  .eabi_attribute 20, 2
1151; CORTEX-A53-FAST-NOT:  .eabi_attribute 21
1152; CORTEX-A53-FAST-NOT:  .eabi_attribute 22
1153; CORTEX-A53-FAST:  .eabi_attribute 23, 1
1154
1155; CORTEX-A57:  .cpu cortex-a57
1156; CORTEX-A57:  .eabi_attribute 6, 14
1157; CORTEX-A57:  .eabi_attribute 7, 65
1158; CORTEX-A57:  .eabi_attribute 8, 1
1159; CORTEX-A57:  .eabi_attribute 9, 2
1160; CORTEX-A57:  .fpu crypto-neon-fp-armv8
1161; CORTEX-A57:  .eabi_attribute 12, 3
1162; CORTEX-A57-NOT:   .eabi_attribute 19
1163;; We default to IEEE 754 compliance
1164; CORTEX-A57:  .eabi_attribute 20, 1
1165; CORTEX-A57:  .eabi_attribute 21, 1
1166; CORTEX-A57-NOT:  .eabi_attribute 22
1167; CORTEX-A57:  .eabi_attribute 23, 3
1168; CORTEX-A57:  .eabi_attribute 24, 1
1169; CORTEX-A57:  .eabi_attribute 25, 1
1170; CORTEX-A57-NOT:  .eabi_attribute 27
1171; CORTEX-A57-NOT:  .eabi_attribute 28
1172; CORTEX-A57:  .eabi_attribute 36, 1
1173; CORTEX-A57:  .eabi_attribute 38, 1
1174; CORTEX-A57:  .eabi_attribute 42, 1
1175; CORTEX-A57-NOT:  .eabi_attribute 44
1176; CORTEX-A57:  .eabi_attribute 68, 3
1177
1178; CORTEX-A57-FAST-NOT:   .eabi_attribute 19
1179;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1180; CORTEX-A57-FAST:  .eabi_attribute 20, 2
1181; CORTEX-A57-FAST-NOT:  .eabi_attribute 21
1182; CORTEX-A57-FAST-NOT:  .eabi_attribute 22
1183; CORTEX-A57-FAST:  .eabi_attribute 23, 1
1184
1185; CORTEX-A72:  .cpu cortex-a72
1186; CORTEX-A72:  .eabi_attribute 6, 14
1187; CORTEX-A72:  .eabi_attribute 7, 65
1188; CORTEX-A72:  .eabi_attribute 8, 1
1189; CORTEX-A72:  .eabi_attribute 9, 2
1190; CORTEX-A72:  .fpu crypto-neon-fp-armv8
1191; CORTEX-A72:  .eabi_attribute 12, 3
1192; CORTEX-A72-NOT:   .eabi_attribute 19
1193;; We default to IEEE 754 compliance
1194; CORTEX-A72:  .eabi_attribute 20, 1
1195; CORTEX-A72:  .eabi_attribute 21, 1
1196; CORTEX-A72-NOT:  .eabi_attribute 22
1197; CORTEX-A72:  .eabi_attribute 23, 3
1198; CORTEX-A72:  .eabi_attribute 24, 1
1199; CORTEX-A72:  .eabi_attribute 25, 1
1200; CORTEX-A72-NOT:  .eabi_attribute 27
1201; CORTEX-A72-NOT:  .eabi_attribute 28
1202; CORTEX-A72:  .eabi_attribute 36, 1
1203; CORTEX-A72:  .eabi_attribute 38, 1
1204; CORTEX-A72:  .eabi_attribute 42, 1
1205; CORTEX-A72-NOT:  .eabi_attribute 44
1206; CORTEX-A72:  .eabi_attribute 68, 3
1207
1208; CORTEX-A72-FAST-NOT:   .eabi_attribute 19
1209;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1210; CORTEX-A72-FAST:  .eabi_attribute 20, 2
1211; CORTEX-A72-FAST-NOT:  .eabi_attribute 21
1212; CORTEX-A72-FAST-NOT:  .eabi_attribute 22
1213; CORTEX-A72-FAST:  .eabi_attribute 23, 1
1214
1215; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
1216; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
1217; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
1218; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16
1219; GENERIC-FPU-NEON-FP16: .fpu neon-fp16
1220
1221; GENERIC-ARMV8_1-A:  .eabi_attribute 6, 14
1222; GENERIC-ARMV8_1-A:  .eabi_attribute 7, 65
1223; GENERIC-ARMV8_1-A:  .eabi_attribute 8, 1
1224; GENERIC-ARMV8_1-A:  .eabi_attribute 9, 2
1225; GENERIC-ARMV8_1-A:  .fpu crypto-neon-fp-armv8
1226; GENERIC-ARMV8_1-A:  .eabi_attribute 12, 4
1227; GENERIC-ARMV8_1-A-NOT:   .eabi_attribute 19
1228;; We default to IEEE 754 compliance
1229; GENERIC-ARMV8_1-A:  .eabi_attribute 20, 1
1230; GENERIC-ARMV8_1-A:  .eabi_attribute 21, 1
1231; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 22
1232; GENERIC-ARMV8_1-A:  .eabi_attribute 23, 3
1233; GENERIC-ARMV8_1-A:  .eabi_attribute 24, 1
1234; GENERIC-ARMV8_1-A:  .eabi_attribute 25, 1
1235; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 27
1236; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 28
1237; GENERIC-ARMV8_1-A:  .eabi_attribute 36, 1
1238; GENERIC-ARMV8_1-A:  .eabi_attribute 38, 1
1239; GENERIC-ARMV8_1-A:  .eabi_attribute 42, 1
1240; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 44
1241; GENERIC-ARMV8_1-A:  .eabi_attribute 68, 3
1242
1243; GENERIC-ARMV8_1-A-FAST-NOT:   .eabi_attribute 19
1244;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign.
1245; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 20, 2
1246; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 21
1247; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 22
1248; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 23, 1
1249
1250; RELOC-PIC:  .eabi_attribute 15, 1
1251; RELOC-PIC:  .eabi_attribute 16, 1
1252; RELOC-PIC:  .eabi_attribute 17, 2
1253; RELOC-OTHER:  .eabi_attribute 17, 1
1254
1255; PCS-R9-USE:  .eabi_attribute 14, 0
1256; PCS-R9-RESERVE:  .eabi_attribute 14, 3
1257
1258define i32 @f(i64 %z) {
1259    ret i32 0
1260}
1261