1; This tests that MC/asm header conversion is smooth and that the 2; build attributes are correct 3 4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE 5; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6 6; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST 7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M 9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST 10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M 11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST 12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S 13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=ARM1156T2F-S-FAST 14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M 16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST 17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7 19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 20; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST 21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8 22; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST 23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8 25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8 27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON 28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON 29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO 30; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE 31; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE 32; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP 33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT 34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST 35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,-d32 | FileCheck %s --check-prefix=CORTEX-A5-NONEON 37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-A5-NOFPU 38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2sp -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST 39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT 40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-SOFT-FAST 41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A8-HARD 42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-HARD-FAST 43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT 45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT 46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST 47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD 48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST 49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT 51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT 52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST 53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-A12-NOFPU 54; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2sp -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST 55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15 57; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST 58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT 60; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST 61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-A17-NOFPU 62; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2sp -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST 63 64; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-no-trapping-fp-math | FileCheck %s --check-prefix=NO-TRAPPING-MATH 65; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=ieee | FileCheck %s --check-prefix=DENORMAL-IEEE 66; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=preserve-sign | FileCheck %s --check-prefix=DENORMAL-PRESERVE-SIGN 67; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=positive-zero | FileCheck %s --check-prefix=DENORMAL-POSITIVE-ZERO 68 69; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16 70; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-d32,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16 71; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-fp64,-d32 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD 72; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-fp64,-d32,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16 73; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16 74 75; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 76; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0 77; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST 78; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 79; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus | FileCheck %s --check-prefix=CORTEX-M0PLUS 80; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST 81; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 82; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 | FileCheck %s --check-prefix=CORTEX-M1 83; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST 84; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 85; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000 86; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST 87; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 88; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3 89; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST 90; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 91; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300 92; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST 93; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 94; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT 95; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST 96; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD 97; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST 98; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 99; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT 100; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2sp -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST 101; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-fp64 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE 102; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-fp64 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST 103; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE 104; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 105; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=CORTEX-M23 106; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=CORTEX-M33 107; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M33-FAST 108; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 109 110; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m35p | FileCheck %s --check-prefix=CORTEX-M35P 111; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m35p -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 112 113; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4 114; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F 115; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5 116; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST 117; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 118; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7 119; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST 120; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 121; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8 122; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST 123; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 124; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=CORTEX-A32 125; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A32-FAST 126; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 127; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35 128; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST 129; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 130; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53 131; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST 132; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 133; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57 134; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST 135; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 136; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72 137; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST 138; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 139; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a73 | FileCheck %s --check-prefix=CORTEX-A73 140; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A 141; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=EXYNOS-M3 142; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-FAST 143; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 144; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 | FileCheck %s --check-prefix=EXYNOS-M4 145; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-FAST 146; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 147; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5 | FileCheck %s --check-prefix=EXYNOS-M5 148; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-FAST 149; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 150; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST 151; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 152; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=CORTEX-A7-CHECK 153; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-CHECK-FAST 154; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2sp,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU 155; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2sp,-vfp3,-vfp4,-neon,-fp16 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST 156; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4 157; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING 158; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST 159; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,-d32,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4 160; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC 161; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER 162; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER 163; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER 164; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE 165; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE 166; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi | FileCheck %s --check-prefix=RELOC-ROPI 167; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=rwpi | FileCheck %s --check-prefix=RELOC-RWPI 168; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi-rwpi | FileCheck %s --check-prefix=RELOC-ROPI-RWPI 169 170; ARMv8.1a (AArch32) 171; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN 172; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 173; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN 174; ARMv8a (AArch32) 175; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 176; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 177; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 178; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 179; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 180; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 181; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 182; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 183; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 184; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 185; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m4 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 186; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m4 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 187; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 188; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 189 190; ARMv7a 191; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 192; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 193; ARMv7ve 194; RUN: llc < %s -mtriple=armv7ve-none-linux-gnueabi | FileCheck %s --check-prefix=V7VE 195; ARMv7r 196; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 197; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 198; ARMv7em 199; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 200; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 201; ARMv7m 202; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 203; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 204; ARMv6 205; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 206; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 207; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN 208; ARMv6k 209; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=mpcore 2> %t | FileCheck %s --check-prefix=NO-STRICT-ALIGN 210; RUN: FileCheck %s < %t --allow-empty --check-prefix=CPU-SUPPORTED 211; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=mpcore -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 212; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=mpcore | FileCheck %s --check-prefix=NO-STRICT-ALIGN 213; ARMv6m 214; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 215; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN 216; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 217; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 218; ARMv5 219; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN 220; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 221 222; ARMv8-R 223; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-vfp2sp,-fp16 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NOFPU 224; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-neon,-fp64,-d32 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-SP 225; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NEON 226 227; ARMv8-M 228; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=STRICT-ALIGN 229; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=NO-STRICT-ALIGN 230; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 231; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p | FileCheck %s --check-prefix=NO-STRICT-ALIGN 232; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN 233; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi | FileCheck %s --check-prefix=ARMv81M-MAIN 234; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve | FileCheck %s --check-prefix=ARMv81M-MAIN-MVEINT 235; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp | FileCheck %s --check-prefix=ARMv81M-MAIN-MVEFP 236; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+pacbti | FileCheck %s --check-prefix=ARMv81M-MAIN-PACBTI 237; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-m55 | FileCheck %s --check-prefix=CORTEX-M55 238; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-m85 | FileCheck %s --check-prefix=CORTEX-M85 239; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-m85+nopacbti | FileCheck %s --check-prefix=CHECK-NO-PACBTI 240 241; CPU-SUPPORTED-NOT: is not a recognized processor for this target 242 243; XSCALE: .eabi_attribute 6, 5 244; XSCALE: .eabi_attribute 8, 1 245; XSCALE: .eabi_attribute 9, 1 246 247; DYN-ROUNDING: .eabi_attribute 19, 1 248 249; V6: .eabi_attribute 6, 6 250; V6: .eabi_attribute 8, 1 251;; We assume round-to-nearest by default (matches GCC) 252; V6-NOT: .eabi_attribute 27 253; V6-NOT: .eabi_attribute 36 254; V6-NOT: .eabi_attribute 42 255; V6-NOT: .eabi_attribute 44 256; V6-NOT: .eabi_attribute 68 257; V6-NOT: .eabi_attribute 19 258;; The default choice made by llc is for a V6 CPU without an FPU. 259;; This is not an interesting detail, but for such CPUs, the default intention is to use 260;; software floating-point support. The choice is not important for targets without 261;; FPU support! 262; V6: .eabi_attribute 20, 1 263; V6: .eabi_attribute 21, 1 264; V6-NOT: .eabi_attribute 22 265; V6: .eabi_attribute 23, 3 266; V6: .eabi_attribute 24, 1 267; V6: .eabi_attribute 25, 1 268; V6-NOT: .eabi_attribute 28 269; V6: .eabi_attribute 38, 1 270 271; V6-FAST-NOT: .eabi_attribute 19 272;; Despite the V6 CPU having no FPU by default, we chose to flush to 273;; positive zero here. There's no hardware support doing this, but the 274;; fast maths software library might. 275; V6-FAST-NOT: .eabi_attribute 20 276; V6-FAST-NOT: .eabi_attribute 21 277; V6-FAST-NOT: .eabi_attribute 22 278; V6-FAST: .eabi_attribute 23, 1 279 280;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for 281;; V6-M, however we don't model the OS extension so this is fine. 282; V6M: .eabi_attribute 6, 12 283; V6M: .eabi_attribute 7, 77 284; V6M: .eabi_attribute 8, 0 285; V6M: .eabi_attribute 9, 1 286; V6M-NOT: .eabi_attribute 27 287; V6M-NOT: .eabi_attribute 36 288; V6M-NOT: .eabi_attribute 42 289; V6M-NOT: .eabi_attribute 44 290; V6M-NOT: .eabi_attribute 68 291; V6M-NOT: .eabi_attribute 19 292;; The default choice made by llc is for a V6M CPU without an FPU. 293;; This is not an interesting detail, but for such CPUs, the default intention is to use 294;; software floating-point support. The choice is not important for targets without 295;; FPU support! 296; V6M: .eabi_attribute 20, 1 297; V6M: .eabi_attribute 21, 1 298; V6M-NOT: .eabi_attribute 22 299; V6M: .eabi_attribute 23, 3 300; V6M: .eabi_attribute 24, 1 301; V6M: .eabi_attribute 25, 1 302; V6M-NOT: .eabi_attribute 28 303; V6M: .eabi_attribute 38, 1 304 305; V6M-FAST-NOT: .eabi_attribute 19 306;; Despite the V6M CPU having no FPU by default, we chose to flush to 307;; positive zero here. There's no hardware support doing this, but the 308;; fast maths software library might. 309; V6M-FAST-NOT: .eabi_attribute 20 310; V6M-FAST-NOT: .eabi_attribute 21 311; V6M-FAST-NOT: .eabi_attribute 22 312; V6M-FAST: .eabi_attribute 23, 1 313 314; ARM1156T2F-S: .cpu arm1156t2f-s 315; ARM1156T2F-S: .eabi_attribute 6, 8 316; ARM1156T2F-S: .eabi_attribute 8, 1 317; ARM1156T2F-S: .eabi_attribute 9, 2 318; ARM1156T2F-S: .fpu vfpv2 319; ARM1156T2F-S-NOT: .eabi_attribute 27 320; ARM1156T2F-S-NOT: .eabi_attribute 36 321; ARM1156T2F-S-NOT: .eabi_attribute 42 322; ARM1156T2F-S-NOT: .eabi_attribute 44 323; ARM1156T2F-S-NOT: .eabi_attribute 68 324; ARM1156T2F-S-NOT: .eabi_attribute 19 325;; We default to IEEE 754 compliance 326; ARM1156T2F-S: .eabi_attribute 20, 1 327; ARM1156T2F-S: .eabi_attribute 21, 1 328; ARM1156T2F-S-NOT: .eabi_attribute 22 329; ARM1156T2F-S: .eabi_attribute 23, 3 330; ARM1156T2F-S: .eabi_attribute 24, 1 331; ARM1156T2F-S: .eabi_attribute 25, 1 332; ARM1156T2F-S-NOT: .eabi_attribute 28 333; ARM1156T2F-S: .eabi_attribute 38, 1 334 335; ARM1156T2F-S-FAST-NOT: .eabi_attribute 19 336;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally 337;; valid for this core, it's an implementation defined question as to which of 0 and 2 you 338;; select. LLVM historically picks 0. 339; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20 340; ARM1156T2F-S-FAST-NOT: .eabi_attribute 21 341; ARM1156T2F-S-FAST-NOT: .eabi_attribute 22 342; ARM1156T2F-S-FAST: .eabi_attribute 23, 1 343 344; V7M: .eabi_attribute 6, 10 345; V7M: .eabi_attribute 7, 77 346; V7M: .eabi_attribute 8, 0 347; V7M: .eabi_attribute 9, 2 348; V7M-NOT: .eabi_attribute 27 349; V7M-NOT: .eabi_attribute 36 350; V7M-NOT: .eabi_attribute 42 351; V7M-NOT: .eabi_attribute 44 352; V7M-NOT: .eabi_attribute 68 353; V7M-NOT: .eabi_attribute 19 354;; The default choice made by llc is for a V7M CPU without an FPU. 355;; This is not an interesting detail, but for such CPUs, the default intention is to use 356;; software floating-point support. The choice is not important for targets without 357;; FPU support! 358; V7M: .eabi_attribute 20, 1 359; V7M: .eabi_attribute 21, 1 360; V7M-NOT: .eabi_attribute 22 361; V7M: .eabi_attribute 23, 3 362; V7M: .eabi_attribute 24, 1 363; V7M: .eabi_attribute 25, 1 364; V7M-NOT: .eabi_attribute 28 365; V7M: .eabi_attribute 38, 1 366 367; V7M-FAST-NOT: .eabi_attribute 19 368;; Despite the V7M CPU having no FPU by default, we chose to flush 369;; preserving sign. This matches what the hardware would do in the 370;; architecture revision were to exist on the current target. 371; V7M-FAST: .eabi_attribute 20, 2 372; V7M-FAST-NOT: .eabi_attribute 21 373; V7M-FAST-NOT: .eabi_attribute 22 374; V7M-FAST: .eabi_attribute 23, 1 375 376; V7: .syntax unified 377; V7: .eabi_attribute 6, 10 378; V7-NOT: .eabi_attribute 27 379; V7-NOT: .eabi_attribute 36 380; V7-NOT: .eabi_attribute 42 381; V7-NOT: .eabi_attribute 44 382; V7-NOT: .eabi_attribute 68 383; V7-NOT: .eabi_attribute 19 384;; In safe-maths mode we default to an IEEE 754 compliant choice. 385; V7: .eabi_attribute 20, 1 386; V7: .eabi_attribute 21, 1 387; V7-NOT: .eabi_attribute 22 388; V7: .eabi_attribute 23, 3 389; V7: .eabi_attribute 24, 1 390; V7: .eabi_attribute 25, 1 391; V7-NOT: .eabi_attribute 28 392; V7: .eabi_attribute 38, 1 393 394; V7-FAST-NOT: .eabi_attribute 19 395;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes 396;; denormals to zero preserving the sign. 397; V7-FAST: .eabi_attribute 20, 2 398; V7-FAST-NOT: .eabi_attribute 21 399; V7-FAST-NOT: .eabi_attribute 22 400; V7-FAST: .eabi_attribute 23, 1 401 402; V7VE: .syntax unified 403; V7VE: .eabi_attribute 6, 10 @ Tag_CPU_arch 404; V7VE: .eabi_attribute 7, 65 @ Tag_CPU_arch_profile 405; V7VE: .eabi_attribute 8, 1 @ Tag_ARM_ISA_use 406; V7VE: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use 407; V7VE: .eabi_attribute 42, 1 @ Tag_MPextension_use 408; V7VE: .eabi_attribute 44, 2 @ Tag_DIV_use 409; V7VE: .eabi_attribute 68, 3 @ Tag_Virtualization_use 410; V7VE: .eabi_attribute 17, 1 @ Tag_ABI_PCS_GOT_use 411; V7VE: .eabi_attribute 20, 1 @ Tag_ABI_FP_denormal 412; V7VE: .eabi_attribute 21, 1 @ Tag_ABI_FP_exceptions 413; V7VE: .eabi_attribute 23, 3 @ Tag_ABI_FP_number_model 414; V7VE: .eabi_attribute 24, 1 @ Tag_ABI_align_needed 415; V7VE: .eabi_attribute 25, 1 @ Tag_ABI_align_preserved 416; V7VE: .eabi_attribute 38, 1 @ Tag_ABI_FP_16bit_format 417 418; V8: .syntax unified 419; V8: .eabi_attribute 67, "2.09" 420; V8: .eabi_attribute 6, 14 421; V8-NOT: .eabi_attribute 44 422; V8-NOT: .eabi_attribute 19 423; V8: .eabi_attribute 20, 1 424; V8: .eabi_attribute 21, 1 425; V8-NOT: .eabi_attribute 22 426; V8: .eabi_attribute 23, 3 427 428; V8-FAST-NOT: .eabi_attribute 19 429;; The default does have an FPU, and for V8-A, it flushes preserving sign. 430; V8-FAST: .eabi_attribute 20, 2 431; V8-FAST-NOT: .eabi_attribute 21 432; V8-FAST-NOT: .eabi_attribute 22 433; V8-FAST: .eabi_attribute 23, 1 434 435; Vt8: .syntax unified 436; Vt8: .eabi_attribute 6, 14 437; Vt8-NOT: .eabi_attribute 19 438; Vt8: .eabi_attribute 20, 1 439; Vt8: .eabi_attribute 21, 1 440; Vt8-NOT: .eabi_attribute 22 441; Vt8: .eabi_attribute 23, 3 442 443; V8-FPARMv8: .syntax unified 444; V8-FPARMv8: .eabi_attribute 6, 14 445; V8-FPARMv8: .fpu fp-armv8 446 447; V8-NEON: .syntax unified 448; V8-NEON: .eabi_attribute 6, 14 449; V8-NEON: .fpu neon 450; V8-NEON: .eabi_attribute 12, 3 451 452; V8-FPARMv8-NEON: .syntax unified 453; V8-FPARMv8-NEON: .eabi_attribute 6, 14 454; V8-FPARMv8-NEON: .fpu neon-fp-armv8 455; V8-FPARMv8-NEON: .eabi_attribute 12, 3 456 457; V8-FPARMv8-NEON-CRYPTO: .syntax unified 458; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14 459; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8 460; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3 461 462; V8MBASELINE: .syntax unified 463; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline 464; V8MBASELINE: .eabi_attribute 6, 16 465; '7' is Tag_CPU_arch_profile, '77' is 'M' 466; V8MBASELINE: .eabi_attribute 7, 77 467; '8' is Tag_ARM_ISA_use 468; V8MBASELINE: .eabi_attribute 8, 0 469; '9' is Tag_Thumb_ISA_use 470; V8MBASELINE: .eabi_attribute 9, 3 471 472; V8MMAINLINE: .syntax unified 473; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline 474; V8MMAINLINE: .eabi_attribute 6, 17 475; V8MMAINLINE: .eabi_attribute 7, 77 476; V8MMAINLINE: .eabi_attribute 8, 0 477; V8MMAINLINE: .eabi_attribute 9, 3 478; V8MMAINLINE_DSP-NOT: .eabi_attribute 46 479 480; V8MMAINLINE_DSP: .syntax unified 481; V8MBASELINE_DSP: .eabi_attribute 6, 17 482; V8MBASELINE_DSP: .eabi_attribute 7, 77 483; V8MMAINLINE_DSP: .eabi_attribute 8, 0 484; V8MMAINLINE_DSP: .eabi_attribute 9, 3 485; V8MMAINLINE_DSP: .eabi_attribute 46, 1 486 487; Tag_CPU_unaligned_access 488; NO-STRICT-ALIGN: .eabi_attribute 34, 1 489; STRICT-ALIGN: .eabi_attribute 34, 0 490 491; Tag_CPU_arch 'ARMv7' 492; CORTEX-A7-CHECK: .eabi_attribute 6, 10 493; CORTEX-A7-NOFPU: .eabi_attribute 6, 10 494 495; CORTEX-A7-FPUV4: .eabi_attribute 6, 10 496 497; Tag_CPU_arch_profile 'A' 498; CORTEX-A7-CHECK: .eabi_attribute 7, 65 499; CORTEX-A7-NOFPU: .eabi_attribute 7, 65 500; CORTEX-A7-FPUV4: .eabi_attribute 7, 65 501 502; Tag_ARM_ISA_use 503; CORTEX-A7-CHECK: .eabi_attribute 8, 1 504; CORTEX-A7-NOFPU: .eabi_attribute 8, 1 505; CORTEX-A7-FPUV4: .eabi_attribute 8, 1 506 507; Tag_THUMB_ISA_use 508; CORTEX-A7-CHECK: .eabi_attribute 9, 2 509; CORTEX-A7-NOFPU: .eabi_attribute 9, 2 510; CORTEX-A7-FPUV4: .eabi_attribute 9, 2 511 512; CORTEX-A7-CHECK: .fpu neon-vfpv4 513; CORTEX-A7-NOFPU-NOT: .fpu 514; CORTEX-A7-FPUV4: .fpu vfpv4 515 516; CORTEX-A7-CHECK-NOT: .eabi_attribute 19 517 518; Tag_FP_HP_extension 519; CORTEX-A7-CHECK: .eabi_attribute 36, 1 520; CORTEX-A7-NOFPU-NOT: .eabi_attribute 36 521; CORTEX-A7-FPUV4: .eabi_attribute 36, 1 522 523; Tag_MPextension_use 524; CORTEX-A7-CHECK: .eabi_attribute 42, 1 525; CORTEX-A7-NOFPU: .eabi_attribute 42, 1 526; CORTEX-A7-FPUV4: .eabi_attribute 42, 1 527 528; Tag_DIV_use 529; CORTEX-A7-CHECK: .eabi_attribute 44, 2 530; CORTEX-A7-NOFPU: .eabi_attribute 44, 2 531; CORTEX-A7-FPUV4: .eabi_attribute 44, 2 532 533; Tag_DSP_extension 534; CORTEX-A7-CHECK-NOT: .eabi_attribute 46 535 536; Tag_Virtualization_use 537; CORTEX-A7-CHECK: .eabi_attribute 68, 3 538; CORTEX-A7-NOFPU: .eabi_attribute 68, 3 539; CORTEX-A7-FPUV4: .eabi_attribute 68, 3 540 541; Tag_ABI_FP_denormal 542;; We default to IEEE 754 compliance 543; CORTEX-A7-CHECK: .eabi_attribute 20, 1 544;; The A7 has VFPv3 support by default, so flush preserving sign. 545; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2 546; CORTEX-A7-NOFPU: .eabi_attribute 20, 1 547;; Despite there being no FPU, we chose to flush to zero preserving 548;; sign. This matches what the hardware would do for this architecture 549;; revision. 550; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2 551; CORTEX-A7-FPUV4: .eabi_attribute 20, 1 552;; The VFPv4 FPU flushes preserving sign. 553; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2 554 555; Tag_ABI_FP_exceptions 556; CORTEX-A7-CHECK: .eabi_attribute 21, 1 557; CORTEX-A7-NOFPU: .eabi_attribute 21, 1 558; CORTEX-A7-FPUV4: .eabi_attribute 21, 1 559 560; Tag_ABI_FP_user_exceptions 561; CORTEX-A7-CHECK-NOT: .eabi_attribute 22 562; CORTEX-A7-NOFPU-NOT: .eabi_attribute 22 563; CORTEX-A7-FPUV4-NOT: .eabi_attribute 22 564 565; Tag_ABI_FP_number_model 566; CORTEX-A7-CHECK: .eabi_attribute 23, 3 567; CORTEX-A7-NOFPU: .eabi_attribute 23, 3 568; CORTEX-A7-FPUV4: .eabi_attribute 23, 3 569 570; Tag_ABI_align_needed 571; CORTEX-A7-CHECK: .eabi_attribute 24, 1 572; CORTEX-A7-NOFPU: .eabi_attribute 24, 1 573; CORTEX-A7-FPUV4: .eabi_attribute 24, 1 574 575; Tag_ABI_align_preserved 576; CORTEX-A7-CHECK: .eabi_attribute 25, 1 577; CORTEX-A7-NOFPU: .eabi_attribute 25, 1 578; CORTEX-A7-FPUV4: .eabi_attribute 25, 1 579 580; Tag_FP_16bit_format 581; CORTEX-A7-CHECK: .eabi_attribute 38, 1 582; CORTEX-A7-NOFPU: .eabi_attribute 38, 1 583; CORTEX-A7-FPUV4: .eabi_attribute 38, 1 584 585; CORTEX-A5-DEFAULT: .cpu cortex-a5 586; CORTEX-A5-DEFAULT: .eabi_attribute 6, 10 587; CORTEX-A5-DEFAULT: .eabi_attribute 7, 65 588; CORTEX-A5-DEFAULT: .eabi_attribute 8, 1 589; CORTEX-A5-DEFAULT: .eabi_attribute 9, 2 590; CORTEX-A5-DEFAULT: .fpu neon-vfpv4 591; CORTEX-A5-DEFAULT: .eabi_attribute 42, 1 592; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 44 593; CORTEX-A5-DEFAULT: .eabi_attribute 68, 1 594; CORTEX-A5-NOT: .eabi_attribute 19 595;; We default to IEEE 754 compliance 596; CORTEX-A5-DEFAULT: .eabi_attribute 20, 1 597; CORTEX-A5-DEFAULT: .eabi_attribute 21, 1 598; CORTEX-A5-DEFAULT-NOT: .eabi_attribute 22 599; CORTEX-A5-DEFAULT: .eabi_attribute 23, 3 600; CORTEX-A5-DEFAULT: .eabi_attribute 24, 1 601; CORTEX-A5-DEFAULT: .eabi_attribute 25, 1 602 603; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 19 604;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math 605;; is given. 606; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 20, 2 607; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21 608; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22 609; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1 610 611; CORTEX-A5-NONEON: .cpu cortex-a5 612; CORTEX-A5-NONEON: .eabi_attribute 6, 10 613; CORTEX-A5-NONEON: .eabi_attribute 7, 65 614; CORTEX-A5-NONEON: .eabi_attribute 8, 1 615; CORTEX-A5-NONEON: .eabi_attribute 9, 2 616; CORTEX-A5-NONEON: .fpu vfpv4-d16 617; CORTEX-A5-NONEON: .eabi_attribute 42, 1 618; CORTEX-A5-NONEON: .eabi_attribute 68, 1 619;; We default to IEEE 754 compliance 620; CORTEX-A5-NONEON: .eabi_attribute 20, 1 621; CORTEX-A5-NONEON: .eabi_attribute 21, 1 622; CORTEX-A5-NONEON-NOT: .eabi_attribute 22 623; CORTEX-A5-NONEON: .eabi_attribute 23, 3 624; CORTEX-A5-NONEON: .eabi_attribute 24, 1 625; CORTEX-A5-NONEON: .eabi_attribute 25, 1 626 627; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 19 628;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math 629;; is given. 630; CORTEX-A5-NONEON-FAST: .eabi_attribute 20, 2 631; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21 632; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22 633; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1 634 635; CORTEX-A5-NOFPU: .cpu cortex-a5 636; CORTEX-A5-NOFPU: .eabi_attribute 6, 10 637; CORTEX-A5-NOFPU: .eabi_attribute 7, 65 638; CORTEX-A5-NOFPU: .eabi_attribute 8, 1 639; CORTEX-A5-NOFPU: .eabi_attribute 9, 2 640; CORTEX-A5-NOFPU-NOT: .fpu 641; CORTEX-A5-NOFPU: .eabi_attribute 42, 1 642; CORTEX-A5-NOFPU: .eabi_attribute 68, 1 643; CORTEX-A5-NOFPU-NOT: .eabi_attribute 19 644;; We default to IEEE 754 compliance 645; CORTEX-A5-NOFPU: .eabi_attribute 20, 1 646; CORTEX-A5-NOFPU: .eabi_attribute 21, 1 647; CORTEX-A5-NOFPU-NOT: .eabi_attribute 22 648; CORTEX-A5-NOFPU: .eabi_attribute 23, 3 649; CORTEX-A5-NOFPU: .eabi_attribute 24, 1 650; CORTEX-A5-NOFPU: .eabi_attribute 25, 1 651 652; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 19 653;; Despite there being no FPU, we chose to flush to zero preserving 654;; sign. This matches what the hardware would do for this architecture 655;; revision. 656; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2 657; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21 658; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22 659; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1 660 661; CORTEX-A8-SOFT: .cpu cortex-a8 662; CORTEX-A8-SOFT: .eabi_attribute 6, 10 663; CORTEX-A8-SOFT: .eabi_attribute 7, 65 664; CORTEX-A8-SOFT: .eabi_attribute 8, 1 665; CORTEX-A8-SOFT: .eabi_attribute 9, 2 666; CORTEX-A8-SOFT: .fpu neon 667; CORTEX-A8-SOFT-NOT: .eabi_attribute 27 668; CORTEX-A8-SOFT-NOT: .eabi_attribute 36, 1 669; CORTEX-A8-SOFT-NOT: .eabi_attribute 42, 1 670; CORTEX-A8-SOFT-NOT: .eabi_attribute 44 671; CORTEX-A8-SOFT: .eabi_attribute 68, 1 672; CORTEX-A8-SOFT-NOT: .eabi_attribute 19 673;; We default to IEEE 754 compliance 674; CORTEX-A8-SOFT: .eabi_attribute 20, 1 675; CORTEX-A8-SOFT: .eabi_attribute 21, 1 676; CORTEX-A8-SOFT-NOT: .eabi_attribute 22 677; CORTEX-A8-SOFT: .eabi_attribute 23, 3 678; CORTEX-A8-SOFT: .eabi_attribute 24, 1 679; CORTEX-A8-SOFT: .eabi_attribute 25, 1 680; CORTEX-A8-SOFT-NOT: .eabi_attribute 28 681; CORTEX-A8-SOFT: .eabi_attribute 38, 1 682 683; CORTEX-A9-SOFT: .cpu cortex-a9 684; CORTEX-A9-SOFT: .eabi_attribute 6, 10 685; CORTEX-A9-SOFT: .eabi_attribute 7, 65 686; CORTEX-A9-SOFT: .eabi_attribute 8, 1 687; CORTEX-A9-SOFT: .eabi_attribute 9, 2 688; CORTEX-A9-SOFT: .fpu neon 689; CORTEX-A9-SOFT-NOT: .eabi_attribute 27 690; CORTEX-A9-SOFT: .eabi_attribute 36, 1 691; CORTEX-A9-SOFT: .eabi_attribute 42, 1 692; CORTEX-A9-SOFT-NOT: .eabi_attribute 44 693; CORTEX-A9-SOFT: .eabi_attribute 68, 1 694; CORTEX-A9-SOFT-NOT: .eabi_attribute 19 695;; We default to IEEE 754 compliance 696; CORTEX-A9-SOFT: .eabi_attribute 20, 1 697; CORTEX-A9-SOFT: .eabi_attribute 21, 1 698; CORTEX-A9-SOFT-NOT: .eabi_attribute 22 699; CORTEX-A9-SOFT: .eabi_attribute 23, 3 700; CORTEX-A9-SOFT: .eabi_attribute 24, 1 701; CORTEX-A9-SOFT: .eabi_attribute 25, 1 702; CORTEX-A9-SOFT-NOT: .eabi_attribute 28 703; CORTEX-A9-SOFT: .eabi_attribute 38, 1 704 705; CORTEX-A8-SOFT-FAST-NOT: .eabi_attribute 19 706; CORTEX-A9-SOFT-FAST-NOT: .eabi_attribute 19 707;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when 708;; -ffast-math is specified. 709; CORTEX-A8-SOFT-FAST: .eabi_attribute 20, 2 710; CORTEX-A9-SOFT-FAST: .eabi_attribute 20, 2 711; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21 712; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22 713; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1 714 715; CORTEX-A8-HARD: .cpu cortex-a8 716; CORTEX-A8-HARD: .eabi_attribute 6, 10 717; CORTEX-A8-HARD: .eabi_attribute 7, 65 718; CORTEX-A8-HARD: .eabi_attribute 8, 1 719; CORTEX-A8-HARD: .eabi_attribute 9, 2 720; CORTEX-A8-HARD: .fpu neon 721; CORTEX-A8-HARD-NOT: .eabi_attribute 27 722; CORTEX-A8-HARD-NOT: .eabi_attribute 36, 1 723; CORTEX-A8-HARD-NOT: .eabi_attribute 42, 1 724; CORTEX-A8-HARD: .eabi_attribute 68, 1 725; CORTEX-A8-HARD-NOT: .eabi_attribute 19 726;; We default to IEEE 754 compliance 727; CORTEX-A8-HARD: .eabi_attribute 20, 1 728; CORTEX-A8-HARD: .eabi_attribute 21, 1 729; CORTEX-A8-HARD-NOT: .eabi_attribute 22 730; CORTEX-A8-HARD: .eabi_attribute 23, 3 731; CORTEX-A8-HARD: .eabi_attribute 24, 1 732; CORTEX-A8-HARD: .eabi_attribute 25, 1 733; CORTEX-A8-HARD: .eabi_attribute 28, 1 734; CORTEX-A8-HARD: .eabi_attribute 38, 1 735 736 737 738; CORTEX-A9-HARD: .cpu cortex-a9 739; CORTEX-A9-HARD: .eabi_attribute 6, 10 740; CORTEX-A9-HARD: .eabi_attribute 7, 65 741; CORTEX-A9-HARD: .eabi_attribute 8, 1 742; CORTEX-A9-HARD: .eabi_attribute 9, 2 743; CORTEX-A9-HARD: .fpu neon 744; CORTEX-A9-HARD-NOT: .eabi_attribute 27 745; CORTEX-A9-HARD: .eabi_attribute 36, 1 746; CORTEX-A9-HARD: .eabi_attribute 42, 1 747; CORTEX-A9-HARD: .eabi_attribute 68, 1 748; CORTEX-A9-HARD-NOT: .eabi_attribute 19 749;; We default to IEEE 754 compliance 750; CORTEX-A9-HARD: .eabi_attribute 20, 1 751; CORTEX-A9-HARD: .eabi_attribute 21, 1 752; CORTEX-A9-HARD-NOT: .eabi_attribute 22 753; CORTEX-A9-HARD: .eabi_attribute 23, 3 754; CORTEX-A9-HARD: .eabi_attribute 24, 1 755; CORTEX-A9-HARD: .eabi_attribute 25, 1 756; CORTEX-A9-HARD: .eabi_attribute 28, 1 757; CORTEX-A9-HARD: .eabi_attribute 38, 1 758 759; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 19 760;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when 761;; -ffast-math is specified. 762; CORTEX-A8-HARD-FAST: .eabi_attribute 20, 2 763; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 21 764; CORTEX-A8-HARD-FAST-NOT: .eabi_attribute 22 765; CORTEX-A8-HARD-FAST: .eabi_attribute 23, 1 766 767; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 19 768;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when 769;; -ffast-math is specified. 770; CORTEX-A9-HARD-FAST: .eabi_attribute 20, 2 771; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 21 772; CORTEX-A9-HARD-FAST-NOT: .eabi_attribute 22 773; CORTEX-A9-HARD-FAST: .eabi_attribute 23, 1 774 775; CORTEX-A12-DEFAULT: .cpu cortex-a12 776; CORTEX-A12-DEFAULT: .eabi_attribute 6, 10 777; CORTEX-A12-DEFAULT: .eabi_attribute 7, 65 778; CORTEX-A12-DEFAULT: .eabi_attribute 8, 1 779; CORTEX-A12-DEFAULT: .eabi_attribute 9, 2 780; CORTEX-A12-DEFAULT: .fpu neon-vfpv4 781; CORTEX-A12-DEFAULT: .eabi_attribute 42, 1 782; CORTEX-A12-DEFAULT: .eabi_attribute 44, 2 783; CORTEX-A12-DEFAULT: .eabi_attribute 68, 3 784; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 19 785;; We default to IEEE 754 compliance 786; CORTEX-A12-DEFAULT: .eabi_attribute 20, 1 787; CORTEX-A12-DEFAULT: .eabi_attribute 21, 1 788; CORTEX-A12-DEFAULT-NOT: .eabi_attribute 22 789; CORTEX-A12-DEFAULT: .eabi_attribute 23, 3 790; CORTEX-A12-DEFAULT: .eabi_attribute 24, 1 791; CORTEX-A12-DEFAULT: .eabi_attribute 25, 1 792 793; CORTEX-A12-DEFAULT-FAST-NOT: .eabi_attribute 19 794;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when 795;; -ffast-math is specified. 796; CORTEX-A12-DEFAULT-FAST: .eabi_attribute 20, 2 797; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 21 798; CORTEX-A12-HARD-FAST-NOT: .eabi_attribute 22 799; CORTEX-A12-HARD-FAST: .eabi_attribute 23, 1 800 801; CORTEX-A12-NOFPU: .cpu cortex-a12 802; CORTEX-A12-NOFPU: .eabi_attribute 6, 10 803; CORTEX-A12-NOFPU: .eabi_attribute 7, 65 804; CORTEX-A12-NOFPU: .eabi_attribute 8, 1 805; CORTEX-A12-NOFPU: .eabi_attribute 9, 2 806; CORTEX-A12-NOFPU-NOT: .fpu 807; CORTEX-A12-NOFPU: .eabi_attribute 42, 1 808; CORTEX-A12-NOFPU: .eabi_attribute 44, 2 809; CORTEX-A12-NOFPU: .eabi_attribute 68, 3 810; CORTEX-A12-NOFPU-NOT: .eabi_attribute 19 811;; We default to IEEE 754 compliance 812; CORTEX-A12-NOFPU: .eabi_attribute 20, 1 813; CORTEX-A12-NOFPU: .eabi_attribute 21, 1 814; CORTEX-A12-NOFPU-NOT: .eabi_attribute 22 815; CORTEX-A12-NOFPU: .eabi_attribute 23, 3 816; CORTEX-A12-NOFPU: .eabi_attribute 24, 1 817; CORTEX-A12-NOFPU: .eabi_attribute 25, 1 818 819; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 19 820;; Despite there being no FPU, we chose to flush to zero preserving 821;; sign. This matches what the hardware would do for this architecture 822;; revision. 823; CORTEX-A12-NOFPU-FAST: .eabi_attribute 20, 2 824; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 21 825; CORTEX-A12-NOFPU-FAST-NOT: .eabi_attribute 22 826; CORTEX-A12-NOFPU-FAST: .eabi_attribute 23, 1 827 828; CORTEX-A15: .cpu cortex-a15 829; CORTEX-A15: .eabi_attribute 6, 10 830; CORTEX-A15: .eabi_attribute 7, 65 831; CORTEX-A15: .eabi_attribute 8, 1 832; CORTEX-A15: .eabi_attribute 9, 2 833; CORTEX-A15: .fpu neon-vfpv4 834; CORTEX-A15-NOT: .eabi_attribute 27 835; CORTEX-A15: .eabi_attribute 36, 1 836; CORTEX-A15: .eabi_attribute 42, 1 837; CORTEX-A15: .eabi_attribute 44, 2 838; CORTEX-A15: .eabi_attribute 68, 3 839; CORTEX-A15-NOT: .eabi_attribute 19 840;; We default to IEEE 754 compliance 841; CORTEX-A15: .eabi_attribute 20, 1 842; CORTEX-A15: .eabi_attribute 21, 1 843; CORTEX-A15-NOT: .eabi_attribute 22 844; CORTEX-A15: .eabi_attribute 23, 3 845; CORTEX-A15: .eabi_attribute 24, 1 846; CORTEX-A15: .eabi_attribute 25, 1 847; CORTEX-A15-NOT: .eabi_attribute 28 848; CORTEX-A15: .eabi_attribute 38, 1 849 850; CORTEX-A15-FAST-NOT: .eabi_attribute 19 851;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when 852;; -ffast-math is specified. 853; CORTEX-A15-FAST: .eabi_attribute 20, 2 854; CORTEX-A15-FAST-NOT: .eabi_attribute 21 855; CORTEX-A15-FAST-NOT: .eabi_attribute 22 856; CORTEX-A15-FAST: .eabi_attribute 23, 1 857 858; CORTEX-A17-DEFAULT: .cpu cortex-a17 859; CORTEX-A17-DEFAULT: .eabi_attribute 6, 10 860; CORTEX-A17-DEFAULT: .eabi_attribute 7, 65 861; CORTEX-A17-DEFAULT: .eabi_attribute 8, 1 862; CORTEX-A17-DEFAULT: .eabi_attribute 9, 2 863; CORTEX-A17-DEFAULT: .fpu neon-vfpv4 864; CORTEX-A17-DEFAULT: .eabi_attribute 42, 1 865; CORTEX-A17-DEFAULT: .eabi_attribute 44, 2 866; CORTEX-A17-DEFAULT: .eabi_attribute 68, 3 867; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 19 868;; We default to IEEE 754 compliance 869; CORTEX-A17-DEFAULT: .eabi_attribute 20, 1 870; CORTEX-A17-DEFAULT: .eabi_attribute 21, 1 871; CORTEX-A17-DEFAULT-NOT: .eabi_attribute 22 872; CORTEX-A17-DEFAULT: .eabi_attribute 23, 3 873; CORTEX-A17-DEFAULT: .eabi_attribute 24, 1 874; CORTEX-A17-DEFAULT: .eabi_attribute 25, 1 875 876; CORTEX-A17-FAST-NOT: .eabi_attribute 19 877;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when 878;; -ffast-math is specified. 879; CORTEX-A17-FAST: .eabi_attribute 20, 2 880; CORTEX-A17-FAST-NOT: .eabi_attribute 21 881; CORTEX-A17-FAST-NOT: .eabi_attribute 22 882; CORTEX-A17-FAST: .eabi_attribute 23, 1 883 884; CORTEX-A17-NOFPU: .cpu cortex-a17 885; CORTEX-A17-NOFPU: .eabi_attribute 6, 10 886; CORTEX-A17-NOFPU: .eabi_attribute 7, 65 887; CORTEX-A17-NOFPU: .eabi_attribute 8, 1 888; CORTEX-A17-NOFPU: .eabi_attribute 9, 2 889; CORTEX-A17-NOFPU-NOT: .fpu 890; CORTEX-A17-NOFPU: .eabi_attribute 42, 1 891; CORTEX-A17-NOFPU: .eabi_attribute 44, 2 892; CORTEX-A17-NOFPU: .eabi_attribute 68, 3 893; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19 894;; We default to IEEE 754 compliance 895; CORTEX-A17-NOFPU: .eabi_attribute 20, 1 896; CORTEX-A17-NOFPU: .eabi_attribute 21, 1 897; CORTEX-A17-NOFPU-NOT: .eabi_attribute 22 898; CORTEX-A17-NOFPU: .eabi_attribute 23, 3 899; CORTEX-A17-NOFPU: .eabi_attribute 24, 1 900; CORTEX-A17-NOFPU: .eabi_attribute 25, 1 901 902; CORTEX-A17-NOFPU-NOT: .eabi_attribute 19 903;; Despite there being no FPU, we chose to flush to zero preserving 904;; sign. This matches what the hardware would do for this architecture 905;; revision. 906; CORTEX-A17-NOFPU-FAST: .eabi_attribute 20, 2 907; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 21 908; CORTEX-A17-NOFPU-FAST-NOT: .eabi_attribute 22 909; CORTEX-A17-NOFPU-FAST: .eabi_attribute 23, 1 910 911; Test flags -enable-no-trapping-fp-math and -denormal-fp-math: 912; NO-TRAPPING-MATH: .eabi_attribute 21, 0 913; DENORMAL-IEEE: .eabi_attribute 20, 1 914; DENORMAL-PRESERVE-SIGN: .eabi_attribute 20, 2 915; DENORMAL-POSITIVE-ZERO: .eabi_attribute 20, 0 916 917; CORTEX-M0: .cpu cortex-m0 918; CORTEX-M0: .eabi_attribute 6, 12 919; CORTEX-M0: .eabi_attribute 7, 77 920; CORTEX-M0: .eabi_attribute 8, 0 921; CORTEX-M0: .eabi_attribute 9, 1 922; CORTEX-M0-NOT: .eabi_attribute 27 923; CORTEX-M0-NOT: .eabi_attribute 36 924; CORTEX-M0: .eabi_attribute 34, 0 925; CORTEX-M0-NOT: .eabi_attribute 42 926; CORTEX-M0-NOT: .eabi_attribute 44 927; CORTEX-M0-NOT: .eabi_attribute 68 928; CORTEX-M0-NOT: .eabi_attribute 19 929;; We default to IEEE 754 compliance 930; CORTEX-M0: .eabi_attribute 20, 1 931; CORTEX-M0: .eabi_attribute 21, 1 932; CORTEX-M0-NOT: .eabi_attribute 22 933; CORTEX-M0: .eabi_attribute 23, 3 934; CORTEX-M0: .eabi_attribute 24, 1 935; CORTEX-M0: .eabi_attribute 25, 1 936; CORTEX-M0-NOT: .eabi_attribute 28 937; CORTEX-M0: .eabi_attribute 38, 1 938 939; CORTEX-M0-FAST-NOT: .eabi_attribute 19 940;; Despite the M0 CPU having no FPU in this scenario, we chose to 941;; flush to positive zero here. There's no hardware support doing 942;; this, but the fast maths software library might and such behaviour 943;; would match hardware support on this architecture revision if it 944;; existed. 945; CORTEX-M0-FAST-NOT: .eabi_attribute 20 946; CORTEX-M0-FAST-NOT: .eabi_attribute 21 947; CORTEX-M0-FAST-NOT: .eabi_attribute 22 948; CORTEX-M0-FAST: .eabi_attribute 23, 1 949 950; CORTEX-M0PLUS: .cpu cortex-m0plus 951; CORTEX-M0PLUS: .eabi_attribute 6, 12 952; CORTEX-M0PLUS: .eabi_attribute 7, 77 953; CORTEX-M0PLUS: .eabi_attribute 8, 0 954; CORTEX-M0PLUS: .eabi_attribute 9, 1 955; CORTEX-M0PLUS-NOT: .eabi_attribute 27 956; CORTEX-M0PLUS-NOT: .eabi_attribute 36 957; CORTEX-M0PLUS-NOT: .eabi_attribute 42 958; CORTEX-M0PLUS-NOT: .eabi_attribute 44 959; CORTEX-M0PLUS-NOT: .eabi_attribute 68 960; CORTEX-M0PLUS-NOT: .eabi_attribute 19 961;; We default to IEEE 754 compliance 962; CORTEX-M0PLUS: .eabi_attribute 20, 1 963; CORTEX-M0PLUS: .eabi_attribute 21, 1 964; CORTEX-M0PLUS-NOT: .eabi_attribute 22 965; CORTEX-M0PLUS: .eabi_attribute 23, 3 966; CORTEX-M0PLUS: .eabi_attribute 24, 1 967; CORTEX-M0PLUS: .eabi_attribute 25, 1 968; CORTEX-M0PLUS-NOT: .eabi_attribute 28 969; CORTEX-M0PLUS: .eabi_attribute 38, 1 970 971; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 19 972;; Despite the M0+ CPU having no FPU in this scenario, we chose to 973;; flush to positive zero here. There's no hardware support doing 974;; this, but the fast maths software library might and such behaviour 975;; would match hardware support on this architecture revision if it 976;; existed. 977; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 20 978; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 21 979; CORTEX-M0PLUS-FAST-NOT: .eabi_attribute 22 980; CORTEX-M0PLUS-FAST: .eabi_attribute 23, 1 981 982; CORTEX-M1: .cpu cortex-m1 983; CORTEX-M1: .eabi_attribute 6, 12 984; CORTEX-M1: .eabi_attribute 7, 77 985; CORTEX-M1: .eabi_attribute 8, 0 986; CORTEX-M1: .eabi_attribute 9, 1 987; CORTEX-M1-NOT: .eabi_attribute 27 988; CORTEX-M1-NOT: .eabi_attribute 36 989; CORTEX-M1-NOT: .eabi_attribute 42 990; CORTEX-M1-NOT: .eabi_attribute 44 991; CORTEX-M1-NOT: .eabi_attribute 68 992; CORTEX-M1-NOT: .eabi_attribute 19 993;; We default to IEEE 754 compliance 994; CORTEX-M1: .eabi_attribute 20, 1 995; CORTEX-M1: .eabi_attribute 21, 1 996; CORTEX-M1-NOT: .eabi_attribute 22 997; CORTEX-M1: .eabi_attribute 23, 3 998; CORTEX-M1: .eabi_attribute 24, 1 999; CORTEX-M1: .eabi_attribute 25, 1 1000; CORTEX-M1-NOT: .eabi_attribute 28 1001; CORTEX-M1: .eabi_attribute 38, 1 1002 1003; CORTEX-M1-FAST-NOT: .eabi_attribute 19 1004;; Despite the M1 CPU having no FPU in this scenario, we chose to 1005;; flush to positive zero here. There's no hardware support doing 1006;; this, but the fast maths software library might and such behaviour 1007;; would match hardware support on this architecture revision if it 1008;; existed. 1009; CORTEX-M1-FAST-NOT: .eabi_attribute 20 1010; CORTEX-M1-FAST-NOT: .eabi_attribute 21 1011; CORTEX-M1-FAST-NOT: .eabi_attribute 22 1012; CORTEX-M1-FAST: .eabi_attribute 23, 1 1013 1014; SC000: .cpu sc000 1015; SC000: .eabi_attribute 6, 12 1016; SC000: .eabi_attribute 7, 77 1017; SC000: .eabi_attribute 8, 0 1018; SC000: .eabi_attribute 9, 1 1019; SC000-NOT: .eabi_attribute 27 1020; SC000-NOT: .eabi_attribute 42 1021; SC000-NOT: .eabi_attribute 44 1022; SC000-NOT: .eabi_attribute 68 1023; SC000-NOT: .eabi_attribute 19 1024;; We default to IEEE 754 compliance 1025; SC000: .eabi_attribute 20, 1 1026; SC000: .eabi_attribute 21, 1 1027; SC000-NOT: .eabi_attribute 22 1028; SC000: .eabi_attribute 23, 3 1029; SC000: .eabi_attribute 24, 1 1030; SC000: .eabi_attribute 25, 1 1031; SC000-NOT: .eabi_attribute 28 1032; SC000: .eabi_attribute 38, 1 1033 1034; SC000-FAST-NOT: .eabi_attribute 19 1035;; Despite the SC000 CPU having no FPU in this scenario, we chose to 1036;; flush to positive zero here. There's no hardware support doing 1037;; this, but the fast maths software library might and such behaviour 1038;; would match hardware support on this architecture revision if it 1039;; existed. 1040; SC000-FAST-NOT: .eabi_attribute 20 1041; SC000-FAST-NOT: .eabi_attribute 21 1042; SC000-FAST-NOT: .eabi_attribute 22 1043; SC000-FAST: .eabi_attribute 23, 1 1044 1045; CORTEX-M3: .cpu cortex-m3 1046; CORTEX-M3: .eabi_attribute 6, 10 1047; CORTEX-M3: .eabi_attribute 7, 77 1048; CORTEX-M3: .eabi_attribute 8, 0 1049; CORTEX-M3: .eabi_attribute 9, 2 1050; CORTEX-M3-NOT: .eabi_attribute 27 1051; CORTEX-M3-NOT: .eabi_attribute 36 1052; CORTEX-M3-NOT: .eabi_attribute 42 1053; CORTEX-M3-NOT: .eabi_attribute 44 1054; CORTEX-M3-NOT: .eabi_attribute 68 1055; CORTEX-M3-NOT: .eabi_attribute 19 1056;; We default to IEEE 754 compliance 1057; CORTEX-M3: .eabi_attribute 20, 1 1058; CORTEX-M3: .eabi_attribute 21, 1 1059; CORTEX-M3-NOT: .eabi_attribute 22 1060; CORTEX-M3: .eabi_attribute 23, 3 1061; CORTEX-M3: .eabi_attribute 24, 1 1062; CORTEX-M3: .eabi_attribute 25, 1 1063; CORTEX-M3-NOT: .eabi_attribute 28 1064; CORTEX-M3: .eabi_attribute 38, 1 1065 1066; CORTEX-M3-FAST-NOT: .eabi_attribute 19 1067;; Despite there being no FPU, we chose to flush to zero preserving 1068;; sign. This matches what the hardware would do for this architecture 1069;; revision. 1070; CORTEX-M3-FAST: .eabi_attribute 20, 2 1071; CORTEX-M3-FAST-NOT: .eabi_attribute 21 1072; CORTEX-M3-FAST-NOT: .eabi_attribute 22 1073; CORTEX-M3-FAST: .eabi_attribute 23, 1 1074 1075; SC300: .cpu sc300 1076; SC300: .eabi_attribute 6, 10 1077; SC300: .eabi_attribute 7, 77 1078; SC300: .eabi_attribute 8, 0 1079; SC300: .eabi_attribute 9, 2 1080; SC300-NOT: .eabi_attribute 27 1081; SC300-NOT: .eabi_attribute 36 1082; SC300-NOT: .eabi_attribute 42 1083; SC300-NOT: .eabi_attribute 44 1084; SC300-NOT: .eabi_attribute 68 1085; SC300-NOT: .eabi_attribute 19 1086;; We default to IEEE 754 compliance 1087; SC300: .eabi_attribute 20, 1 1088; SC300: .eabi_attribute 21, 1 1089; SC300-NOT: .eabi_attribute 22 1090; SC300: .eabi_attribute 23, 3 1091; SC300: .eabi_attribute 24, 1 1092; SC300: .eabi_attribute 25, 1 1093; SC300-NOT: .eabi_attribute 28 1094; SC300: .eabi_attribute 38, 1 1095 1096; SC300-FAST-NOT: .eabi_attribute 19 1097;; Despite there being no FPU, we chose to flush to zero preserving 1098;; sign. This matches what the hardware would do for this architecture 1099;; revision. 1100; SC300-FAST: .eabi_attribute 20, 2 1101; SC300-FAST-NOT: .eabi_attribute 21 1102; SC300-FAST-NOT: .eabi_attribute 22 1103; SC300-FAST: .eabi_attribute 23, 1 1104 1105; CORTEX-M4-SOFT: .cpu cortex-m4 1106; CORTEX-M4-SOFT: .eabi_attribute 6, 13 1107; CORTEX-M4-SOFT: .eabi_attribute 7, 77 1108; CORTEX-M4-SOFT: .eabi_attribute 8, 0 1109; CORTEX-M4-SOFT: .eabi_attribute 9, 2 1110; CORTEX-M4-SOFT: .fpu fpv4-sp-d16 1111; CORTEX-M4-SOFT: .eabi_attribute 27, 1 1112; CORTEX-M4-SOFT: .eabi_attribute 36, 1 1113; CORTEX-M4-SOFT-NOT: .eabi_attribute 42 1114; CORTEX-M4-SOFT-NOT: .eabi_attribute 44 1115; CORTEX-M4-SOFT-NOT: .eabi_attribute 68 1116; CORTEX-M4-SOFT-NOT: .eabi_attribute 19 1117;; We default to IEEE 754 compliance 1118; CORTEX-M4-SOFT: .eabi_attribute 20, 1 1119; CORTEX-M4-SOFT: .eabi_attribute 21, 1 1120; CORTEX-M4-SOFT-NOT: .eabi_attribute 22 1121; CORTEX-M4-SOFT: .eabi_attribute 23, 3 1122; CORTEX-M4-SOFT: .eabi_attribute 24, 1 1123; CORTEX-M4-SOFT: .eabi_attribute 25, 1 1124; CORTEX-M4-SOFT-NOT: .eabi_attribute 28 1125; CORTEX-M4-SOFT: .eabi_attribute 38, 1 1126 1127; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 19 1128;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when 1129;; -ffast-math is specified. 1130; CORTEX-M4-SOFT-FAST: .eabi_attribute 20, 2 1131; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 21 1132; CORTEX-M4-SOFT-FAST-NOT: .eabi_attribute 22 1133; CORTEX-M4-SOFT-FAST: .eabi_attribute 23, 1 1134 1135; CORTEX-M4-HARD: .cpu cortex-m4 1136; CORTEX-M4-HARD: .eabi_attribute 6, 13 1137; CORTEX-M4-HARD: .eabi_attribute 7, 77 1138; CORTEX-M4-HARD: .eabi_attribute 8, 0 1139; CORTEX-M4-HARD: .eabi_attribute 9, 2 1140; CORTEX-M4-HARD: .fpu fpv4-sp-d16 1141; CORTEX-M4-HARD: .eabi_attribute 27, 1 1142; CORTEX-M4-HARD: .eabi_attribute 36, 1 1143; CORTEX-M4-HARD-NOT: .eabi_attribute 42 1144; CORTEX-M4-HARD-NOT: .eabi_attribute 44 1145; CORTEX-M4-HARD-NOT: .eabi_attribute 68 1146; CORTEX-M4-HARD-NOT: .eabi_attribute 19 1147;; We default to IEEE 754 compliance 1148; CORTEX-M4-HARD: .eabi_attribute 20, 1 1149; CORTEX-M4-HARD: .eabi_attribute 21, 1 1150; CORTEX-M4-HARD-NOT: .eabi_attribute 22 1151; CORTEX-M4-HARD: .eabi_attribute 23, 3 1152; CORTEX-M4-HARD: .eabi_attribute 24, 1 1153; CORTEX-M4-HARD: .eabi_attribute 25, 1 1154; CORTEX-M4-HARD: .eabi_attribute 28, 1 1155; CORTEX-M4-HARD: .eabi_attribute 38, 1 1156 1157; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 19 1158;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when 1159;; -ffast-math is specified. 1160; CORTEX-M4-HARD-FAST: .eabi_attribute 20, 2 1161; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 21 1162; CORTEX-M4-HARD-FAST-NOT: .eabi_attribute 22 1163; CORTEX-M4-HARD-FAST: .eabi_attribute 23, 1 1164 1165; CORTEX-M7: .cpu cortex-m7 1166; CORTEX-M7: .eabi_attribute 6, 13 1167; CORTEX-M7: .eabi_attribute 7, 77 1168; CORTEX-M7: .eabi_attribute 8, 0 1169; CORTEX-M7: .eabi_attribute 9, 2 1170; CORTEX-M7-SOFT-NOT: .fpu 1171; CORTEX-M7-SINGLE: .fpu fpv5-sp-d16 1172; CORTEX-M7-DOUBLE: .fpu fpv5-d16 1173; CORTEX-M7-SOFT-NOT: .eabi_attribute 27 1174; CORTEX-M7-SINGLE: .eabi_attribute 27, 1 1175; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27 1176; CORTEX-M7: .eabi_attribute 36, 1 1177; CORTEX-M7-NOT: .eabi_attribute 44 1178; CORTEX-M7: .eabi_attribute 17, 1 1179; CORTEX-M7-NOT: .eabi_attribute 19 1180;; We default to IEEE 754 compliance 1181; CORTEX-M7: .eabi_attribute 20, 1 1182; CORTEX-M7: .eabi_attribute 21, 1 1183; CORTEX-M7-NOT: .eabi_attribute 22 1184; CORTEX-M7: .eabi_attribute 23, 3 1185; CORTEX-M7: .eabi_attribute 24, 1 1186; CORTEX-M7: .eabi_attribute 25, 1 1187; CORTEX-M7: .eabi_attribute 38, 1 1188; CORTEX-M7: .eabi_attribute 14, 0 1189 1190; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 19 1191;; The M7 has the ARMv8 FP unit, which always flushes preserving sign. 1192; CORTEX-M7-FAST: .eabi_attribute 20, 2 1193;; Despite there being no FPU, we chose to flush to zero preserving 1194;; sign. This matches what the hardware would do for this architecture 1195;; revision. 1196; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2 1197; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 21 1198; CORTEX-M7-NOFPU-FAST-NOT: .eabi_attribute 22 1199; CORTEX-M7-NOFPU-FAST: .eabi_attribute 23, 1 1200 1201; CORTEX-R4: .cpu cortex-r4 1202; CORTEX-R4: .eabi_attribute 6, 10 1203; CORTEX-R4: .eabi_attribute 7, 82 1204; CORTEX-R4: .eabi_attribute 8, 1 1205; CORTEX-R4: .eabi_attribute 9, 2 1206; CORTEX-R4-NOT: .fpu vfpv3-d16 1207; CORTEX-R4-NOT: .eabi_attribute 36 1208; CORTEX-R4-NOT: .eabi_attribute 42 1209; CORTEX-R4-NOT: .eabi_attribute 44 1210; CORTEX-R4-NOT: .eabi_attribute 68 1211; CORTEX-R4-NOT: .eabi_attribute 19 1212;; We default to IEEE 754 compliance 1213; CORTEX-R4: .eabi_attribute 20, 1 1214; CORTEX-R4: .eabi_attribute 21, 1 1215; CORTEX-R4-NOT: .eabi_attribute 22 1216; CORTEX-R4: .eabi_attribute 23, 3 1217; CORTEX-R4: .eabi_attribute 24, 1 1218; CORTEX-R4: .eabi_attribute 25, 1 1219; CORTEX-R4-NOT: .eabi_attribute 28 1220; CORTEX-R4: .eabi_attribute 38, 1 1221 1222; CORTEX-R4F: .cpu cortex-r4f 1223; CORTEX-R4F: .eabi_attribute 6, 10 1224; CORTEX-R4F: .eabi_attribute 7, 82 1225; CORTEX-R4F: .eabi_attribute 8, 1 1226; CORTEX-R4F: .eabi_attribute 9, 2 1227; CORTEX-R4F: .fpu vfpv3-d16 1228; CORTEX-R4F-NOT: .eabi_attribute 27, 1 1229; CORTEX-R4F-NOT: .eabi_attribute 36 1230; CORTEX-R4F-NOT: .eabi_attribute 42 1231; CORTEX-R4F-NOT: .eabi_attribute 44 1232; CORTEX-R4F-NOT: .eabi_attribute 68 1233; CORTEX-R4F-NOT: .eabi_attribute 19 1234;; We default to IEEE 754 compliance 1235; CORTEX-R4F: .eabi_attribute 20, 1 1236; CORTEX-R4F: .eabi_attribute 21, 1 1237; CORTEX-R4F-NOT: .eabi_attribute 22 1238; CORTEX-R4F: .eabi_attribute 23, 3 1239; CORTEX-R4F: .eabi_attribute 24, 1 1240; CORTEX-R4F: .eabi_attribute 25, 1 1241; CORTEX-R4F-NOT: .eabi_attribute 28 1242; CORTEX-R4F: .eabi_attribute 38, 1 1243 1244; CORTEX-R5: .cpu cortex-r5 1245; CORTEX-R5: .eabi_attribute 6, 10 1246; CORTEX-R5: .eabi_attribute 7, 82 1247; CORTEX-R5: .eabi_attribute 8, 1 1248; CORTEX-R5: .eabi_attribute 9, 2 1249; CORTEX-R5: .fpu vfpv3-d16 1250; CORTEX-R5-NOT: .eabi_attribute 27, 1 1251; CORTEX-R5-NOT: .eabi_attribute 36 1252; CORTEX-R5: .eabi_attribute 44, 2 1253; CORTEX-R5-NOT: .eabi_attribute 42 1254; CORTEX-R5-NOT: .eabi_attribute 68 1255; CORTEX-R5-NOT: .eabi_attribute 19 1256;; We default to IEEE 754 compliance 1257; CORTEX-R5: .eabi_attribute 20, 1 1258; CORTEX-R5: .eabi_attribute 21, 1 1259; CORTEX-R5-NOT: .eabi_attribute 22 1260; CORTEX-R5: .eabi_attribute 23, 3 1261; CORTEX-R5: .eabi_attribute 24, 1 1262; CORTEX-R5: .eabi_attribute 25, 1 1263; CORTEX-R5-NOT: .eabi_attribute 28 1264; CORTEX-R5: .eabi_attribute 38, 1 1265 1266; CORTEX-R5-FAST-NOT: .eabi_attribute 19 1267;; The R5 has the VFPv3 FP unit, which always flushes preserving sign. 1268; CORTEX-R5-FAST: .eabi_attribute 20, 2 1269; CORTEX-R5-FAST-NOT: .eabi_attribute 21 1270; CORTEX-R5-FAST-NOT: .eabi_attribute 22 1271; CORTEX-R5-FAST: .eabi_attribute 23, 1 1272 1273; CORTEX-R7: .cpu cortex-r7 1274; CORTEX-R7: .eabi_attribute 6, 10 1275; CORTEX-R7: .eabi_attribute 7, 82 1276; CORTEX-R7: .eabi_attribute 8, 1 1277; CORTEX-R7: .eabi_attribute 9, 2 1278; CORTEX-R7: .fpu vfpv3-d16-fp16 1279; CORTEX-R7: .eabi_attribute 36, 1 1280; CORTEX-R7: .eabi_attribute 42, 1 1281; CORTEX-R7: .eabi_attribute 44, 2 1282; CORTEX-R7-NOT: .eabi_attribute 68 1283; CORTEX-R7-NOT: .eabi_attribute 19 1284;; We default to IEEE 754 compliance 1285; CORTEX-R7: .eabi_attribute 20, 1 1286; CORTEX-R7: .eabi_attribute 21, 1 1287; CORTEX-R7-NOT: .eabi_attribute 22 1288; CORTEX-R7: .eabi_attribute 23, 3 1289; CORTEX-R7: .eabi_attribute 24, 1 1290; CORTEX-R7: .eabi_attribute 25, 1 1291; CORTEX-R7-NOT: .eabi_attribute 28 1292; CORTEX-R7: .eabi_attribute 38, 1 1293 1294; CORTEX-R7-FAST-NOT: .eabi_attribute 19 1295;; The R7 has the VFPv3 FP unit, which always flushes preserving sign. 1296; CORTEX-R7-FAST: .eabi_attribute 20, 2 1297; CORTEX-R7-FAST-NOT: .eabi_attribute 21 1298; CORTEX-R7-FAST-NOT: .eabi_attribute 22 1299; CORTEX-R7-FAST: .eabi_attribute 23, 1 1300 1301; CORTEX-R8: .cpu cortex-r8 1302; CORTEX-R8: .eabi_attribute 6, 10 1303; CORTEX-R8: .eabi_attribute 7, 82 1304; CORTEX-R8: .eabi_attribute 8, 1 1305; CORTEX-R8: .eabi_attribute 9, 2 1306; CORTEX-R8: .fpu vfpv3-d16-fp16 1307; CORTEX-R8: .eabi_attribute 36, 1 1308; CORTEX-R8: .eabi_attribute 42, 1 1309; CORTEX-R8: .eabi_attribute 44, 2 1310; CORTEX-R8-NOT: .eabi_attribute 68 1311; CORTEX-R8-NOT: .eabi_attribute 19 1312;; We default to IEEE 754 compliance 1313; CORTEX-R8: .eabi_attribute 20, 1 1314; CORTEX-R8: .eabi_attribute 21, 1 1315; CORTEX-R8-NOT: .eabi_attribute 22 1316; CORTEX-R8: .eabi_attribute 23, 3 1317; CORTEX-R8: .eabi_attribute 24, 1 1318; CORTEX-R8: .eabi_attribute 25, 1 1319; CORTEX-R8-NOT: .eabi_attribute 28 1320; CORTEX-R8: .eabi_attribute 38, 1 1321 1322; CORTEX-R8-FAST-NOT: .eabi_attribute 19 1323;; The R8 has the VFPv3 FP unit, which always flushes preserving sign. 1324; CORTEX-R8-FAST: .eabi_attribute 20, 2 1325; CORTEX-R8-FAST-NOT: .eabi_attribute 21 1326; CORTEX-R8-FAST-NOT: .eabi_attribute 22 1327; CORTEX-R8-FAST: .eabi_attribute 23, 1 1328 1329; CORTEX-A32: .cpu cortex-a32 1330; CORTEX-A32: .eabi_attribute 6, 14 1331; CORTEX-A32: .eabi_attribute 7, 65 1332; CORTEX-A32: .eabi_attribute 8, 1 1333; CORTEX-A32: .eabi_attribute 9, 2 1334; CORTEX-A32: .fpu crypto-neon-fp-armv8 1335; CORTEX-A32: .eabi_attribute 12, 3 1336; CORTEX-A32-NOT: .eabi_attribute 27 1337; CORTEX-A32: .eabi_attribute 36, 1 1338; CORTEX-A32: .eabi_attribute 42, 1 1339; CORTEX-A32-NOT: .eabi_attribute 44 1340; CORTEX-A32: .eabi_attribute 68, 3 1341; CORTEX-A32-NOT: .eabi_attribute 19 1342;; We default to IEEE 754 compliance 1343; CORTEX-A32: .eabi_attribute 20, 1 1344; CORTEX-A32: .eabi_attribute 21, 1 1345; CORTEX-A32-NOT: .eabi_attribute 22 1346; CORTEX-A32: .eabi_attribute 23, 3 1347; CORTEX-A32: .eabi_attribute 24, 1 1348; CORTEX-A32: .eabi_attribute 25, 1 1349; CORTEX-A32-NOT: .eabi_attribute 28 1350; CORTEX-A32: .eabi_attribute 38, 1 1351 1352; CORTEX-A32-FAST-NOT: .eabi_attribute 19 1353;; The A32 has the ARMv8 FP unit, which always flushes preserving sign. 1354; CORTEX-A32-FAST: .eabi_attribute 20, 2 1355; CORTEX-A32-FAST-NOT: .eabi_attribute 21 1356; CORTEX-A32-FAST-NOT: .eabi_attribute 22 1357; CORTEX-A32-FAST: .eabi_attribute 23, 1 1358 1359; CORTEX-M23: .cpu cortex-m23 1360; CORTEX-M23: .eabi_attribute 6, 16 1361; CORTEX-M23: .eabi_attribute 7, 77 1362; CORTEX-M23: .eabi_attribute 8, 0 1363; CORTEX-M23: .eabi_attribute 9, 3 1364; CORTEX-M23-NOT: .eabi_attribute 27 1365; CORTEX-M23: .eabi_attribute 34, 0 1366; CORTEX-M23-NOT: .eabi_attribute 44 1367; CORTEX-M23: .eabi_attribute 17, 1 1368;; We default to IEEE 754 compliance 1369; CORTEX-M23-NOT: .eabi_attribute 19 1370; CORTEX-M23: .eabi_attribute 20, 1 1371; CORTEX-M23: .eabi_attribute 21, 1 1372; CORTEX-M23: .eabi_attribute 23, 3 1373; CORTEX-M23: .eabi_attribute 24, 1 1374; CORTEX-M23-NOT: .eabi_attribute 28 1375; CORTEX-M23: .eabi_attribute 25, 1 1376; CORTEX-M23: .eabi_attribute 38, 1 1377; CORTEX-M23: .eabi_attribute 14, 0 1378 1379; CORTEX-M33: .cpu cortex-m33 1380; CORTEX-M33: .eabi_attribute 6, 17 1381; CORTEX-M33: .eabi_attribute 7, 77 1382; CORTEX-M33: .eabi_attribute 8, 0 1383; CORTEX-M33: .eabi_attribute 9, 3 1384; CORTEX-M33: .fpu fpv5-sp-d16 1385; CORTEX-M33: .eabi_attribute 27, 1 1386; CORTEX-M33: .eabi_attribute 36, 1 1387; CORTEX-M33-NOT: .eabi_attribute 44 1388; CORTEX-M33: .eabi_attribute 46, 1 1389; CORTEX-M33: .eabi_attribute 34, 1 1390; CORTEX-M33: .eabi_attribute 17, 1 1391;; We default to IEEE 754 compliance 1392; CORTEX-M23-NOT: .eabi_attribute 19 1393; CORTEX-M33: .eabi_attribute 20, 1 1394; CORTEX-M33: .eabi_attribute 21, 1 1395; CORTEX-M33: .eabi_attribute 23, 3 1396; CORTEX-M33: .eabi_attribute 24, 1 1397; CORTEX-M33: .eabi_attribute 25, 1 1398; CORTEX-M33-NOT: .eabi_attribute 28 1399; CORTEX-M33: .eabi_attribute 38, 1 1400; CORTEX-M33: .eabi_attribute 14, 0 1401 1402; CORTEX-M35P: .cpu cortex-m35p 1403; CORTEX-M35P: .eabi_attribute 6, 17 1404; CORTEX-M35P: .eabi_attribute 7, 77 1405; CORTEX-M35P: .eabi_attribute 8, 0 1406; CORTEX-M35P: .eabi_attribute 9, 3 1407; CORTEX-M35P: .fpu fpv5-sp-d16 1408; CORTEX-M35P: .eabi_attribute 27, 1 1409; CORTEX-M35P: .eabi_attribute 36, 1 1410; CORTEX-M35P-NOT: .eabi_attribute 44 1411; CORTEX-M35P: .eabi_attribute 46, 1 1412; CORTEX-M35P: .eabi_attribute 34, 1 1413; CORTEX-M35P: .eabi_attribute 17, 1 1414; CORTEX-M35P: .eabi_attribute 20, 1 1415; CORTEX-M35P: .eabi_attribute 21, 1 1416; CORTEX-M35P: .eabi_attribute 23, 3 1417; CORTEX-M35P: .eabi_attribute 24, 1 1418; CORTEX-M35P: .eabi_attribute 25, 1 1419; CORTEX-M35P-NOT: .eabi_attribute 28 1420; CORTEX-M35P: .eabi_attribute 38, 1 1421; CORTEX-M35P: .eabi_attribute 14, 0 1422 1423; CORTEX-M33-FAST-NOT: .eabi_attribute 19 1424; CORTEX-M33-FAST: .eabi_attribute 20, 2 1425; CORTEX-M33-FAST-NOT: .eabi_attribute 21 1426; CORTEX-M33-FAST-NOT: .eabi_attribute 22 1427; CORTEX-M33-FAST: .eabi_attribute 23, 1 1428 1429; CORTEX-A35: .cpu cortex-a35 1430; CORTEX-A35: .eabi_attribute 6, 14 1431; CORTEX-A35: .eabi_attribute 7, 65 1432; CORTEX-A35: .eabi_attribute 8, 1 1433; CORTEX-A35: .eabi_attribute 9, 2 1434; CORTEX-A35: .fpu crypto-neon-fp-armv8 1435; CORTEX-A35: .eabi_attribute 12, 3 1436; CORTEX-A35-NOT: .eabi_attribute 27 1437; CORTEX-A35: .eabi_attribute 36, 1 1438; CORTEX-A35: .eabi_attribute 42, 1 1439; CORTEX-A35-NOT: .eabi_attribute 44 1440; CORTEX-A35: .eabi_attribute 68, 3 1441; CORTEX-A35-NOT: .eabi_attribute 19 1442;; We default to IEEE 754 compliance 1443; CORTEX-A35: .eabi_attribute 20, 1 1444; CORTEX-A35: .eabi_attribute 21, 1 1445; CORTEX-A35-NOT: .eabi_attribute 22 1446; CORTEX-A35: .eabi_attribute 23, 3 1447; CORTEX-A35: .eabi_attribute 24, 1 1448; CORTEX-A35: .eabi_attribute 25, 1 1449; CORTEX-A35-NOT: .eabi_attribute 28 1450; CORTEX-A35: .eabi_attribute 38, 1 1451 1452; CORTEX-A35-FAST-NOT: .eabi_attribute 19 1453;; The A35 has the ARMv8 FP unit, which always flushes preserving sign. 1454; CORTEX-A35-FAST: .eabi_attribute 20, 2 1455; CORTEX-A35-FAST-NOT: .eabi_attribute 21 1456; CORTEX-A35-FAST-NOT: .eabi_attribute 22 1457; CORTEX-A35-FAST: .eabi_attribute 23, 1 1458 1459; CORTEX-A53: .cpu cortex-a53 1460; CORTEX-A53: .eabi_attribute 6, 14 1461; CORTEX-A53: .eabi_attribute 7, 65 1462; CORTEX-A53: .eabi_attribute 8, 1 1463; CORTEX-A53: .eabi_attribute 9, 2 1464; CORTEX-A53: .fpu crypto-neon-fp-armv8 1465; CORTEX-A53: .eabi_attribute 12, 3 1466; CORTEX-A53-NOT: .eabi_attribute 27 1467; CORTEX-A53: .eabi_attribute 36, 1 1468; CORTEX-A53: .eabi_attribute 42, 1 1469; CORTEX-A53-NOT: .eabi_attribute 44 1470; CORTEX-A53: .eabi_attribute 68, 3 1471; CORTEX-A53-NOT: .eabi_attribute 19 1472;; We default to IEEE 754 compliance 1473; CORTEX-A53: .eabi_attribute 20, 1 1474; CORTEX-A53: .eabi_attribute 21, 1 1475; CORTEX-A53-NOT: .eabi_attribute 22 1476; CORTEX-A53: .eabi_attribute 23, 3 1477; CORTEX-A53: .eabi_attribute 24, 1 1478; CORTEX-A53: .eabi_attribute 25, 1 1479; CORTEX-A53-NOT: .eabi_attribute 28 1480; CORTEX-A53: .eabi_attribute 38, 1 1481 1482; CORTEX-A53-FAST-NOT: .eabi_attribute 19 1483;; The A53 has the ARMv8 FP unit, which always flushes preserving sign. 1484; CORTEX-A53-FAST: .eabi_attribute 20, 2 1485; CORTEX-A53-FAST-NOT: .eabi_attribute 21 1486; CORTEX-A53-FAST-NOT: .eabi_attribute 22 1487; CORTEX-A53-FAST: .eabi_attribute 23, 1 1488 1489; CORTEX-A57: .cpu cortex-a57 1490; CORTEX-A57: .eabi_attribute 6, 14 1491; CORTEX-A57: .eabi_attribute 7, 65 1492; CORTEX-A57: .eabi_attribute 8, 1 1493; CORTEX-A57: .eabi_attribute 9, 2 1494; CORTEX-A57: .fpu crypto-neon-fp-armv8 1495; CORTEX-A57: .eabi_attribute 12, 3 1496; CORTEX-A57-NOT: .eabi_attribute 27 1497; CORTEX-A57: .eabi_attribute 36, 1 1498; CORTEX-A57: .eabi_attribute 42, 1 1499; CORTEX-A57-NOT: .eabi_attribute 44 1500; CORTEX-A57: .eabi_attribute 68, 3 1501; CORTEX-A57-NOT: .eabi_attribute 19 1502;; We default to IEEE 754 compliance 1503; CORTEX-A57: .eabi_attribute 20, 1 1504; CORTEX-A57: .eabi_attribute 21, 1 1505; CORTEX-A57-NOT: .eabi_attribute 22 1506; CORTEX-A57: .eabi_attribute 23, 3 1507; CORTEX-A57: .eabi_attribute 24, 1 1508; CORTEX-A57: .eabi_attribute 25, 1 1509; CORTEX-A57-NOT: .eabi_attribute 28 1510; CORTEX-A57: .eabi_attribute 38, 1 1511 1512; CORTEX-A57-FAST-NOT: .eabi_attribute 19 1513;; The A57 has the ARMv8 FP unit, which always flushes preserving sign. 1514; CORTEX-A57-FAST: .eabi_attribute 20, 2 1515; CORTEX-A57-FAST-NOT: .eabi_attribute 21 1516; CORTEX-A57-FAST-NOT: .eabi_attribute 22 1517; CORTEX-A57-FAST: .eabi_attribute 23, 1 1518 1519; CORTEX-A72: .cpu cortex-a72 1520; CORTEX-A72: .eabi_attribute 6, 14 1521; CORTEX-A72: .eabi_attribute 7, 65 1522; CORTEX-A72: .eabi_attribute 8, 1 1523; CORTEX-A72: .eabi_attribute 9, 2 1524; CORTEX-A72: .fpu crypto-neon-fp-armv8 1525; CORTEX-A72: .eabi_attribute 12, 3 1526; CORTEX-A72-NOT: .eabi_attribute 27 1527; CORTEX-A72: .eabi_attribute 36, 1 1528; CORTEX-A72: .eabi_attribute 42, 1 1529; CORTEX-A72-NOT: .eabi_attribute 44 1530; CORTEX-A72: .eabi_attribute 68, 3 1531; CORTEX-A72-NOT: .eabi_attribute 19 1532;; We default to IEEE 754 compliance 1533; CORTEX-A72: .eabi_attribute 20, 1 1534; CORTEX-A72: .eabi_attribute 21, 1 1535; CORTEX-A72-NOT: .eabi_attribute 22 1536; CORTEX-A72: .eabi_attribute 23, 3 1537; CORTEX-A72: .eabi_attribute 24, 1 1538; CORTEX-A72: .eabi_attribute 25, 1 1539; CORTEX-A72-NOT: .eabi_attribute 28 1540; CORTEX-A72: .eabi_attribute 38, 1 1541 1542; CORTEX-A72-FAST-NOT: .eabi_attribute 19 1543;; The A72 has the ARMv8 FP unit, which always flushes preserving sign. 1544; CORTEX-A72-FAST: .eabi_attribute 20, 2 1545; CORTEX-A72-FAST-NOT: .eabi_attribute 21 1546; CORTEX-A72-FAST-NOT: .eabi_attribute 22 1547; CORTEX-A72-FAST: .eabi_attribute 23, 1 1548 1549; CORTEX-A73: .cpu cortex-a73 1550; CORTEX-A73: .eabi_attribute 6, 14 1551; CORTEX-A73: .eabi_attribute 7, 65 1552; CORTEX-A73: .eabi_attribute 8, 1 1553; CORTEX-A73: .eabi_attribute 9, 2 1554; CORTEX-A73: .fpu crypto-neon-fp-armv8 1555; CORTEX-A73: .eabi_attribute 12, 3 1556; CORTEX-A73-NOT: .eabi_attribute 27 1557; CORTEX-A73: .eabi_attribute 36, 1 1558; CORTEX-A73: .eabi_attribute 42, 1 1559; CORTEX-A73-NOT: .eabi_attribute 44 1560; CORTEX-A73: .eabi_attribute 68, 3 1561; CORTEX-A73-NOT: .eabi_attribute 19 1562;; We default to IEEE 754 compliance 1563; CORTEX-A73: .eabi_attribute 20, 1 1564; CORTEX-A73: .eabi_attribute 21, 1 1565; CORTEX-A73-NOT: .eabi_attribute 22 1566; CORTEX-A73: .eabi_attribute 23, 3 1567; CORTEX-A73: .eabi_attribute 24, 1 1568; CORTEX-A73: .eabi_attribute 25, 1 1569; CORTEX-A73-NOT: .eabi_attribute 28 1570; CORTEX-A73: .eabi_attribute 38, 1 1571; CORTEX-A73: .eabi_attribute 14, 0 1572 1573; EXYNOS-FAST-NOT: .eabi_attribute 19 1574;; The Exynos processors have the ARMv8 FP unit, which always flushes preserving sign. 1575; EXYNOS-FAST: .eabi_attribute 20, 2 1576; EXYNOS-FAST-NOT: .eabi_attribute 21 1577; EXYNOS-FAST-NOT: .eabi_attribute 22 1578; EXYNOS-FAST: .eabi_attribute 23, 1 1579 1580; EXYNOS-M3: .cpu exynos-m3 1581; EXYNOS-M3: .eabi_attribute 6, 14 1582; EXYNOS-M3: .eabi_attribute 7, 65 1583; EXYNOS-M3: .eabi_attribute 8, 1 1584; EXYNOS-M3: .eabi_attribute 9, 2 1585; EXYNOS-M3: .fpu crypto-neon-fp-armv8 1586; EXYNOS-M3: .eabi_attribute 12, 3 1587; EXYNOS-M3-NOT: .eabi_attribute 27 1588; EXYNOS-M3: .eabi_attribute 36, 1 1589; EXYNOS-M3: .eabi_attribute 42, 1 1590; EXYNOS-M3-NOT: .eabi_attribute 44 1591; EXYNOS-M3: .eabi_attribute 68, 3 1592; EXYNOS-M3-NOT: .eabi_attribute 19 1593;; We default to IEEE 754 compliance 1594; EXYNOS-M3: .eabi_attribute 20, 1 1595; EXYNOS-M3: .eabi_attribute 21, 1 1596; EXYNOS-M3-NOT: .eabi_attribute 22 1597; EXYNOS-M3: .eabi_attribute 23, 3 1598; EXYNOS-M3: .eabi_attribute 24, 1 1599; EXYNOS-M3: .eabi_attribute 25, 1 1600; EXYNOS-M3-NOT: .eabi_attribute 28 1601; EXYNOS-M3: .eabi_attribute 38, 1 1602 1603; EXYNOS-M4: .cpu exynos-m4 1604; EXYNOS-M4: .eabi_attribute 6, 14 1605; EXYNOS-M4: .eabi_attribute 7, 65 1606; EXYNOS-M4: .eabi_attribute 8, 1 1607; EXYNOS-M4: .eabi_attribute 9, 2 1608; EXYNOS-M4: .fpu crypto-neon-fp-armv8 1609; EXYNOS-M4: .eabi_attribute 12, 4 1610; EXYNOS-M4-NOT: .eabi_attribute 27 1611; EXYNOS-M4: .eabi_attribute 36, 1 1612; EXYNOS-M4: .eabi_attribute 42, 1 1613; EXYNOS-M4-NOT: .eabi_attribute 44 1614; EXYNOS-M4: .eabi_attribute 68, 3 1615; EXYNOS-M4-NOT: .eabi_attribute 19 1616;; We default to IEEE 754 compliance 1617; EXYNOS-M4: .eabi_attribute 20, 1 1618; EXYNOS-M4: .eabi_attribute 21, 1 1619; EXYNOS-M4-NOT: .eabi_attribute 22 1620; EXYNOS-M4: .eabi_attribute 23, 3 1621; EXYNOS-M4: .eabi_attribute 24, 1 1622; EXYNOS-M4: .eabi_attribute 25, 1 1623; EXYNOS-M4-NOT: .eabi_attribute 28 1624; EXYNOS-M4: .eabi_attribute 38, 1 1625 1626; EXYNOS-M5: .cpu exynos-m5 1627; EXYNOS-M5: .eabi_attribute 6, 14 1628; EXYNOS-M5: .eabi_attribute 7, 65 1629; EXYNOS-M5: .eabi_attribute 8, 1 1630; EXYNOS-M5: .eabi_attribute 9, 2 1631; EXYNOS-M5: .fpu crypto-neon-fp-armv8 1632; EXYNOS-M5: .eabi_attribute 12, 4 1633; EXYNOS-M5-NOT: .eabi_attribute 27 1634; EXYNOS-M5: .eabi_attribute 36, 1 1635; EXYNOS-M5: .eabi_attribute 42, 1 1636; EXYNOS-M5-NOT: .eabi_attribute 44 1637; EXYNOS-M5: .eabi_attribute 68, 3 1638; EXYNOS-M5-NOT: .eabi_attribute 19 1639;; We default to IEEE 754 compliance 1640; EXYNOS-M5: .eabi_attribute 20, 1 1641; EXYNOS-M5: .eabi_attribute 21, 1 1642; EXYNOS-M5-NOT: .eabi_attribute 22 1643; EXYNOS-M5: .eabi_attribute 23, 3 1644; EXYNOS-M5: .eabi_attribute 24, 1 1645; EXYNOS-M5: .eabi_attribute 25, 1 1646; EXYNOS-M5-NOT: .eabi_attribute 28 1647; EXYNOS-M5: .eabi_attribute 38, 1 1648 1649; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16 1650; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16 1651; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd 1652; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16 1653; GENERIC-FPU-NEON-FP16: .fpu neon-fp16 1654 1655; GENERIC-ARMV8_1-A: .eabi_attribute 6, 14 1656; GENERIC-ARMV8_1-A: .eabi_attribute 7, 65 1657; GENERIC-ARMV8_1-A: .eabi_attribute 8, 1 1658; GENERIC-ARMV8_1-A: .eabi_attribute 9, 2 1659; GENERIC-ARMV8_1-A: .fpu crypto-neon-fp-armv8 1660; GENERIC-ARMV8_1-A: .eabi_attribute 12, 4 1661; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 27 1662; GENERIC-ARMV8_1-A: .eabi_attribute 36, 1 1663; GENERIC-ARMV8_1-A: .eabi_attribute 42, 1 1664; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 44 1665; GENERIC-ARMV8_1-A: .eabi_attribute 68, 3 1666; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 19 1667;; We default to IEEE 754 compliance 1668; GENERIC-ARMV8_1-A: .eabi_attribute 20, 1 1669; GENERIC-ARMV8_1-A: .eabi_attribute 21, 1 1670; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 22 1671; GENERIC-ARMV8_1-A: .eabi_attribute 23, 3 1672; GENERIC-ARMV8_1-A: .eabi_attribute 24, 1 1673; GENERIC-ARMV8_1-A: .eabi_attribute 25, 1 1674; GENERIC-ARMV8_1-A-NOT: .eabi_attribute 28 1675; GENERIC-ARMV8_1-A: .eabi_attribute 38, 1 1676 1677; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 19 1678;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign. 1679; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 20, 2 1680; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 21 1681; GENERIC-ARMV8_1-A-FAST-NOT: .eabi_attribute 22 1682; GENERIC-ARMV8_1-A-FAST: .eabi_attribute 23, 1 1683 1684; RELOC-PIC: .eabi_attribute 15, 1 1685; RELOC-PIC: .eabi_attribute 16, 1 1686; RELOC-PIC: .eabi_attribute 17, 2 1687; RELOC-OTHER: .eabi_attribute 17, 1 1688; RELOC-ROPI-NOT: .eabi_attribute 15, 1689; RELOC-ROPI: .eabi_attribute 16, 1 1690; RELOC-ROPI: .eabi_attribute 17, 1 1691; RELOC-RWPI: .eabi_attribute 15, 2 1692; RELOC-RWPI-NOT: .eabi_attribute 16, 1693; RELOC-RWPI: .eabi_attribute 17, 1 1694; RELOC-ROPI-RWPI: .eabi_attribute 15, 2 1695; RELOC-ROPI-RWPI: .eabi_attribute 16, 1 1696; RELOC-ROPI-RWPI: .eabi_attribute 17, 1 1697 1698; PCS-R9-USE: .eabi_attribute 14, 0 1699; PCS-R9-RESERVE: .eabi_attribute 14, 3 1700 1701; ARMv8R: .eabi_attribute 67, "2.09" @ Tag_conformance 1702; ARMv8R: .eabi_attribute 6, 15 @ Tag_CPU_arch 1703; ARMv8R: .eabi_attribute 7, 82 @ Tag_CPU_arch_profile 1704; ARMv8R: .eabi_attribute 8, 1 @ Tag_ARM_ISA_use 1705; ARMv8R: .eabi_attribute 9, 2 @ Tag_THUMB_ISA_use 1706; ARMv8R-NOFPU-NOT: .fpu 1707; ARMv8R-NOFPU-NOT: .eabi_attribute 12 1708; ARMv8R-SP: .fpu fpv5-sp-d16 1709; ARMv8R-SP-NOT: .eabi_attribute 12 1710; ARMv8R-NEON: .fpu neon-fp-armv8 1711; ARMv8R-NEON: .eabi_attribute 12, 3 @ Tag_Advanced_SIMD_arch 1712; ARMv8R-NOFPU-NOT: .eabi_attribute 27 1713; ARMv8R-SP: .eabi_attribute 27, 1 @ Tag_ABI_HardFP_use 1714; ARMv8R-NEON-NOT: .eabi_attribute 27 1715; ARMv8R-NOFPU-NOT: .eabi_attribute 36 1716; ARMv8R-SP: .eabi_attribute 36, 1 @ Tag_FP_HP_extension 1717; ARMv8R-NEON: .eabi_attribute 36, 1 @ Tag_FP_HP_extension 1718; ARMv8R: .eabi_attribute 42, 1 @ Tag_MPextension_use 1719; ARMv8R: .eabi_attribute 68, 2 @ Tag_Virtualization_use 1720; ARMv8R: .eabi_attribute 38, 1 @ Tag_ABI_FP_16bit_format 1721; ARMv8R: .eabi_attribute 14, 0 @ Tag_ABI_PCS_R9_use 1722 1723; ARMv81M-MAIN: .eabi_attribute 6, 21 @ Tag_CPU_arch 1724; ARMv81M-MAIN-NOT: .eabi_attribute 48 1725; ARMv81M-MAIN-MVEINT: .eabi_attribute 6, 21 @ Tag_CPU_arch 1726; ARMv81M-MAIN-MVEINT: .eabi_attribute 48, 1 @ Tag_MVE_arch 1727; ARMv81M-MAIN-MVEFP: .eabi_attribute 6, 21 @ Tag_CPU_arch 1728; ARMv81M-MAIN-MVEFP: .eabi_attribute 48, 2 @ Tag_MVE_arch 1729; ARMv81M-MAIN-PACBTI: .eabi_attribute 50, 2 @ Tag_PAC_extension 1730; ARMv81M-MAIN-PACBTI: .eabi_attribute 52, 2 @ Tag_BTI_extension 1731 1732; CORTEX-M55: .cpu cortex-m55 1733; CORTEX-M55: .eabi_attribute 6, 21 1734; CORTEX-M55: .eabi_attribute 7, 77 1735; CORTEX-M55: .eabi_attribute 8, 0 1736; CORTEX-M55: .eabi_attribute 9, 3 1737; CORTEX-M55: .fpu fpv5-d16 1738; CORTEX-M55: .eabi_attribute 36, 1 1739; CORTEX-M55-NOT: .eabi_attribute 44 1740; CORTEX-M55: .eabi_attribute 46, 1 1741; CORTEX-M55: .eabi_attribute 34, 1 1742; CORTEX-M55: .eabi_attribute 17, 1 1743; CORTEX-M55-NOT: .eabi_attribute 19 1744; CORTEX-M55: .eabi_attribute 20, 1 1745; CORTEX-M55: .eabi_attribute 21, 1 1746; CORTEX-M55: .eabi_attribute 23, 3 1747; CORTEX-M55: .eabi_attribute 24, 1 1748; CORTEX-M55: .eabi_attribute 25, 1 1749; CORTEX-M55-NOT: .eabi_attribute 28 1750; CORTEX-M55: .eabi_attribute 38, 1 1751; CORTEX-M55: .eabi_attribute 14, 0 1752 1753; CORTEX-M85: .cpu cortex-m85 1754; CORTEX-M85: .eabi_attribute 6, 21 @ Tag_CPU_arch 1755; CORTEX-M85: .eabi_attribute 7, 77 @ Tag_CPU_arch_profile 1756; CORTEX-M85: .eabi_attribute 8, 0 @ Tag_ARM_ISA_use 1757; CORTEX-M85: .eabi_attribute 9, 3 @ Tag_THUMB_ISA_use 1758; CORTEX-M85: .fpu fpv5-d16 1759; CORTEX-M85: .eabi_attribute 36, 1 @ Tag_FP_HP_extension 1760; CORTEX-M85: .eabi_attribute 48, 2 @ Tag_MVE_arch 1761; CORTEX-M85: .eabi_attribute 46, 1 @ Tag_DSP_extension 1762; CORTEX-M85: .eabi_attribute 34, 1 @ Tag_CPU_unaligned_access 1763; CORTEX-M85: .eabi_attribute 50, 2 @ Tag_PAC_extension 1764; CORTEX-M85: .eabi_attribute 52, 2 @ Tag_BTI_extension 1765 1766; CHECK-NO-PACBTI-NOT: .eabi_attribute 50 1767; CHECK-NO-PACBTI-NOT: .eabi_attribute 52 1768 1769 1770define i32 @f(i64 %z) { 1771 ret i32 0 1772} 1773