xref: /llvm-project/llvm/test/CodeGen/ARM/build-attributes.ll (revision 0140f45964edb441e0c3b020f7304015af9495cc) 
1; This tests that MC/asm header conversion is smooth and that the
2; build attributes are correct
3
4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE
5; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6
6; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST
7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S
13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast  | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST
17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
20; RUN: llc < %s -mtriple=armv7-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST
21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
22; RUN: llc < %s -mtriple=armv8-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST
23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
30; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE
31; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE
32; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP
33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-SOFT-FAST
41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A8-HARD
42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-HARD-FAST
43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
54; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
57; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST
58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
60; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST
61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
62; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
63
64; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16
65; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16
66; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD
67; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16
68; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16
69
70; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
71; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0
72; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
73; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
74; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0PLUS
75; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
76; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
77; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M1
78; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
79; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
80; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000
81; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
82; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
83; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
84; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
85; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
86; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
87; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
88; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
89; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
90; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
91; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
92; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
93; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
94; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
95; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
96; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
97; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
98; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
99; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
100; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
101; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
102; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
103; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
104; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
105; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
106; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
107; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
108; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35
109; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST
110; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
111; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
112; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
113; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
114; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
115; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST
116; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
117; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
118; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
119; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
120; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
121; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=EXYNOS-M1
122; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
123; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
124; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
125; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
126; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s  --check-prefix=CORTEX-A7-CHECK
127; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s  --check-prefix=CORTEX-A7-CHECK-FAST
128; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
129; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
130; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
131; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
132; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
133; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
134; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
135; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
136; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=default | FileCheck %s --check-prefix=RELOC-OTHER
137; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
138; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER
139; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE
140; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE
141
142; ARMv8.1a (AArch32)
143; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
144; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
145; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
146; ARMv8a (AArch32)
147; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
148; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
149; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
150; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
151; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
152; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
153; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
154; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
155
156; ARMv7a
157; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
158; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
159; ARMv7r
160; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
161; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
162; ARMv7m
163; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
164; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
165; ARMv6
166; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
167; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
168; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
169; ARMv6k
170; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
171; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
172; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
173; ARMv6m
174; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
175; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
176; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
177; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
178; ARMv5
179; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN
180; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
181
182; XSCALE:      .eabi_attribute 6, 5
183; XSCALE:      .eabi_attribute 8, 1
184; XSCALE:      .eabi_attribute 9, 1
185
186; DYN-ROUNDING: .eabi_attribute 19, 1
187
188; V6:   .eabi_attribute 6, 6
189; V6:   .eabi_attribute 8, 1
190;; We assume round-to-nearest by default (matches GCC)
191; V6-NOT:   .eabi_attribute 19
192;; The default choice made by llc is for a V6 CPU without an FPU.
193;; This is not an interesting detail, but for such CPUs, the default intention is to use
194;; software floating-point support. The choice is not important for targets without
195;; FPU support!
196; V6:   .eabi_attribute 20, 1
197; V6:   .eabi_attribute 21, 1
198; V6-NOT:   .eabi_attribute 22
199; V6:   .eabi_attribute 23, 3
200; V6:   .eabi_attribute 24, 1
201; V6:   .eabi_attribute 25, 1
202; V6-NOT:   .eabi_attribute 27
203; V6-NOT:   .eabi_attribute 28
204; V6-NOT:    .eabi_attribute 36
205; V6:    .eabi_attribute 38, 1
206; V6-NOT:    .eabi_attribute 42
207; V6-NOT:  .eabi_attribute 44
208; V6-NOT:    .eabi_attribute 68
209
210; V6-FAST-NOT:   .eabi_attribute 19
211;; Despite the V6 CPU having no FPU by default, we chose to flush to
212;; positive zero here. There's no hardware support doing this, but the
213;; fast maths software library might.
214; V6-FAST-NOT:   .eabi_attribute 20
215; V6-FAST-NOT:   .eabi_attribute 21
216; V6-FAST-NOT:   .eabi_attribute 22
217; V6-FAST:   .eabi_attribute 23, 1
218
219;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for
220;; V6-M, however we don't model the OS extension so this is fine.
221; V6M:  .eabi_attribute 6, 12
222; V6M-NOT:  .eabi_attribute 7
223; V6M:  .eabi_attribute 8, 0
224; V6M:  .eabi_attribute 9, 1
225; V6M-NOT:   .eabi_attribute 19
226;; The default choice made by llc is for a V6M CPU without an FPU.
227;; This is not an interesting detail, but for such CPUs, the default intention is to use
228;; software floating-point support. The choice is not important for targets without
229;; FPU support!
230; V6M:  .eabi_attribute 20, 1
231; V6M:   .eabi_attribute 21, 1
232; V6M-NOT:   .eabi_attribute 22
233; V6M:   .eabi_attribute 23, 3
234; V6M:  .eabi_attribute 24, 1
235; V6M:  .eabi_attribute 25, 1
236; V6M-NOT:  .eabi_attribute 27
237; V6M-NOT:  .eabi_attribute 28
238; V6M-NOT:  .eabi_attribute 36
239; V6M:  .eabi_attribute 38, 1
240; V6M-NOT:  .eabi_attribute 42
241; V6M-NOT:  .eabi_attribute 44
242; V6M-NOT:  .eabi_attribute 68
243
244; V6M-FAST-NOT:   .eabi_attribute 19
245;; Despite the V6M CPU having no FPU by default, we chose to flush to
246;; positive zero here. There's no hardware support doing this, but the
247;; fast maths software library might.
248; V6M-FAST-NOT:  .eabi_attribute 20
249; V6M-FAST-NOT:   .eabi_attribute 21
250; V6M-FAST-NOT:   .eabi_attribute 22
251; V6M-FAST:   .eabi_attribute 23, 1
252
253; ARM1156T2F-S: .cpu arm1156t2f-s
254; ARM1156T2F-S: .eabi_attribute 6, 8
255; ARM1156T2F-S: .eabi_attribute 8, 1
256; ARM1156T2F-S: .eabi_attribute 9, 2
257; ARM1156T2F-S: .fpu vfpv2
258; ARM1156T2F-S-NOT:   .eabi_attribute 19
259;; We default to IEEE 754 compliance
260; ARM1156T2F-S: .eabi_attribute 20, 1
261; ARM1156T2F-S: .eabi_attribute 21, 1
262; ARM1156T2F-S-NOT: .eabi_attribute 22
263; ARM1156T2F-S: .eabi_attribute 23, 3
264; ARM1156T2F-S: .eabi_attribute 24, 1
265; ARM1156T2F-S: .eabi_attribute 25, 1
266; ARM1156T2F-S-NOT: .eabi_attribute 27
267; ARM1156T2F-S-NOT: .eabi_attribute 28
268; ARM1156T2F-S-NOT: .eabi_attribute 36
269; ARM1156T2F-S: .eabi_attribute 38, 1
270; ARM1156T2F-S-NOT:    .eabi_attribute 42
271; ARM1156T2F-S-NOT:    .eabi_attribute 44
272; ARM1156T2F-S-NOT:    .eabi_attribute 68
273
274; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 19
275;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
276;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
277;; select. LLVM historically picks 0.
278; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
279; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 21
280; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 22
281; ARM1156T2F-S-FAST:   .eabi_attribute 23, 1
282
283; V7M:  .eabi_attribute 6, 10
284; V7M:  .eabi_attribute 7, 77
285; V7M:  .eabi_attribute 8, 0
286; V7M:  .eabi_attribute 9, 2
287; V7M-NOT:   .eabi_attribute 19
288;; The default choice made by llc is for a V7M CPU without an FPU.
289;; This is not an interesting detail, but for such CPUs, the default intention is to use
290;; software floating-point support. The choice is not important for targets without
291;; FPU support!
292; V7M:  .eabi_attribute 20, 1
293; V7M: .eabi_attribute 21, 1
294; V7M-NOT: .eabi_attribute 22
295; V7M: .eabi_attribute 23, 3
296; V7M:  .eabi_attribute 24, 1
297; V7M:  .eabi_attribute 25, 1
298; V7M-NOT:  .eabi_attribute 27
299; V7M-NOT:  .eabi_attribute 28
300; V7M-NOT:  .eabi_attribute 36
301; V7M:  .eabi_attribute 38, 1
302; V7M-NOT:  .eabi_attribute 42
303; V7M-NOT:  .eabi_attribute 44
304; V7M-NOT:  .eabi_attribute 68
305
306; V7M-FAST-NOT:   .eabi_attribute 19
307;; Despite the V7M CPU having no FPU by default, we chose to flush
308;; preserving sign. This matches what the hardware would do in the
309;; architecture revision were to exist on the current target.
310; V7M-FAST:  .eabi_attribute 20, 2
311; V7M-FAST-NOT:   .eabi_attribute 21
312; V7M-FAST-NOT:   .eabi_attribute 22
313; V7M-FAST:   .eabi_attribute 23, 1
314
315; V7:      .syntax unified
316; V7: .eabi_attribute 6, 10
317; V7-NOT:   .eabi_attribute 19
318;; In safe-maths mode we default to an IEEE 754 compliant choice.
319; V7: .eabi_attribute 20, 1
320; V7: .eabi_attribute 21, 1
321; V7-NOT: .eabi_attribute 22
322; V7: .eabi_attribute 23, 3
323; V7: .eabi_attribute 24, 1
324; V7: .eabi_attribute 25, 1
325; V7-NOT: .eabi_attribute 27
326; V7-NOT: .eabi_attribute 28
327; V7-NOT: .eabi_attribute 36
328; V7: .eabi_attribute 38, 1
329; V7-NOT:    .eabi_attribute 42
330; V7-NOT:    .eabi_attribute 44
331; V7-NOT:    .eabi_attribute 68
332
333; V7-FAST-NOT:   .eabi_attribute 19
334;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
335;; denormals to zero preserving the sign.
336; V7-FAST: .eabi_attribute 20, 2
337; V7-FAST-NOT:   .eabi_attribute 21
338; V7-FAST-NOT:   .eabi_attribute 22
339; V7-FAST:   .eabi_attribute 23, 1
340
341; V8:      .syntax unified
342; V8: .eabi_attribute 67, "2.09"
343; V8: .eabi_attribute 6, 14
344; V8-NOT:   .eabi_attribute 19
345; V8: .eabi_attribute 20, 1
346; V8: .eabi_attribute 21, 1
347; V8-NOT: .eabi_attribute 22
348; V8: .eabi_attribute 23, 3
349; V8-NOT: .eabi_attribute 44
350
351; V8-FAST-NOT:   .eabi_attribute 19
352;; The default does have an FPU, and for V8-A, it flushes preserving sign.
353; V8-FAST: .eabi_attribute 20, 2
354; V8-FAST-NOT: .eabi_attribute 21
355; V8-FAST-NOT: .eabi_attribute 22
356; V8-FAST: .eabi_attribute 23, 1
357
358; Vt8:     .syntax unified
359; Vt8: .eabi_attribute 6, 14
360; Vt8-NOT:   .eabi_attribute 19
361; Vt8: .eabi_attribute 20, 1
362; Vt8: .eabi_attribute 21, 1
363; Vt8-NOT: .eabi_attribute 22
364; Vt8: .eabi_attribute 23, 3
365
366; V8-FPARMv8:      .syntax unified
367; V8-FPARMv8: .eabi_attribute 6, 14
368; V8-FPARMv8: .fpu fp-armv8
369
370; V8-NEON:      .syntax unified
371; V8-NEON: .eabi_attribute 6, 14
372; V8-NEON: .fpu neon
373; V8-NEON: .eabi_attribute 12, 3
374
375; V8-FPARMv8-NEON:      .syntax unified
376; V8-FPARMv8-NEON: .eabi_attribute 6, 14
377; V8-FPARMv8-NEON: .fpu neon-fp-armv8
378; V8-FPARMv8-NEON: .eabi_attribute 12, 3
379
380; V8-FPARMv8-NEON-CRYPTO:      .syntax unified
381; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
382; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
383; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
384
385; V8MBASELINE: .syntax unified
386; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline
387; V8MBASELINE: .eabi_attribute 6, 16
388; '7' is Tag_CPU_arch_profile, '77' is 'M'
389; V8MBASELINE: .eabi_attribute 7, 77
390; '8' is Tag_ARM_ISA_use
391; V8MBASELINE: .eabi_attribute 8, 0
392; '9' is Tag_Thumb_ISA_use
393; V8MBASELINE: .eabi_attribute 9, 3
394
395; V8MMAINLINE: .syntax unified
396; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline
397; V8MMAINLINE: .eabi_attribute 6, 17
398; V8MMAINLINE: .eabi_attribute 7, 77
399; V8MMAINLINE: .eabi_attribute 8, 0
400; V8MMAINLINE: .eabi_attribute 9, 3
401; V8MMAINLINE_DSP-NOT: .eabi_attribute 46
402
403; V8MMAINLINE_DSP: .syntax unified
404; V8MBASELINE_DSP: .eabi_attribute 6, 17
405; V8MBASELINE_DSP: .eabi_attribute 7, 77
406; V8MMAINLINE_DSP: .eabi_attribute 8, 0
407; V8MMAINLINE_DSP: .eabi_attribute 9, 3
408; V8MMAINLINE_DSP: .eabi_attribute 46, 1
409
410; Tag_CPU_unaligned_access
411; NO-STRICT-ALIGN: .eabi_attribute 34, 1
412; STRICT-ALIGN: .eabi_attribute 34, 0
413
414; Tag_CPU_arch  'ARMv7'
415; CORTEX-A7-CHECK: .eabi_attribute      6, 10
416; CORTEX-A7-NOFPU: .eabi_attribute      6, 10
417
418; CORTEX-A7-FPUV4: .eabi_attribute      6, 10
419
420; Tag_CPU_arch_profile 'A'
421; CORTEX-A7-CHECK: .eabi_attribute      7, 65
422; CORTEX-A7-NOFPU: .eabi_attribute      7, 65
423; CORTEX-A7-FPUV4: .eabi_attribute      7, 65
424
425; Tag_ARM_ISA_use
426; CORTEX-A7-CHECK: .eabi_attribute      8, 1
427; CORTEX-A7-NOFPU: .eabi_attribute      8, 1
428; CORTEX-A7-FPUV4: .eabi_attribute      8, 1
429
430; Tag_THUMB_ISA_use
431; CORTEX-A7-CHECK: .eabi_attribute      9, 2
432; CORTEX-A7-NOFPU: .eabi_attribute      9, 2
433; CORTEX-A7-FPUV4: .eabi_attribute      9, 2
434
435; CORTEX-A7-CHECK: .fpu neon-vfpv4
436; CORTEX-A7-NOFPU-NOT: .fpu
437; CORTEX-A7-FPUV4: .fpu vfpv4
438
439; CORTEX-A7-CHECK-NOT:   .eabi_attribute 19
440; Tag_ABI_FP_denormal
441;; We default to IEEE 754 compliance
442; CORTEX-A7-CHECK: .eabi_attribute      20, 1
443;; The A7 has VFPv3 support by default, so flush preserving sign.
444; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
445; CORTEX-A7-NOFPU: .eabi_attribute      20, 1
446;; Despite there being no FPU, we chose to flush to zero preserving
447;; sign. This matches what the hardware would do for this architecture
448;; revision.
449; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
450; CORTEX-A7-FPUV4: .eabi_attribute      20, 1
451;; The VFPv4 FPU flushes preserving sign.
452; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
453
454; Tag_ABI_FP_exceptions
455; CORTEX-A7-CHECK: .eabi_attribute      21, 1
456; CORTEX-A7-NOFPU: .eabi_attribute      21, 1
457; CORTEX-A7-FPUV4: .eabi_attribute      21, 1
458
459; Tag_ABI_FP_user_exceptions
460; CORTEX-A7-CHECK-NOT: .eabi_attribute      22
461; CORTEX-A7-NOFPU-NOT: .eabi_attribute      22
462; CORTEX-A7-FPUV4-NOT: .eabi_attribute      22
463
464; Tag_ABI_FP_number_model
465; CORTEX-A7-CHECK: .eabi_attribute      23, 3
466; CORTEX-A7-NOFPU: .eabi_attribute      23, 3
467; CORTEX-A7-FPUV4: .eabi_attribute      23, 3
468
469; Tag_ABI_align_needed
470; CORTEX-A7-CHECK: .eabi_attribute      24, 1
471; CORTEX-A7-NOFPU: .eabi_attribute      24, 1
472; CORTEX-A7-FPUV4: .eabi_attribute      24, 1
473
474; Tag_ABI_align_preserved
475; CORTEX-A7-CHECK: .eabi_attribute      25, 1
476; CORTEX-A7-NOFPU: .eabi_attribute      25, 1
477; CORTEX-A7-FPUV4: .eabi_attribute      25, 1
478
479; Tag_FP_HP_extension
480; CORTEX-A7-CHECK: .eabi_attribute      36, 1
481; CORTEX-A7-NOFPU-NOT: .eabi_attribute  36
482; CORTEX-A7-FPUV4: .eabi_attribute      36, 1
483
484; Tag_FP_16bit_format
485; CORTEX-A7-CHECK: .eabi_attribute      38, 1
486; CORTEX-A7-NOFPU: .eabi_attribute      38, 1
487; CORTEX-A7-FPUV4: .eabi_attribute      38, 1
488
489; Tag_MPextension_use
490; CORTEX-A7-CHECK: .eabi_attribute      42, 1
491; CORTEX-A7-NOFPU: .eabi_attribute      42, 1
492; CORTEX-A7-FPUV4: .eabi_attribute      42, 1
493
494; Tag_DIV_use
495; CORTEX-A7-CHECK: .eabi_attribute      44, 2
496; CORTEX-A7-NOFPU: .eabi_attribute      44, 2
497; CORTEX-A7-FPUV4: .eabi_attribute      44, 2
498
499; Tag_DSP_extension
500; CORTEX-A7-CHECK-NOT: .eabi_attribute      46
501
502; Tag_Virtualization_use
503; CORTEX-A7-CHECK: .eabi_attribute      68, 3
504; CORTEX-A7-NOFPU: .eabi_attribute      68, 3
505; CORTEX-A7-FPUV4: .eabi_attribute      68, 3
506
507; CORTEX-A5-DEFAULT:        .cpu    cortex-a5
508; CORTEX-A5-DEFAULT:        .eabi_attribute 6, 10
509; CORTEX-A5-DEFAULT:        .eabi_attribute 7, 65
510; CORTEX-A5-DEFAULT:        .eabi_attribute 8, 1
511; CORTEX-A5-DEFAULT:        .eabi_attribute 9, 2
512; CORTEX-A5-DEFAULT:        .fpu    neon-vfpv4
513; CORTEX-A5-NOT:   .eabi_attribute 19
514;; We default to IEEE 754 compliance
515; CORTEX-A5-DEFAULT:        .eabi_attribute 20, 1
516; CORTEX-A5-DEFAULT:        .eabi_attribute 21, 1
517; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 22
518; CORTEX-A5-DEFAULT:        .eabi_attribute 23, 3
519; CORTEX-A5-DEFAULT:        .eabi_attribute 24, 1
520; CORTEX-A5-DEFAULT:        .eabi_attribute 25, 1
521; CORTEX-A5-DEFAULT:        .eabi_attribute 42, 1
522; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 44
523; CORTEX-A5-DEFAULT:        .eabi_attribute 68, 1
524
525; CORTEX-A5-DEFAULT-FAST-NOT:   .eabi_attribute 19
526;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math
527;; is given.
528; CORTEX-A5-DEFAULT-FAST:        .eabi_attribute 20, 2
529; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21
530; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22
531; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1
532
533; CORTEX-A5-NONEON:        .cpu    cortex-a5
534; CORTEX-A5-NONEON:        .eabi_attribute 6, 10
535; CORTEX-A5-NONEON:        .eabi_attribute 7, 65
536; CORTEX-A5-NONEON:        .eabi_attribute 8, 1
537; CORTEX-A5-NONEON:        .eabi_attribute 9, 2
538; CORTEX-A5-NONEON:        .fpu    vfpv4-d16
539;; We default to IEEE 754 compliance
540; CORTEX-A5-NONEON:        .eabi_attribute 20, 1
541; CORTEX-A5-NONEON:        .eabi_attribute 21, 1
542; CORTEX-A5-NONEON-NOT:    .eabi_attribute 22
543; CORTEX-A5-NONEON:        .eabi_attribute 23, 3
544; CORTEX-A5-NONEON:        .eabi_attribute 24, 1
545; CORTEX-A5-NONEON:        .eabi_attribute 25, 1
546; CORTEX-A5-NONEON:        .eabi_attribute 42, 1
547; CORTEX-A5-NONEON:        .eabi_attribute 68, 1
548
549; CORTEX-A5-NONEON-FAST-NOT:   .eabi_attribute 19
550;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
551;; is given.
552; CORTEX-A5-NONEON-FAST:        .eabi_attribute 20, 2
553; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21
554; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22
555; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1
556
557; CORTEX-A5-NOFPU:        .cpu    cortex-a5
558; CORTEX-A5-NOFPU:        .eabi_attribute 6, 10
559; CORTEX-A5-NOFPU:        .eabi_attribute 7, 65
560; CORTEX-A5-NOFPU:        .eabi_attribute 8, 1
561; CORTEX-A5-NOFPU:        .eabi_attribute 9, 2
562; CORTEX-A5-NOFPU-NOT:    .fpu
563; CORTEX-A5-NOFPU-NOT:   .eabi_attribute 19
564;; We default to IEEE 754 compliance
565; CORTEX-A5-NOFPU:        .eabi_attribute 20, 1
566; CORTEX-A5-NOFPU:        .eabi_attribute 21, 1
567; CORTEX-A5-NOFPU-NOT:    .eabi_attribute 22
568; CORTEX-A5-NOFPU:        .eabi_attribute 23, 3
569; CORTEX-A5-NOFPU:        .eabi_attribute 24, 1
570; CORTEX-A5-NOFPU:        .eabi_attribute 25, 1
571; CORTEX-A5-NOFPU:        .eabi_attribute 42, 1
572; CORTEX-A5-NOFPU:        .eabi_attribute 68, 1
573
574; CORTEX-A5-NOFPU-FAST-NOT:   .eabi_attribute 19
575;; Despite there being no FPU, we chose to flush to zero preserving
576;; sign. This matches what the hardware would do for this architecture
577;; revision.
578; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
579; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21
580; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22
581; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1
582
583; CORTEX-A8-SOFT:  .cpu cortex-a8
584; CORTEX-A8-SOFT:  .eabi_attribute 6, 10
585; CORTEX-A8-SOFT:  .eabi_attribute 7, 65
586; CORTEX-A8-SOFT:  .eabi_attribute 8, 1
587; CORTEX-A8-SOFT:  .eabi_attribute 9, 2
588; CORTEX-A8-SOFT:  .fpu neon
589; CORTEX-A8-SOFT-NOT:   .eabi_attribute 19
590;; We default to IEEE 754 compliance
591; CORTEX-A8-SOFT:  .eabi_attribute 20, 1
592; CORTEX-A8-SOFT:  .eabi_attribute 21, 1
593; CORTEX-A8-SOFT-NOT:  .eabi_attribute 22
594; CORTEX-A8-SOFT:  .eabi_attribute 23, 3
595; CORTEX-A8-SOFT:  .eabi_attribute 24, 1
596; CORTEX-A8-SOFT:  .eabi_attribute 25, 1
597; CORTEX-A8-SOFT-NOT:  .eabi_attribute 27
598; CORTEX-A8-SOFT-NOT:  .eabi_attribute 28
599; CORTEX-A8-SOFT-NOT:  .eabi_attribute 36, 1
600; CORTEX-A8-SOFT:  .eabi_attribute 38, 1
601; CORTEX-A8-SOFT-NOT:  .eabi_attribute 42, 1
602; CORTEX-A8-SOFT-NOT:  .eabi_attribute 44
603; CORTEX-A8-SOFT:  .eabi_attribute 68, 1
604
605; CORTEX-A9-SOFT:  .cpu cortex-a9
606; CORTEX-A9-SOFT:  .eabi_attribute 6, 10
607; CORTEX-A9-SOFT:  .eabi_attribute 7, 65
608; CORTEX-A9-SOFT:  .eabi_attribute 8, 1
609; CORTEX-A9-SOFT:  .eabi_attribute 9, 2
610; CORTEX-A9-SOFT:  .fpu neon
611; CORTEX-A9-SOFT-NOT:   .eabi_attribute 19
612;; We default to IEEE 754 compliance
613; CORTEX-A9-SOFT:  .eabi_attribute 20, 1
614; CORTEX-A9-SOFT:  .eabi_attribute 21, 1
615; CORTEX-A9-SOFT-NOT:  .eabi_attribute 22
616; CORTEX-A9-SOFT:  .eabi_attribute 23, 3
617; CORTEX-A9-SOFT:  .eabi_attribute 24, 1
618; CORTEX-A9-SOFT:  .eabi_attribute 25, 1
619; CORTEX-A9-SOFT-NOT:  .eabi_attribute 27
620; CORTEX-A9-SOFT-NOT:  .eabi_attribute 28
621; CORTEX-A9-SOFT:  .eabi_attribute 36, 1
622; CORTEX-A9-SOFT:  .eabi_attribute 38, 1
623; CORTEX-A9-SOFT:  .eabi_attribute 42, 1
624; CORTEX-A9-SOFT-NOT:  .eabi_attribute 44
625; CORTEX-A9-SOFT:  .eabi_attribute 68, 1
626
627; CORTEX-A8-SOFT-FAST-NOT:   .eabi_attribute 19
628; CORTEX-A9-SOFT-FAST-NOT:   .eabi_attribute 19
629;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
630;; -ffast-math is specified.
631; CORTEX-A8-SOFT-FAST:  .eabi_attribute 20, 2
632; CORTEX-A9-SOFT-FAST:  .eabi_attribute 20, 2
633; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21
634; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22
635; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1
636
637; CORTEX-A8-HARD:  .cpu cortex-a8
638; CORTEX-A8-HARD:  .eabi_attribute 6, 10
639; CORTEX-A8-HARD:  .eabi_attribute 7, 65
640; CORTEX-A8-HARD:  .eabi_attribute 8, 1
641; CORTEX-A8-HARD:  .eabi_attribute 9, 2
642; CORTEX-A8-HARD:  .fpu neon
643; CORTEX-A8-HARD-NOT:   .eabi_attribute 19
644;; We default to IEEE 754 compliance
645; CORTEX-A8-HARD:  .eabi_attribute 20, 1
646; CORTEX-A8-HARD:  .eabi_attribute 21, 1
647; CORTEX-A8-HARD-NOT:  .eabi_attribute 22
648; CORTEX-A8-HARD:  .eabi_attribute 23, 3
649; CORTEX-A8-HARD:  .eabi_attribute 24, 1
650; CORTEX-A8-HARD:  .eabi_attribute 25, 1
651; CORTEX-A8-HARD-NOT:  .eabi_attribute 27
652; CORTEX-A8-HARD:  .eabi_attribute 28, 1
653; CORTEX-A8-HARD-NOT:  .eabi_attribute 36, 1
654; CORTEX-A8-HARD:  .eabi_attribute 38, 1
655; CORTEX-A8-HARD-NOT:  .eabi_attribute 42, 1
656; CORTEX-A8-HARD:  .eabi_attribute 68, 1
657
658
659
660; CORTEX-A9-HARD:  .cpu cortex-a9
661; CORTEX-A9-HARD:  .eabi_attribute 6, 10
662; CORTEX-A9-HARD:  .eabi_attribute 7, 65
663; CORTEX-A9-HARD:  .eabi_attribute 8, 1
664; CORTEX-A9-HARD:  .eabi_attribute 9, 2
665; CORTEX-A9-HARD:  .fpu neon
666; CORTEX-A9-HARD-NOT:   .eabi_attribute 19
667;; We default to IEEE 754 compliance
668; CORTEX-A9-HARD:  .eabi_attribute 20, 1
669; CORTEX-A9-HARD:  .eabi_attribute 21, 1
670; CORTEX-A9-HARD-NOT:  .eabi_attribute 22
671; CORTEX-A9-HARD:  .eabi_attribute 23, 3
672; CORTEX-A9-HARD:  .eabi_attribute 24, 1
673; CORTEX-A9-HARD:  .eabi_attribute 25, 1
674; CORTEX-A9-HARD-NOT:  .eabi_attribute 27
675; CORTEX-A9-HARD:  .eabi_attribute 28, 1
676; CORTEX-A9-HARD:  .eabi_attribute 36, 1
677; CORTEX-A9-HARD:  .eabi_attribute 38, 1
678; CORTEX-A9-HARD:  .eabi_attribute 42, 1
679; CORTEX-A9-HARD:  .eabi_attribute 68, 1
680
681; CORTEX-A8-HARD-FAST-NOT:   .eabi_attribute 19
682;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when
683;; -ffast-math is specified.
684; CORTEX-A8-HARD-FAST:  .eabi_attribute 20, 2
685; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 21
686; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 22
687; CORTEX-A8-HARD-FAST:  .eabi_attribute 23, 1
688
689; CORTEX-A9-HARD-FAST-NOT:   .eabi_attribute 19
690;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
691;; -ffast-math is specified.
692; CORTEX-A9-HARD-FAST:  .eabi_attribute 20, 2
693; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 21
694; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 22
695; CORTEX-A9-HARD-FAST:  .eabi_attribute 23, 1
696
697; CORTEX-A12-DEFAULT:  .cpu cortex-a12
698; CORTEX-A12-DEFAULT:  .eabi_attribute 6, 10
699; CORTEX-A12-DEFAULT:  .eabi_attribute 7, 65
700; CORTEX-A12-DEFAULT:  .eabi_attribute 8, 1
701; CORTEX-A12-DEFAULT:  .eabi_attribute 9, 2
702; CORTEX-A12-DEFAULT:  .fpu neon-vfpv4
703; CORTEX-A12-DEFAULT-NOT:   .eabi_attribute 19
704;; We default to IEEE 754 compliance
705; CORTEX-A12-DEFAULT:  .eabi_attribute 20, 1
706; CORTEX-A12-DEFAULT:  .eabi_attribute 21, 1
707; CORTEX-A12-DEFAULT-NOT:  .eabi_attribute 22
708; CORTEX-A12-DEFAULT:  .eabi_attribute 23, 3
709; CORTEX-A12-DEFAULT:  .eabi_attribute 24, 1
710; CORTEX-A12-DEFAULT:  .eabi_attribute 25, 1
711; CORTEX-A12-DEFAULT:  .eabi_attribute 42, 1
712; CORTEX-A12-DEFAULT:  .eabi_attribute 44, 2
713; CORTEX-A12-DEFAULT:  .eabi_attribute 68, 3
714
715; CORTEX-A12-DEFAULT-FAST-NOT:   .eabi_attribute 19
716;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when
717;; -ffast-math is specified.
718; CORTEX-A12-DEFAULT-FAST:  .eabi_attribute 20, 2
719; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 21
720; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 22
721; CORTEX-A12-HARD-FAST:  .eabi_attribute 23, 1
722
723; CORTEX-A12-NOFPU:  .cpu cortex-a12
724; CORTEX-A12-NOFPU:  .eabi_attribute 6, 10
725; CORTEX-A12-NOFPU:  .eabi_attribute 7, 65
726; CORTEX-A12-NOFPU:  .eabi_attribute 8, 1
727; CORTEX-A12-NOFPU:  .eabi_attribute 9, 2
728; CORTEX-A12-NOFPU-NOT:  .fpu
729; CORTEX-A12-NOFPU-NOT:   .eabi_attribute 19
730;; We default to IEEE 754 compliance
731; CORTEX-A12-NOFPU:  .eabi_attribute 20, 1
732; CORTEX-A12-NOFPU:  .eabi_attribute 21, 1
733; CORTEX-A12-NOFPU-NOT:  .eabi_attribute 22
734; CORTEX-A12-NOFPU:  .eabi_attribute 23, 3
735; CORTEX-A12-NOFPU:  .eabi_attribute 24, 1
736; CORTEX-A12-NOFPU:  .eabi_attribute 25, 1
737; CORTEX-A12-NOFPU:  .eabi_attribute 42, 1
738; CORTEX-A12-NOFPU:  .eabi_attribute 44, 2
739; CORTEX-A12-NOFPU:  .eabi_attribute 68, 3
740
741; CORTEX-A12-NOFPU-FAST-NOT:   .eabi_attribute 19
742;; Despite there being no FPU, we chose to flush to zero preserving
743;; sign. This matches what the hardware would do for this architecture
744;; revision.
745; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 20, 2
746; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 21
747; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 22
748; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 23, 1
749
750; CORTEX-A15: .cpu cortex-a15
751; CORTEX-A15: .eabi_attribute 6, 10
752; CORTEX-A15: .eabi_attribute 7, 65
753; CORTEX-A15: .eabi_attribute 8, 1
754; CORTEX-A15: .eabi_attribute 9, 2
755; CORTEX-A15: .fpu neon-vfpv4
756; CORTEX-A15-NOT:   .eabi_attribute 19
757;; We default to IEEE 754 compliance
758; CORTEX-A15: .eabi_attribute 20, 1
759; CORTEX-A15: .eabi_attribute 21, 1
760; CORTEX-A15-NOT: .eabi_attribute 22
761; CORTEX-A15: .eabi_attribute 23, 3
762; CORTEX-A15: .eabi_attribute 24, 1
763; CORTEX-A15: .eabi_attribute 25, 1
764; CORTEX-A15-NOT: .eabi_attribute 27
765; CORTEX-A15-NOT: .eabi_attribute 28
766; CORTEX-A15: .eabi_attribute 36, 1
767; CORTEX-A15: .eabi_attribute 38, 1
768; CORTEX-A15: .eabi_attribute 42, 1
769; CORTEX-A15: .eabi_attribute 44, 2
770; CORTEX-A15: .eabi_attribute 68, 3
771
772; CORTEX-A15-FAST-NOT:   .eabi_attribute 19
773;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when
774;; -ffast-math is specified.
775; CORTEX-A15-FAST: .eabi_attribute 20, 2
776; CORTEX-A15-FAST-NOT:  .eabi_attribute 21
777; CORTEX-A15-FAST-NOT:  .eabi_attribute 22
778; CORTEX-A15-FAST:  .eabi_attribute 23, 1
779
780; CORTEX-A17-DEFAULT:  .cpu cortex-a17
781; CORTEX-A17-DEFAULT:  .eabi_attribute 6, 10
782; CORTEX-A17-DEFAULT:  .eabi_attribute 7, 65
783; CORTEX-A17-DEFAULT:  .eabi_attribute 8, 1
784; CORTEX-A17-DEFAULT:  .eabi_attribute 9, 2
785; CORTEX-A17-DEFAULT:  .fpu neon-vfpv4
786; CORTEX-A17-DEFAULT-NOT:   .eabi_attribute 19
787;; We default to IEEE 754 compliance
788; CORTEX-A17-DEFAULT:  .eabi_attribute 20, 1
789; CORTEX-A17-DEFAULT:  .eabi_attribute 21, 1
790; CORTEX-A17-DEFAULT-NOT:  .eabi_attribute 22
791; CORTEX-A17-DEFAULT:  .eabi_attribute 23, 3
792; CORTEX-A17-DEFAULT:  .eabi_attribute 24, 1
793; CORTEX-A17-DEFAULT:  .eabi_attribute 25, 1
794; CORTEX-A17-DEFAULT:  .eabi_attribute 42, 1
795; CORTEX-A17-DEFAULT:  .eabi_attribute 44, 2
796; CORTEX-A17-DEFAULT:  .eabi_attribute 68, 3
797
798; CORTEX-A17-FAST-NOT:   .eabi_attribute 19
799;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when
800;; -ffast-math is specified.
801; CORTEX-A17-FAST:  .eabi_attribute 20, 2
802; CORTEX-A17-FAST-NOT:  .eabi_attribute 21
803; CORTEX-A17-FAST-NOT:  .eabi_attribute 22
804; CORTEX-A17-FAST:  .eabi_attribute 23, 1
805
806; CORTEX-A17-NOFPU:  .cpu cortex-a17
807; CORTEX-A17-NOFPU:  .eabi_attribute 6, 10
808; CORTEX-A17-NOFPU:  .eabi_attribute 7, 65
809; CORTEX-A17-NOFPU:  .eabi_attribute 8, 1
810; CORTEX-A17-NOFPU:  .eabi_attribute 9, 2
811; CORTEX-A17-NOFPU-NOT:  .fpu
812; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
813;; We default to IEEE 754 compliance
814; CORTEX-A17-NOFPU:  .eabi_attribute 20, 1
815; CORTEX-A17-NOFPU:  .eabi_attribute 21, 1
816; CORTEX-A17-NOFPU-NOT:  .eabi_attribute 22
817; CORTEX-A17-NOFPU:  .eabi_attribute 23, 3
818; CORTEX-A17-NOFPU:  .eabi_attribute 24, 1
819; CORTEX-A17-NOFPU:  .eabi_attribute 25, 1
820; CORTEX-A17-NOFPU:  .eabi_attribute 42, 1
821; CORTEX-A17-NOFPU:  .eabi_attribute 44, 2
822; CORTEX-A17-NOFPU:  .eabi_attribute 68, 3
823
824; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
825;; Despite there being no FPU, we chose to flush to zero preserving
826;; sign. This matches what the hardware would do for this architecture
827;; revision.
828; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 20, 2
829; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 21
830; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 22
831; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 23, 1
832
833; CORTEX-M0:  .cpu cortex-m0
834; CORTEX-M0:  .eabi_attribute 6, 12
835; CORTEX-M0-NOT:  .eabi_attribute 7
836; CORTEX-M0:  .eabi_attribute 8, 0
837; CORTEX-M0:  .eabi_attribute 9, 1
838; CORTEX-M0-NOT:   .eabi_attribute 19
839;; We default to IEEE 754 compliance
840; CORTEX-M0:  .eabi_attribute 20, 1
841; CORTEX-M0:  .eabi_attribute 21, 1
842; CORTEX-M0-NOT:  .eabi_attribute 22
843; CORTEX-M0:  .eabi_attribute 23, 3
844; CORTEX-M0: .eabi_attribute 34, 0
845; CORTEX-M0:  .eabi_attribute 24, 1
846; CORTEX-M0:  .eabi_attribute 25, 1
847; CORTEX-M0-NOT:  .eabi_attribute 27
848; CORTEX-M0-NOT:  .eabi_attribute 28
849; CORTEX-M0-NOT:  .eabi_attribute 36
850; CORTEX-M0:  .eabi_attribute 38, 1
851; CORTEX-M0-NOT:  .eabi_attribute 42
852; CORTEX-M0-NOT:  .eabi_attribute 44
853; CORTEX-M0-NOT:  .eabi_attribute 68
854
855; CORTEX-M0-FAST-NOT:   .eabi_attribute 19
856;; Despite the M0 CPU having no FPU in this scenario, we chose to
857;; flush to positive zero here. There's no hardware support doing
858;; this, but the fast maths software library might and such behaviour
859;; would match hardware support on this architecture revision if it
860;; existed.
861; CORTEX-M0-FAST-NOT:  .eabi_attribute 20
862; CORTEX-M0-FAST-NOT:  .eabi_attribute 21
863; CORTEX-M0-FAST-NOT:  .eabi_attribute 22
864; CORTEX-M0-FAST:  .eabi_attribute 23, 1
865
866; CORTEX-M0PLUS:  .cpu cortex-m0plus
867; CORTEX-M0PLUS:  .eabi_attribute 6, 12
868; CORTEX-M0PLUS-NOT:  .eabi_attribute 7
869; CORTEX-M0PLUS:  .eabi_attribute 8, 0
870; CORTEX-M0PLUS:  .eabi_attribute 9, 1
871; CORTEX-M0PLUS-NOT:   .eabi_attribute 19
872;; We default to IEEE 754 compliance
873; CORTEX-M0PLUS:  .eabi_attribute 20, 1
874; CORTEX-M0PLUS:  .eabi_attribute 21, 1
875; CORTEX-M0PLUS-NOT:  .eabi_attribute 22
876; CORTEX-M0PLUS:  .eabi_attribute 23, 3
877; CORTEX-M0PLUS:  .eabi_attribute 24, 1
878; CORTEX-M0PLUS:  .eabi_attribute 25, 1
879; CORTEX-M0PLUS-NOT:  .eabi_attribute 27
880; CORTEX-M0PLUS-NOT:  .eabi_attribute 28
881; CORTEX-M0PLUS-NOT:  .eabi_attribute 36
882; CORTEX-M0PLUS:  .eabi_attribute 38, 1
883; CORTEX-M0PLUS-NOT:  .eabi_attribute 42
884; CORTEX-M0PLUS-NOT:  .eabi_attribute 44
885; CORTEX-M0PLUS-NOT:  .eabi_attribute 68
886
887; CORTEX-M0PLUS-FAST-NOT:   .eabi_attribute 19
888;; Despite the M0+ CPU having no FPU in this scenario, we chose to
889;; flush to positive zero here. There's no hardware support doing
890;; this, but the fast maths software library might and such behaviour
891;; would match hardware support on this architecture revision if it
892;; existed.
893; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 20
894; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 21
895; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 22
896; CORTEX-M0PLUS-FAST:  .eabi_attribute 23, 1
897
898; CORTEX-M1:  .cpu cortex-m1
899; CORTEX-M1:  .eabi_attribute 6, 12
900; CORTEX-M1-NOT:  .eabi_attribute 7
901; CORTEX-M1:  .eabi_attribute 8, 0
902; CORTEX-M1:  .eabi_attribute 9, 1
903; CORTEX-M1-NOT:   .eabi_attribute 19
904;; We default to IEEE 754 compliance
905; CORTEX-M1:  .eabi_attribute 20, 1
906; CORTEX-M1:  .eabi_attribute 21, 1
907; CORTEX-M1-NOT:  .eabi_attribute 22
908; CORTEX-M1:  .eabi_attribute 23, 3
909; CORTEX-M1:  .eabi_attribute 24, 1
910; CORTEX-M1:  .eabi_attribute 25, 1
911; CORTEX-M1-NOT:  .eabi_attribute 27
912; CORTEX-M1-NOT:  .eabi_attribute 28
913; CORTEX-M1-NOT:  .eabi_attribute 36
914; CORTEX-M1:  .eabi_attribute 38, 1
915; CORTEX-M1-NOT:  .eabi_attribute 42
916; CORTEX-M1-NOT:  .eabi_attribute 44
917; CORTEX-M1-NOT:  .eabi_attribute 68
918
919; CORTEX-M1-FAST-NOT:   .eabi_attribute 19
920;; Despite the M1 CPU having no FPU in this scenario, we chose to
921;; flush to positive zero here. There's no hardware support doing
922;; this, but the fast maths software library might and such behaviour
923;; would match hardware support on this architecture revision if it
924;; existed.
925; CORTEX-M1-FAST-NOT:  .eabi_attribute 20
926; CORTEX-M1-FAST-NOT:  .eabi_attribute 21
927; CORTEX-M1-FAST-NOT:  .eabi_attribute 22
928; CORTEX-M1-FAST:  .eabi_attribute 23, 1
929
930; SC000:  .cpu sc000
931; SC000:  .eabi_attribute 6, 12
932; SC000-NOT:  .eabi_attribute 7
933; SC000:  .eabi_attribute 8, 0
934; SC000:  .eabi_attribute 9, 1
935; SC000-NOT:   .eabi_attribute 19
936;; We default to IEEE 754 compliance
937; SC000:  .eabi_attribute 20, 1
938; SC000:  .eabi_attribute 21, 1
939; SC000-NOT:  .eabi_attribute 22
940; SC000:  .eabi_attribute 23, 3
941; SC000:  .eabi_attribute 24, 1
942; SC000:  .eabi_attribute 25, 1
943; SC000-NOT:  .eabi_attribute 27
944; SC000-NOT:  .eabi_attribute 28
945; SC000-NOT:  .eabi_attribute 36
946; SC000:  .eabi_attribute 38, 1
947; SC000-NOT:  .eabi_attribute 42
948; SC000-NOT:  .eabi_attribute 44
949; SC000-NOT:  .eabi_attribute 68
950
951; SC000-FAST-NOT:   .eabi_attribute 19
952;; Despite the SC000 CPU having no FPU in this scenario, we chose to
953;; flush to positive zero here. There's no hardware support doing
954;; this, but the fast maths software library might and such behaviour
955;; would match hardware support on this architecture revision if it
956;; existed.
957; SC000-FAST-NOT:  .eabi_attribute 20
958; SC000-FAST-NOT:  .eabi_attribute 21
959; SC000-FAST-NOT:  .eabi_attribute 22
960; SC000-FAST:  .eabi_attribute 23, 1
961
962; CORTEX-M3:  .cpu cortex-m3
963; CORTEX-M3:  .eabi_attribute 6, 10
964; CORTEX-M3:  .eabi_attribute 7, 77
965; CORTEX-M3:  .eabi_attribute 8, 0
966; CORTEX-M3:  .eabi_attribute 9, 2
967; CORTEX-M3-NOT:   .eabi_attribute 19
968;; We default to IEEE 754 compliance
969; CORTEX-M3:  .eabi_attribute 20, 1
970; CORTEX-M3:  .eabi_attribute 21, 1
971; CORTEX-M3-NOT:  .eabi_attribute 22
972; CORTEX-M3:  .eabi_attribute 23, 3
973; CORTEX-M3:  .eabi_attribute 24, 1
974; CORTEX-M3:  .eabi_attribute 25, 1
975; CORTEX-M3-NOT:  .eabi_attribute 27
976; CORTEX-M3-NOT:  .eabi_attribute 28
977; CORTEX-M3-NOT:  .eabi_attribute 36
978; CORTEX-M3:  .eabi_attribute 38, 1
979; CORTEX-M3-NOT:  .eabi_attribute 42
980; CORTEX-M3-NOT:  .eabi_attribute 44
981; CORTEX-M3-NOT:  .eabi_attribute 68
982
983; CORTEX-M3-FAST-NOT:   .eabi_attribute 19
984;; Despite there being no FPU, we chose to flush to zero preserving
985;; sign. This matches what the hardware would do for this architecture
986;; revision.
987; CORTEX-M3-FAST:  .eabi_attribute 20, 2
988; CORTEX-M3-FAST-NOT:  .eabi_attribute 21
989; CORTEX-M3-FAST-NOT:  .eabi_attribute 22
990; CORTEX-M3-FAST:  .eabi_attribute 23, 1
991
992; SC300:  .cpu sc300
993; SC300:  .eabi_attribute 6, 10
994; SC300:  .eabi_attribute 7, 77
995; SC300:  .eabi_attribute 8, 0
996; SC300:  .eabi_attribute 9, 2
997; SC300-NOT:   .eabi_attribute 19
998;; We default to IEEE 754 compliance
999; SC300:  .eabi_attribute 20, 1
1000; SC300:  .eabi_attribute 21, 1
1001; SC300-NOT:  .eabi_attribute 22
1002; SC300:  .eabi_attribute 23, 3
1003; SC300:  .eabi_attribute 24, 1
1004; SC300:  .eabi_attribute 25, 1
1005; SC300-NOT:  .eabi_attribute 27
1006; SC300-NOT:  .eabi_attribute 28
1007; SC300-NOT:  .eabi_attribute 36
1008; SC300:  .eabi_attribute 38, 1
1009; SC300-NOT:  .eabi_attribute 42
1010; SC300-NOT:  .eabi_attribute 44
1011; SC300-NOT:  .eabi_attribute 68
1012
1013; SC300-FAST-NOT:   .eabi_attribute 19
1014;; Despite there being no FPU, we chose to flush to zero preserving
1015;; sign. This matches what the hardware would do for this architecture
1016;; revision.
1017; SC300-FAST:  .eabi_attribute 20, 2
1018; SC300-FAST-NOT:  .eabi_attribute 21
1019; SC300-FAST-NOT:  .eabi_attribute 22
1020; SC300-FAST:  .eabi_attribute 23, 1
1021
1022; CORTEX-M4-SOFT:  .cpu cortex-m4
1023; CORTEX-M4-SOFT:  .eabi_attribute 6, 13
1024; CORTEX-M4-SOFT:  .eabi_attribute 7, 77
1025; CORTEX-M4-SOFT:  .eabi_attribute 8, 0
1026; CORTEX-M4-SOFT:  .eabi_attribute 9, 2
1027; CORTEX-M4-SOFT:  .fpu fpv4-sp-d16
1028; CORTEX-M4-SOFT-NOT:   .eabi_attribute 19
1029;; We default to IEEE 754 compliance
1030; CORTEX-M4-SOFT:  .eabi_attribute 20, 1
1031; CORTEX-M4-SOFT:  .eabi_attribute 21, 1
1032; CORTEX-M4-SOFT-NOT:  .eabi_attribute 22
1033; CORTEX-M4-SOFT:  .eabi_attribute 23, 3
1034; CORTEX-M4-SOFT:  .eabi_attribute 24, 1
1035; CORTEX-M4-SOFT:  .eabi_attribute 25, 1
1036; CORTEX-M4-SOFT:  .eabi_attribute 27, 1
1037; CORTEX-M4-SOFT-NOT:  .eabi_attribute 28
1038; CORTEX-M4-SOFT:  .eabi_attribute 36, 1
1039; CORTEX-M4-SOFT:  .eabi_attribute 38, 1
1040; CORTEX-M4-SOFT-NOT:  .eabi_attribute 42
1041; CORTEX-M4-SOFT-NOT:  .eabi_attribute 44
1042; CORTEX-M4-SOFT-NOT:  .eabi_attribute 68
1043
1044; CORTEX-M4-SOFT-FAST-NOT:   .eabi_attribute 19
1045;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1046;; -ffast-math is specified.
1047; CORTEX-M4-SOFT-FAST:  .eabi_attribute 20, 2
1048; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 21
1049; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 22
1050; CORTEX-M4-SOFT-FAST:  .eabi_attribute 23, 1
1051
1052; CORTEX-M4-HARD:  .cpu cortex-m4
1053; CORTEX-M4-HARD:  .eabi_attribute 6, 13
1054; CORTEX-M4-HARD:  .eabi_attribute 7, 77
1055; CORTEX-M4-HARD:  .eabi_attribute 8, 0
1056; CORTEX-M4-HARD:  .eabi_attribute 9, 2
1057; CORTEX-M4-HARD:  .fpu fpv4-sp-d16
1058; CORTEX-M4-HARD-NOT:   .eabi_attribute 19
1059;; We default to IEEE 754 compliance
1060; CORTEX-M4-HARD:  .eabi_attribute 20, 1
1061; CORTEX-M4-HARD:  .eabi_attribute 21, 1
1062; CORTEX-M4-HARD-NOT:  .eabi_attribute 22
1063; CORTEX-M4-HARD:  .eabi_attribute 23, 3
1064; CORTEX-M4-HARD:  .eabi_attribute 24, 1
1065; CORTEX-M4-HARD:  .eabi_attribute 25, 1
1066; CORTEX-M4-HARD:  .eabi_attribute 27, 1
1067; CORTEX-M4-HARD:  .eabi_attribute 28, 1
1068; CORTEX-M4-HARD:  .eabi_attribute 36, 1
1069; CORTEX-M4-HARD:  .eabi_attribute 38, 1
1070; CORTEX-M4-HARD-NOT:  .eabi_attribute 42
1071; CORTEX-M4-HARD-NOT:  .eabi_attribute 44
1072; CORTEX-M4-HARD-NOT:  .eabi_attribute 68
1073
1074; CORTEX-M4-HARD-FAST-NOT:   .eabi_attribute 19
1075;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1076;; -ffast-math is specified.
1077; CORTEX-M4-HARD-FAST:  .eabi_attribute 20, 2
1078; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 21
1079; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 22
1080; CORTEX-M4-HARD-FAST:  .eabi_attribute 23, 1
1081
1082; CORTEX-M7:  .cpu    cortex-m7
1083; CORTEX-M7:  .eabi_attribute 6, 13
1084; CORTEX-M7:  .eabi_attribute 7, 77
1085; CORTEX-M7:  .eabi_attribute 8, 0
1086; CORTEX-M7:  .eabi_attribute 9, 2
1087; CORTEX-M7-SOFT-NOT: .fpu
1088; CORTEX-M7-SINGLE:  .fpu fpv5-sp-d16
1089; CORTEX-M7-DOUBLE:  .fpu fpv5-d16
1090; CORTEX-M7:  .eabi_attribute 17, 1
1091; CORTEX-M7-NOT:   .eabi_attribute 19
1092;; We default to IEEE 754 compliance
1093; CORTEX-M7:  .eabi_attribute 20, 1
1094; CORTEX-M7:  .eabi_attribute 21, 1
1095; CORTEX-M7-NOT:  .eabi_attribute 22
1096; CORTEX-M7:  .eabi_attribute 23, 3
1097; CORTEX-M7:  .eabi_attribute 24, 1
1098; CORTEX-M7:  .eabi_attribute 25, 1
1099; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
1100; CORTEX-M7-SINGLE:  .eabi_attribute 27, 1
1101; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
1102; CORTEX-M7:  .eabi_attribute 36, 1
1103; CORTEX-M7:  .eabi_attribute 38, 1
1104; CORTEX-M7-NOT:  .eabi_attribute 44
1105; CORTEX-M7:  .eabi_attribute 14, 0
1106
1107; CORTEX-M7-NOFPU-FAST-NOT:   .eabi_attribute 19
1108;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1109; CORTEX-M7-FAST:  .eabi_attribute 20, 2
1110;; Despite there being no FPU, we chose to flush to zero preserving
1111;; sign. This matches what the hardware would do for this architecture
1112;; revision.
1113; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
1114; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 21
1115; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 22
1116; CORTEX-M7-NOFPU-FAST:  .eabi_attribute 23, 1
1117
1118; CORTEX-R4:  .cpu cortex-r4
1119; CORTEX-R4:  .eabi_attribute 6, 10
1120; CORTEX-R4:  .eabi_attribute 7, 82
1121; CORTEX-R4:  .eabi_attribute 8, 1
1122; CORTEX-R4:  .eabi_attribute 9, 2
1123; CORTEX-R4-NOT:  .fpu vfpv3-d16
1124; CORTEX-R4-NOT:   .eabi_attribute 19
1125;; We default to IEEE 754 compliance
1126; CORTEX-R4:  .eabi_attribute 20, 1
1127; CORTEX-R4:  .eabi_attribute 21, 1
1128; CORTEX-R4-NOT:  .eabi_attribute 22
1129; CORTEX-R4:  .eabi_attribute 23, 3
1130; CORTEX-R4:  .eabi_attribute 24, 1
1131; CORTEX-R4:  .eabi_attribute 25, 1
1132; CORTEX-R4-NOT:  .eabi_attribute 28
1133; CORTEX-R4-NOT:  .eabi_attribute 36
1134; CORTEX-R4:  .eabi_attribute 38, 1
1135; CORTEX-R4-NOT:  .eabi_attribute 42
1136; CORTEX-R4-NOT:  .eabi_attribute 44
1137; CORTEX-R4-NOT:  .eabi_attribute 68
1138
1139; CORTEX-R4F:  .cpu cortex-r4f
1140; CORTEX-R4F:  .eabi_attribute 6, 10
1141; CORTEX-R4F:  .eabi_attribute 7, 82
1142; CORTEX-R4F:  .eabi_attribute 8, 1
1143; CORTEX-R4F:  .eabi_attribute 9, 2
1144; CORTEX-R4F:  .fpu vfpv3-d16
1145; CORTEX-R4F-NOT:   .eabi_attribute 19
1146;; We default to IEEE 754 compliance
1147; CORTEX-R4F:  .eabi_attribute 20, 1
1148; CORTEX-R4F:  .eabi_attribute 21, 1
1149; CORTEX-R4F-NOT:  .eabi_attribute 22
1150; CORTEX-R4F:  .eabi_attribute 23, 3
1151; CORTEX-R4F:  .eabi_attribute 24, 1
1152; CORTEX-R4F:  .eabi_attribute 25, 1
1153; CORTEX-R4F-NOT:  .eabi_attribute 27, 1
1154; CORTEX-R4F-NOT:  .eabi_attribute 28
1155; CORTEX-R4F-NOT:  .eabi_attribute 36
1156; CORTEX-R4F:  .eabi_attribute 38, 1
1157; CORTEX-R4F-NOT:  .eabi_attribute 42
1158; CORTEX-R4F-NOT:  .eabi_attribute 44
1159; CORTEX-R4F-NOT:  .eabi_attribute 68
1160
1161; CORTEX-R5:  .cpu cortex-r5
1162; CORTEX-R5:  .eabi_attribute 6, 10
1163; CORTEX-R5:  .eabi_attribute 7, 82
1164; CORTEX-R5:  .eabi_attribute 8, 1
1165; CORTEX-R5:  .eabi_attribute 9, 2
1166; CORTEX-R5:  .fpu vfpv3-d16
1167; CORTEX-R5-NOT:   .eabi_attribute 19
1168;; We default to IEEE 754 compliance
1169; CORTEX-R5:  .eabi_attribute 20, 1
1170; CORTEX-R5:  .eabi_attribute 21, 1
1171; CORTEX-R5-NOT:  .eabi_attribute 22
1172; CORTEX-R5:  .eabi_attribute 23, 3
1173; CORTEX-R5:  .eabi_attribute 24, 1
1174; CORTEX-R5:  .eabi_attribute 25, 1
1175; CORTEX-R5-NOT:  .eabi_attribute 27, 1
1176; CORTEX-R5-NOT:  .eabi_attribute 28
1177; CORTEX-R5-NOT:  .eabi_attribute 36
1178; CORTEX-R5:  .eabi_attribute 38, 1
1179; CORTEX-R5-NOT:  .eabi_attribute 42
1180; CORTEX-R5:  .eabi_attribute 44, 2
1181; CORTEX-R5-NOT:  .eabi_attribute 68
1182
1183; CORTEX-R5-FAST-NOT:   .eabi_attribute 19
1184;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
1185; CORTEX-R5-FAST:  .eabi_attribute 20, 2
1186; CORTEX-R5-FAST-NOT:  .eabi_attribute 21
1187; CORTEX-R5-FAST-NOT:  .eabi_attribute 22
1188; CORTEX-R5-FAST:  .eabi_attribute 23, 1
1189
1190; CORTEX-R7:  .cpu cortex-r7
1191; CORTEX-R7:  .eabi_attribute 6, 10
1192; CORTEX-R7:  .eabi_attribute 7, 82
1193; CORTEX-R7:  .eabi_attribute 8, 1
1194; CORTEX-R7:  .eabi_attribute 9, 2
1195; CORTEX-R7:  .fpu vfpv3xd
1196; CORTEX-R7-NOT:   .eabi_attribute 19
1197;; We default to IEEE 754 compliance
1198; CORTEX-R7:  .eabi_attribute 20, 1
1199; CORTEX-R7:  .eabi_attribute 21, 1
1200; CORTEX-R7-NOT:  .eabi_attribute 22
1201; CORTEX-R7:  .eabi_attribute 23, 3
1202; CORTEX-R7:  .eabi_attribute 24, 1
1203; CORTEX-R7:  .eabi_attribute 25, 1
1204; CORTEX-R7:  .eabi_attribute 27, 1
1205; CORTEX-R7-NOT:  .eabi_attribute 28
1206; CORTEX-R7:  .eabi_attribute 36, 1
1207; CORTEX-R7:  .eabi_attribute 38, 1
1208; CORTEX-R7:  .eabi_attribute 42, 1
1209; CORTEX-R7:  .eabi_attribute 44, 2
1210; CORTEX-R7-NOT:  .eabi_attribute 68
1211
1212; CORTEX-R7-FAST-NOT:   .eabi_attribute 19
1213;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
1214; CORTEX-R7-FAST:  .eabi_attribute 20, 2
1215; CORTEX-R7-FAST-NOT:  .eabi_attribute 21
1216; CORTEX-R7-FAST-NOT:  .eabi_attribute 22
1217; CORTEX-R7-FAST:  .eabi_attribute 23, 1
1218
1219; CORTEX-A35:  .cpu cortex-a35
1220; CORTEX-A35:  .eabi_attribute 6, 14
1221; CORTEX-A35:  .eabi_attribute 7, 65
1222; CORTEX-A35:  .eabi_attribute 8, 1
1223; CORTEX-A35:  .eabi_attribute 9, 2
1224; CORTEX-A35:  .fpu crypto-neon-fp-armv8
1225; CORTEX-A35:  .eabi_attribute 12, 3
1226; CORTEX-A35-NOT:   .eabi_attribute 19
1227;; We default to IEEE 754 compliance
1228; CORTEX-A35:  .eabi_attribute 20, 1
1229; CORTEX-A35:  .eabi_attribute 21, 1
1230; CORTEX-A35-NOT:  .eabi_attribute 22
1231; CORTEX-A35:  .eabi_attribute 23, 3
1232; CORTEX-A35:  .eabi_attribute 24, 1
1233; CORTEX-A35:  .eabi_attribute 25, 1
1234; CORTEX-A35-NOT:  .eabi_attribute 27
1235; CORTEX-A35-NOT:  .eabi_attribute 28
1236; CORTEX-A35:  .eabi_attribute 36, 1
1237; CORTEX-A35:  .eabi_attribute 38, 1
1238; CORTEX-A35:  .eabi_attribute 42, 1
1239; CORTEX-A35-NOT:  .eabi_attribute 44
1240; CORTEX-A35:  .eabi_attribute 68, 3
1241
1242; CORTEX-A35-FAST-NOT:   .eabi_attribute 19
1243;; The A35 has the ARMv8 FP unit, which always flushes preserving sign.
1244; CORTEX-A35-FAST:  .eabi_attribute 20, 2
1245; CORTEX-A35-FAST-NOT:  .eabi_attribute 21
1246; CORTEX-A35-FAST-NOT:  .eabi_attribute 22
1247; CORTEX-A35-FAST:  .eabi_attribute 23, 1
1248
1249; CORTEX-A53:  .cpu cortex-a53
1250; CORTEX-A53:  .eabi_attribute 6, 14
1251; CORTEX-A53:  .eabi_attribute 7, 65
1252; CORTEX-A53:  .eabi_attribute 8, 1
1253; CORTEX-A53:  .eabi_attribute 9, 2
1254; CORTEX-A53:  .fpu crypto-neon-fp-armv8
1255; CORTEX-A53:  .eabi_attribute 12, 3
1256; CORTEX-A53-NOT:   .eabi_attribute 19
1257;; We default to IEEE 754 compliance
1258; CORTEX-A53:  .eabi_attribute 20, 1
1259; CORTEX-A53:  .eabi_attribute 21, 1
1260; CORTEX-A53-NOT:  .eabi_attribute 22
1261; CORTEX-A53:  .eabi_attribute 23, 3
1262; CORTEX-A53:  .eabi_attribute 24, 1
1263; CORTEX-A53:  .eabi_attribute 25, 1
1264; CORTEX-A53-NOT:  .eabi_attribute 27
1265; CORTEX-A53-NOT:  .eabi_attribute 28
1266; CORTEX-A53:  .eabi_attribute 36, 1
1267; CORTEX-A53:  .eabi_attribute 38, 1
1268; CORTEX-A53:  .eabi_attribute 42, 1
1269; CORTEX-A53-NOT:  .eabi_attribute 44
1270; CORTEX-A53:  .eabi_attribute 68, 3
1271
1272; CORTEX-A53-FAST-NOT:   .eabi_attribute 19
1273;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1274; CORTEX-A53-FAST:  .eabi_attribute 20, 2
1275; CORTEX-A53-FAST-NOT:  .eabi_attribute 21
1276; CORTEX-A53-FAST-NOT:  .eabi_attribute 22
1277; CORTEX-A53-FAST:  .eabi_attribute 23, 1
1278
1279; CORTEX-A57:  .cpu cortex-a57
1280; CORTEX-A57:  .eabi_attribute 6, 14
1281; CORTEX-A57:  .eabi_attribute 7, 65
1282; CORTEX-A57:  .eabi_attribute 8, 1
1283; CORTEX-A57:  .eabi_attribute 9, 2
1284; CORTEX-A57:  .fpu crypto-neon-fp-armv8
1285; CORTEX-A57:  .eabi_attribute 12, 3
1286; CORTEX-A57-NOT:   .eabi_attribute 19
1287;; We default to IEEE 754 compliance
1288; CORTEX-A57:  .eabi_attribute 20, 1
1289; CORTEX-A57:  .eabi_attribute 21, 1
1290; CORTEX-A57-NOT:  .eabi_attribute 22
1291; CORTEX-A57:  .eabi_attribute 23, 3
1292; CORTEX-A57:  .eabi_attribute 24, 1
1293; CORTEX-A57:  .eabi_attribute 25, 1
1294; CORTEX-A57-NOT:  .eabi_attribute 27
1295; CORTEX-A57-NOT:  .eabi_attribute 28
1296; CORTEX-A57:  .eabi_attribute 36, 1
1297; CORTEX-A57:  .eabi_attribute 38, 1
1298; CORTEX-A57:  .eabi_attribute 42, 1
1299; CORTEX-A57-NOT:  .eabi_attribute 44
1300; CORTEX-A57:  .eabi_attribute 68, 3
1301
1302; CORTEX-A57-FAST-NOT:   .eabi_attribute 19
1303;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1304; CORTEX-A57-FAST:  .eabi_attribute 20, 2
1305; CORTEX-A57-FAST-NOT:  .eabi_attribute 21
1306; CORTEX-A57-FAST-NOT:  .eabi_attribute 22
1307; CORTEX-A57-FAST:  .eabi_attribute 23, 1
1308
1309; CORTEX-A72:  .cpu cortex-a72
1310; CORTEX-A72:  .eabi_attribute 6, 14
1311; CORTEX-A72:  .eabi_attribute 7, 65
1312; CORTEX-A72:  .eabi_attribute 8, 1
1313; CORTEX-A72:  .eabi_attribute 9, 2
1314; CORTEX-A72:  .fpu crypto-neon-fp-armv8
1315; CORTEX-A72:  .eabi_attribute 12, 3
1316; CORTEX-A72-NOT:   .eabi_attribute 19
1317;; We default to IEEE 754 compliance
1318; CORTEX-A72:  .eabi_attribute 20, 1
1319; CORTEX-A72:  .eabi_attribute 21, 1
1320; CORTEX-A72-NOT:  .eabi_attribute 22
1321; CORTEX-A72:  .eabi_attribute 23, 3
1322; CORTEX-A72:  .eabi_attribute 24, 1
1323; CORTEX-A72:  .eabi_attribute 25, 1
1324; CORTEX-A72-NOT:  .eabi_attribute 27
1325; CORTEX-A72-NOT:  .eabi_attribute 28
1326; CORTEX-A72:  .eabi_attribute 36, 1
1327; CORTEX-A72:  .eabi_attribute 38, 1
1328; CORTEX-A72:  .eabi_attribute 42, 1
1329; CORTEX-A72-NOT:  .eabi_attribute 44
1330; CORTEX-A72:  .eabi_attribute 68, 3
1331
1332; CORTEX-A72-FAST-NOT:   .eabi_attribute 19
1333;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1334; CORTEX-A72-FAST:  .eabi_attribute 20, 2
1335; CORTEX-A72-FAST-NOT:  .eabi_attribute 21
1336; CORTEX-A72-FAST-NOT:  .eabi_attribute 22
1337; CORTEX-A72-FAST:  .eabi_attribute 23, 1
1338
1339; EXYNOS-M1:  .cpu exynos-m1
1340; EXYNOS-M1:  .eabi_attribute 6, 14
1341; EXYNOS-M1:  .eabi_attribute 7, 65
1342; EXYNOS-M1:  .eabi_attribute 8, 1
1343; EXYNOS-M1:  .eabi_attribute 9, 2
1344; EXYNOS-M1:  .fpu crypto-neon-fp-armv8
1345; EXYNOS-M1:  .eabi_attribute 12, 3
1346; EXYNOS-M1-NOT:   .eabi_attribute 19
1347;; We default to IEEE 754 compliance
1348; EXYNOS-M1:  .eabi_attribute 20, 1
1349; EXYNOS-M1:  .eabi_attribute 21, 1
1350; EXYNOS-M1-NOT:  .eabi_attribute 22
1351; EXYNOS-M1:  .eabi_attribute 23, 3
1352; EXYNOS-M1:  .eabi_attribute 24, 1
1353; EXYNOS-M1:  .eabi_attribute 25, 1
1354; EXYNOS-M1-NOT:  .eabi_attribute 27
1355; EXYNOS-M1-NOT:  .eabi_attribute 28
1356; EXYNOS-M1:  .eabi_attribute 36, 1
1357; EXYNOS-M1:  .eabi_attribute 38, 1
1358; EXYNOS-M1:  .eabi_attribute 42, 1
1359; EXYNOS-M1-NOT:  .eabi_attribute 44
1360; EXYNOS-M15:  .eabi_attribute 68, 3
1361
1362; EXYNOS-M1-FAST-NOT:   .eabi_attribute 19
1363;; The exynos-m1 has the ARMv8 FP unit, which always flushes preserving sign.
1364; EXYNOS-M1-FAST:  .eabi_attribute 20, 2
1365; EXYNOS-M1-FAST-NOT:  .eabi_attribute 21
1366; EXYNOS-M1-FAST-NOT:  .eabi_attribute 22
1367; EXYNOS-M1-FAST:  .eabi_attribute 23, 1
1368
1369; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
1370; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
1371; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
1372; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16
1373; GENERIC-FPU-NEON-FP16: .fpu neon-fp16
1374
1375; GENERIC-ARMV8_1-A:  .eabi_attribute 6, 14
1376; GENERIC-ARMV8_1-A:  .eabi_attribute 7, 65
1377; GENERIC-ARMV8_1-A:  .eabi_attribute 8, 1
1378; GENERIC-ARMV8_1-A:  .eabi_attribute 9, 2
1379; GENERIC-ARMV8_1-A:  .fpu crypto-neon-fp-armv8
1380; GENERIC-ARMV8_1-A:  .eabi_attribute 12, 4
1381; GENERIC-ARMV8_1-A-NOT:   .eabi_attribute 19
1382;; We default to IEEE 754 compliance
1383; GENERIC-ARMV8_1-A:  .eabi_attribute 20, 1
1384; GENERIC-ARMV8_1-A:  .eabi_attribute 21, 1
1385; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 22
1386; GENERIC-ARMV8_1-A:  .eabi_attribute 23, 3
1387; GENERIC-ARMV8_1-A:  .eabi_attribute 24, 1
1388; GENERIC-ARMV8_1-A:  .eabi_attribute 25, 1
1389; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 27
1390; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 28
1391; GENERIC-ARMV8_1-A:  .eabi_attribute 36, 1
1392; GENERIC-ARMV8_1-A:  .eabi_attribute 38, 1
1393; GENERIC-ARMV8_1-A:  .eabi_attribute 42, 1
1394; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 44
1395; GENERIC-ARMV8_1-A:  .eabi_attribute 68, 3
1396
1397; GENERIC-ARMV8_1-A-FAST-NOT:   .eabi_attribute 19
1398;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign.
1399; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 20, 2
1400; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 21
1401; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 22
1402; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 23, 1
1403
1404; RELOC-PIC:  .eabi_attribute 15, 1
1405; RELOC-PIC:  .eabi_attribute 16, 1
1406; RELOC-PIC:  .eabi_attribute 17, 2
1407; RELOC-OTHER:  .eabi_attribute 17, 1
1408
1409; PCS-R9-USE:  .eabi_attribute 14, 0
1410; PCS-R9-RESERVE:  .eabi_attribute 14, 3
1411
1412define i32 @f(i64 %z) {
1413    ret i32 0
1414}
1415