xref: /llvm-project/llvm/test/CodeGen/ARM/bf16-getlane-with-fp16.ll (revision 1da52ef2943b67c0ec1ccd3b8e459d0e57e67a6d) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=armv8.6a-arm-none-eabi -mattr=+bf16,+neon,+fullfp16 < %s | FileCheck %s
3
4target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
5target triple = "armv8.6a-arm-none-eabi"
6
7define arm_aapcs_vfpcc bfloat @test_vgetq_lane_bf16_even(<8 x bfloat> %v) {
8; CHECK-LABEL: test_vgetq_lane_bf16_even:
9; CHECK:       @ %bb.0: @ %entry
10; CHECK-NEXT:    vmov.f32 s0, s3
11; CHECK-NEXT:    bx lr
12entry:
13  %0 = extractelement <8 x bfloat> %v, i32 6
14  ret bfloat %0
15}
16
17define arm_aapcs_vfpcc bfloat @test_vgetq_lane_bf16_odd(<8 x bfloat> %v) {
18; CHECK-LABEL: test_vgetq_lane_bf16_odd:
19; CHECK:       @ %bb.0: @ %entry
20; CHECK-NEXT:    vmovx.f16 s0, s3
21; CHECK-NEXT:    bx lr
22entry:
23  %0 = extractelement <8 x bfloat> %v, i32 7
24  ret bfloat %0
25}
26
27define arm_aapcs_vfpcc bfloat @test_vget_lane_bf16_even(<4 x bfloat> %v) {
28; CHECK-LABEL: test_vget_lane_bf16_even:
29; CHECK:       @ %bb.0: @ %entry
30; CHECK-NEXT:    vmov.f32 s0, s1
31; CHECK-NEXT:    bx lr
32entry:
33  %0 = extractelement <4 x bfloat> %v, i32 2
34  ret bfloat %0
35}
36
37define arm_aapcs_vfpcc bfloat @test_vget_lane_bf16_odd(<4 x bfloat> %v) {
38; CHECK-LABEL: test_vget_lane_bf16_odd:
39; CHECK:       @ %bb.0: @ %entry
40; CHECK-NEXT:    vmovx.f16 s0, s0
41; CHECK-NEXT:    bx lr
42entry:
43  %0 = extractelement <4 x bfloat> %v, i32 1
44  ret bfloat %0
45}
46
47define i16 @bextract_v4i16(<4 x bfloat> %a) {
48; CHECK-LABEL: bextract_v4i16:
49; CHECK:       @ %bb.0: @ %entry
50; CHECK-NEXT:    vmov d16, r0, r1
51; CHECK-NEXT:    vmov.u16 r0, d16[0]
52; CHECK-NEXT:    bx lr
53entry:
54  %elt = extractelement <4 x bfloat> %a, i32 0
55  %t = bitcast bfloat %elt to i16
56  ret i16 %t
57}
58
59define i16 @bextract_v8i16(<8 x bfloat> %a) {
60; CHECK-LABEL: bextract_v8i16:
61; CHECK:       @ %bb.0: @ %entry
62; CHECK-NEXT:    vmov d16, r0, r1
63; CHECK-NEXT:    vmov.u16 r0, d16[0]
64; CHECK-NEXT:    bx lr
65entry:
66  %elt = extractelement <8 x bfloat> %a, i32 0
67  %t = bitcast bfloat %elt to i16
68  ret i16 %t
69}
70
71define i32 @bextract_v4s32(<4 x bfloat> %a) {
72; CHECK-LABEL: bextract_v4s32:
73; CHECK:       @ %bb.0: @ %entry
74; CHECK-NEXT:    vmov d16, r0, r1
75; CHECK-NEXT:    vmov.u16 r0, d16[0]
76; CHECK-NEXT:    sxth r0, r0
77; CHECK-NEXT:    bx lr
78entry:
79  %elt = extractelement <4 x bfloat> %a, i32 0
80  %t = bitcast bfloat %elt to i16
81  %s = sext i16 %t to i32
82  ret i32 %s
83}
84
85define i32 @bextract_v8s32(<8 x bfloat> %a) {
86; CHECK-LABEL: bextract_v8s32:
87; CHECK:       @ %bb.0: @ %entry
88; CHECK-NEXT:    vmov d16, r0, r1
89; CHECK-NEXT:    vmov.u16 r0, d16[0]
90; CHECK-NEXT:    sxth r0, r0
91; CHECK-NEXT:    bx lr
92entry:
93  %elt = extractelement <8 x bfloat> %a, i32 0
94  %t = bitcast bfloat %elt to i16
95  %s = sext i16 %t to i32
96  ret i32 %s
97}
98