1*9cf68679SOliver Stannard; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2*9cf68679SOliver Stannard; RUN: llc < %s -mtriple=armv7-none-eabi -O0 | FileCheck %s --check-prefix=CHECK --check-prefix=LE 3*9cf68679SOliver Stannard; RUN: llc < %s -mtriple=armv7eb-none-eabi -O0 | FileCheck %s --check-prefix=CHECK --check-prefix=BE 4*9cf68679SOliver Stannard 5*9cf68679SOliver Stannard;; Previously, this failed during register allocation because the CMP_SWAP_64 6*9cf68679SOliver Stannard;; pseudo-instruction has a lot of operands, many of which need to be even-odd 7*9cf68679SOliver Stannard;; register pairs, and the over-aligned alloca in this function causes both a 8*9cf68679SOliver Stannard;; frame pointer and a base pointer to be needed. 9*9cf68679SOliver Stannard 10*9cf68679SOliver Stannarddefine void @test(ptr %ptr) { 11*9cf68679SOliver Stannard; CHECK-LABEL: test: 12*9cf68679SOliver Stannard; CHECK: @ %bb.0: @ %entry 13*9cf68679SOliver Stannard; CHECK-NEXT: .save {r4, r5, r6, r8, r9, r10, r11, lr} 14*9cf68679SOliver Stannard; CHECK-NEXT: push {r4, r5, r6, r8, r9, r10, r11, lr} 15*9cf68679SOliver Stannard; CHECK-NEXT: .setfp r11, sp, #24 16*9cf68679SOliver Stannard; CHECK-NEXT: add r11, sp, #24 17*9cf68679SOliver Stannard; CHECK-NEXT: .pad #32 18*9cf68679SOliver Stannard; CHECK-NEXT: sub sp, sp, #32 19*9cf68679SOliver Stannard; CHECK-NEXT: bfc sp, #0, #4 20*9cf68679SOliver Stannard; CHECK-NEXT: mov r6, sp 21*9cf68679SOliver Stannard; CHECK-NEXT: str r0, [r6, #28] @ 4-byte Spill 22*9cf68679SOliver Stannard; CHECK-NEXT: b .LBB0_1 23*9cf68679SOliver Stannard; CHECK-NEXT: .LBB0_1: @ %block1 24*9cf68679SOliver Stannard; CHECK-NEXT: ldr r0, [r6, #28] @ 4-byte Reload 25*9cf68679SOliver Stannard; CHECK-NEXT: mov r1, sp 26*9cf68679SOliver Stannard; CHECK-NEXT: sub r1, r1, #16 27*9cf68679SOliver Stannard; CHECK-NEXT: bic r1, r1, #15 28*9cf68679SOliver Stannard; CHECK-NEXT: mov sp, r1 29*9cf68679SOliver Stannard; CHECK-NEXT: dmb ish 30*9cf68679SOliver Stannard; CHECK-NEXT: ldr r1, [r0] 31*9cf68679SOliver Stannard; CHECK-NEXT: ldr r0, [r0, #4] 32*9cf68679SOliver Stannard; CHECK-NEXT: str r1, [r6, #20] @ 4-byte Spill 33*9cf68679SOliver Stannard; CHECK-NEXT: str r0, [r6, #24] @ 4-byte Spill 34*9cf68679SOliver Stannard; CHECK-NEXT: b .LBB0_2 35*9cf68679SOliver Stannard; CHECK-NEXT: .LBB0_2: @ %atomicrmw.start 36*9cf68679SOliver Stannard; CHECK-NEXT: @ =>This Loop Header: Depth=1 37*9cf68679SOliver Stannard; CHECK-NEXT: @ Child Loop BB0_3 Depth 2 38*9cf68679SOliver Stannard; CHECK-NEXT: ldr r2, [r6, #24] @ 4-byte Reload 39*9cf68679SOliver Stannard; CHECK-NEXT: ldr r0, [r6, #20] @ 4-byte Reload 40*9cf68679SOliver Stannard; CHECK-NEXT: ldr r8, [r6, #28] @ 4-byte Reload 41*9cf68679SOliver Stannard; LE-NEXT: str r2, [r6, #16] @ 4-byte Spill 42*9cf68679SOliver Stannard; LE-NEXT: str r0, [r6, #12] @ 4-byte Spill 43*9cf68679SOliver Stannard; BE-NEXT: str r2, [r6, #12] @ 4-byte Spill 44*9cf68679SOliver Stannard; BE-NEXT: str r0, [r6, #16] @ 4-byte Spill 45*9cf68679SOliver Stannard; CHECK-NEXT: @ implicit-def: $r1 46*9cf68679SOliver Stannard; CHECK-NEXT: @ implicit-def: $r3 47*9cf68679SOliver Stannard; CHECK-NEXT: @ kill: def $r8 killed $r8 def $r8_r9 48*9cf68679SOliver Stannard; CHECK-NEXT: mov r9, r1 49*9cf68679SOliver Stannard; CHECK-NEXT: @ kill: def $r0 killed $r0 def $r0_r1 50*9cf68679SOliver Stannard; CHECK-NEXT: mov r1, r2 51*9cf68679SOliver Stannard; CHECK-NEXT: mov r12, #0 52*9cf68679SOliver Stannard; CHECK-NEXT: mov r2, r12 53*9cf68679SOliver Stannard; CHECK-NEXT: mov r3, r12 54*9cf68679SOliver Stannard; CHECK-NEXT: .LBB0_3: @ %atomicrmw.start 55*9cf68679SOliver Stannard; CHECK-NEXT: @ Parent Loop BB0_2 Depth=1 56*9cf68679SOliver Stannard; CHECK-NEXT: @ => This Inner Loop Header: Depth=2 57*9cf68679SOliver Stannard; CHECK-NEXT: ldrexd r4, r5, [r8] 58*9cf68679SOliver Stannard; CHECK-NEXT: cmp r4, r0 59*9cf68679SOliver Stannard; CHECK-NEXT: cmpeq r5, r1 60*9cf68679SOliver Stannard; CHECK-NEXT: bne .LBB0_5 61*9cf68679SOliver Stannard; CHECK-NEXT: @ %bb.4: @ %atomicrmw.start 62*9cf68679SOliver Stannard; CHECK-NEXT: @ in Loop: Header=BB0_3 Depth=2 63*9cf68679SOliver Stannard; CHECK-NEXT: strexd r9, r2, r3, [r8] 64*9cf68679SOliver Stannard; CHECK-NEXT: cmp r9, #0 65*9cf68679SOliver Stannard; CHECK-NEXT: bne .LBB0_3 66*9cf68679SOliver Stannard; CHECK-NEXT: .LBB0_5: @ %atomicrmw.start 67*9cf68679SOliver Stannard; CHECK-NEXT: @ in Loop: Header=BB0_2 Depth=1 68*9cf68679SOliver Stannard; CHECK-NEXT: ldr r2, [r6, #12] @ 4-byte Reload 69*9cf68679SOliver Stannard; LE-NEXT: ldr r1, [r6, #16] @ 4-byte Reload 70*9cf68679SOliver Stannard; LE-NEXT: mov r0, r5 71*9cf68679SOliver Stannard; LE-NEXT: eor r3, r0, r1 72*9cf68679SOliver Stannard; LE-NEXT: mov r1, r4 73*9cf68679SOliver Stannard; LE-NEXT: eor r2, r1, r2 74*9cf68679SOliver Stannard; BE-NEXT: ldr r0, [r6, #16] @ 4-byte Reload 75*9cf68679SOliver Stannard; BE-NEXT: mov r1, r4 76*9cf68679SOliver Stannard; BE-NEXT: eor r3, r1, r0 77*9cf68679SOliver Stannard; BE-NEXT: mov r0, r5 78*9cf68679SOliver Stannard; BE-NEXT: eor r2, r0, r2 79*9cf68679SOliver Stannard; CHECK-NEXT: orr r2, r2, r3 80*9cf68679SOliver Stannard; CHECK-NEXT: cmp r2, #0 81*9cf68679SOliver Stannard; CHECK-NEXT: str r1, [r6, #20] @ 4-byte Spill 82*9cf68679SOliver Stannard; CHECK-NEXT: str r0, [r6, #24] @ 4-byte Spill 83*9cf68679SOliver Stannard; CHECK-NEXT: bne .LBB0_2 84*9cf68679SOliver Stannard; CHECK-NEXT: b .LBB0_6 85*9cf68679SOliver Stannard; CHECK-NEXT: .LBB0_6: @ %atomicrmw.end 86*9cf68679SOliver Stannard; CHECK-NEXT: dmb ish 87*9cf68679SOliver Stannard; CHECK-NEXT: sub sp, r11, #24 88*9cf68679SOliver Stannard; CHECK-NEXT: pop {r4, r5, r6, r8, r9, r10, r11, pc} 89*9cf68679SOliver Stannardentry: 90*9cf68679SOliver Stannard br label %block1 91*9cf68679SOliver Stannard 92*9cf68679SOliver Stannardblock1: 93*9cf68679SOliver Stannard %stuff = alloca i8, i64 16, align 16 94*9cf68679SOliver Stannard store atomic i64 0, ptr %ptr seq_cst, align 8 95*9cf68679SOliver Stannard ret void 96*9cf68679SOliver Stannard} 97