1; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=NO-REALIGN 2; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s -check-prefix=REALIGN 3 4; rdar://12713765 5; When realign-stack is set to false, make sure we are not creating stack 6; objects that are assumed to be 64-byte aligned. 7@T3_retval = common global <16 x float> zeroinitializer, align 16 8 9define void @test1(<16 x float>* noalias sret %agg.result) nounwind ssp "no-realign-stack" { 10entry: 11; NO-REALIGN-LABEL: test1 12; NO-REALIGN: mov r[[R2:[0-9]+]], r[[R1:[0-9]+]] 13; NO-REALIGN: vld1.32 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128]! 14; NO-REALIGN: vld1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128] 15; NO-REALIGN: add r[[R2:[0-9]+]], r[[R1]], #32 16; NO-REALIGN: vld1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128] 17; NO-REALIGN: add r[[R2:[0-9]+]], r[[R1]], #48 18; NO-REALIGN: vld1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128] 19 20; NO-REALIGN: add r[[R2:[0-9]+]], r[[R1:[0-9]+]], #48 21; NO-REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128] 22; NO-REALIGN: add r[[R2:[0-9]+]], r[[R1]], #32 23; NO-REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128] 24; NO-REALIGN: mov r[[R3:[0-9]+]], r[[R1]] 25; NO-REALIGN: vst1.32 {{{d[0-9]+, d[0-9]+}}}, [r[[R3]]:128]! 26; NO-REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R3]]:128] 27 28; NO-REALIGN: add r[[R2:[0-9]+]], r[[R0:0]], #48 29; NO-REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128] 30; NO-REALIGN: add r[[R2:[0-9]+]], r[[R0]], #32 31; NO-REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128] 32; NO-REALIGN: vst1.32 {{{d[0-9]+, d[0-9]+}}}, [r[[R0]]:128]! 33; NO-REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R0]]:128] 34 %retval = alloca <16 x float>, align 16 35 %0 = load <16 x float>, <16 x float>* @T3_retval, align 16 36 store <16 x float> %0, <16 x float>* %retval 37 %1 = load <16 x float>, <16 x float>* %retval 38 store <16 x float> %1, <16 x float>* %agg.result, align 16 39 ret void 40} 41 42define void @test2(<16 x float>* noalias sret %agg.result) nounwind ssp { 43entry: 44; REALIGN-LABEL: test2 45; REALIGN: bfc sp, #0, #6 46; REALIGN: mov r[[R2:[0-9]+]], r[[R1:[0-9]+]] 47; REALIGN: vld1.32 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128]! 48; REALIGN: vld1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128] 49; REALIGN: add r[[R2:[0-9]+]], r[[R1]], #32 50; REALIGN: vld1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128] 51; REALIGN: add r[[R2:[0-9]+]], r[[R1]], #48 52; REALIGN: vld1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128] 53 54 55; REALIGN: orr r[[R2:[0-9]+]], r[[R1:[0-9]+]], #48 56; REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128] 57; REALIGN: orr r[[R2:[0-9]+]], r[[R1]], #32 58; REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128] 59; REALIGN: orr r[[R2:[0-9]+]], r[[R1]], #16 60; REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128] 61; REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R1]]:128] 62 63; REALIGN: add r[[R1:[0-9]+]], r[[R0:0]], #48 64; REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R1]]:128] 65; REALIGN: add r[[R1:[0-9]+]], r[[R0]], #32 66; REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R1]]:128] 67; REALIGN: vst1.32 {{{d[0-9]+, d[0-9]+}}}, [r[[R0]]:128]! 68; REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R0]]:128] 69 %retval = alloca <16 x float>, align 16 70 %0 = load <16 x float>, <16 x float>* @T3_retval, align 16 71 store <16 x float> %0, <16 x float>* %retval 72 %1 = load <16 x float>, <16 x float>* %retval 73 store <16 x float> %1, <16 x float>* %agg.result, align 16 74 ret void 75} 76