1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -mtriple=thumbv7-unknown-linux-android -arm-parallel-dsp -S %s -o - | FileCheck %s 3 4define void @undef_no_return(i16* %a) { 5; CHECK-LABEL: @undef_no_return( 6; CHECK-NEXT: entry: 7; CHECK-NEXT: [[INCDEC_PTR21:%.*]] = getelementptr inbounds i16, i16* [[A:%.*]], i32 3 8; CHECK-NEXT: [[INCDEC_PTR29:%.*]] = getelementptr inbounds i16, i16* [[A]], i32 4 9; CHECK-NEXT: br label [[FOR_BODY:%.*]] 10; CHECK: for.body: 11; CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* [[INCDEC_PTR21]], align 2 12; CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[INCDEC_PTR21]] to i32* 13; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 2 14; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16 15; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32 16; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 16 17; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i16 18; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i32 19; CHECK-NEXT: [[CONV25:%.*]] = sext i16 [[TMP0]] to i32 20; CHECK-NEXT: [[UGLYGEP15:%.*]] = getelementptr i8, i8* undef, i32 undef 21; CHECK-NEXT: [[UGLYGEP1516:%.*]] = bitcast i8* [[UGLYGEP15]] to i16* 22; CHECK-NEXT: [[SCEVGEP17:%.*]] = getelementptr i16, i16* [[UGLYGEP1516]], i32 7 23; CHECK-NEXT: [[TMP8:%.*]] = load i16, i16* [[SCEVGEP17]], align 2 24; CHECK-NEXT: [[UGLYGEP12:%.*]] = getelementptr i8, i8* undef, i32 undef 25; CHECK-NEXT: [[UGLYGEP1213:%.*]] = bitcast i8* [[UGLYGEP12]] to i16* 26; CHECK-NEXT: [[SCEVGEP14:%.*]] = getelementptr i16, i16* [[UGLYGEP1213]], i32 6 27; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16* [[SCEVGEP14]] to i32* 28; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 2 29; CHECK-NEXT: [[TMP11:%.*]] = trunc i32 [[TMP10]] to i16 30; CHECK-NEXT: [[TMP12:%.*]] = call i32 @llvm.arm.smladx(i32 [[TMP10]], i32 [[TMP2]], i32 undef) 31; CHECK-NEXT: [[TMP13:%.*]] = sext i16 [[TMP11]] to i32 32; CHECK-NEXT: [[TMP14:%.*]] = lshr i32 [[TMP10]], 16 33; CHECK-NEXT: [[TMP15:%.*]] = trunc i32 [[TMP14]] to i16 34; CHECK-NEXT: [[TMP16:%.*]] = sext i16 [[TMP15]] to i32 35; CHECK-NEXT: [[CONV31:%.*]] = sext i16 [[TMP8]] to i32 36; CHECK-NEXT: [[TMP17:%.*]] = load i16, i16* [[INCDEC_PTR29]], align 2 37; CHECK-NEXT: [[CONV33:%.*]] = sext i16 [[TMP17]] to i32 38; CHECK-NEXT: [[TMP18:%.*]] = load i16, i16* [[SCEVGEP14]], align 2 39; CHECK-NEXT: [[CONV39:%.*]] = sext i16 [[TMP18]] to i32 40; CHECK-NEXT: [[MUL_I287_NEG_NEG:%.*]] = mul nsw i32 [[TMP16]], [[TMP4]] 41; CHECK-NEXT: [[MUL_I283_NEG_NEG:%.*]] = mul nsw i32 [[TMP13]], [[TMP7]] 42; CHECK-NEXT: [[REASS_ADD408:%.*]] = add i32 undef, [[MUL_I287_NEG_NEG]] 43; CHECK-NEXT: [[REASS_ADD409:%.*]] = add i32 [[REASS_ADD408]], [[MUL_I283_NEG_NEG]] 44; CHECK-NEXT: br label [[FOR_BODY]] 45; 46entry: 47 %incdec.ptr21 = getelementptr inbounds i16, i16* %a, i32 3 48 %incdec.ptr29 = getelementptr inbounds i16, i16* %a, i32 4 49 br label %for.body 50 51for.body: 52 %0 = load i16, i16* %incdec.ptr21, align 2 53 %conv25 = sext i16 %0 to i32 54 %uglygep15 = getelementptr i8, i8* undef, i32 undef 55 %uglygep1516 = bitcast i8* %uglygep15 to i16* 56 %scevgep17 = getelementptr i16, i16* %uglygep1516, i32 7 57 %1 = load i16, i16* %scevgep17, align 2 58 %conv31 = sext i16 %1 to i32 59 %2 = load i16, i16* %incdec.ptr29, align 2 60 %conv33 = sext i16 %2 to i32 61 %uglygep12 = getelementptr i8, i8* undef, i32 undef 62 %uglygep1213 = bitcast i8* %uglygep12 to i16* 63 %scevgep14 = getelementptr i16, i16* %uglygep1213, i32 6 64 %3 = load i16, i16* %scevgep14, align 2 65 %conv39 = sext i16 %3 to i32 66 %mul.i287.neg.neg = mul nsw i32 %conv31, %conv25 67 %mul.i283.neg.neg = mul nsw i32 %conv39, %conv33 68 %reass.add408 = add i32 undef, %mul.i287.neg.neg 69 %reass.add409 = add i32 %reass.add408, %mul.i283.neg.neg 70 br label %for.body 71} 72 73define i32 @return(i16* %a, i8* %b, i32 %N) { 74; CHECK-LABEL: @return( 75; CHECK-NEXT: entry: 76; CHECK-NEXT: [[INCDEC_PTR21:%.*]] = getelementptr inbounds i16, i16* [[A:%.*]], i32 3 77; CHECK-NEXT: [[INCDEC_PTR29:%.*]] = getelementptr inbounds i16, i16* [[A]], i32 4 78; CHECK-NEXT: br label [[FOR_BODY:%.*]] 79; CHECK: for.body: 80; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[N:%.*]], [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[FOR_BODY]] ] 81; CHECK-NEXT: [[ACC:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[TMP12:%.*]], [[FOR_BODY]] ] 82; CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* [[INCDEC_PTR21]], align 2 83; CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[INCDEC_PTR21]] to i32* 84; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 2 85; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16 86; CHECK-NEXT: [[TMP4:%.*]] = sext i16 [[TMP3]] to i32 87; CHECK-NEXT: [[TMP5:%.*]] = lshr i32 [[TMP2]], 16 88; CHECK-NEXT: [[TMP6:%.*]] = trunc i32 [[TMP5]] to i16 89; CHECK-NEXT: [[TMP7:%.*]] = sext i16 [[TMP6]] to i32 90; CHECK-NEXT: [[CONV25:%.*]] = sext i16 [[TMP0]] to i32 91; CHECK-NEXT: [[UGLYGEP15:%.*]] = getelementptr i8, i8* [[B:%.*]], i32 0 92; CHECK-NEXT: [[UGLYGEP1516:%.*]] = bitcast i8* [[UGLYGEP15]] to i16* 93; CHECK-NEXT: [[B_IDX:%.*]] = add nuw nsw i32 [[IV]], 1 94; CHECK-NEXT: [[SCEVGEP17:%.*]] = getelementptr i16, i16* [[UGLYGEP1516]], i32 [[B_IDX]] 95; CHECK-NEXT: [[SCEVGEP14:%.*]] = getelementptr i16, i16* [[UGLYGEP1516]], i32 [[IV]] 96; CHECK-NEXT: [[TMP8:%.*]] = load i16, i16* [[SCEVGEP17]], align 2 97; CHECK-NEXT: [[TMP9:%.*]] = bitcast i16* [[SCEVGEP14]] to i32* 98; CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 2 99; CHECK-NEXT: [[TMP11:%.*]] = trunc i32 [[TMP10]] to i16 100; CHECK-NEXT: [[TMP12]] = call i32 @llvm.arm.smladx(i32 [[TMP10]], i32 [[TMP2]], i32 [[ACC]]) 101; CHECK-NEXT: [[TMP13:%.*]] = sext i16 [[TMP11]] to i32 102; CHECK-NEXT: [[TMP14:%.*]] = lshr i32 [[TMP10]], 16 103; CHECK-NEXT: [[TMP15:%.*]] = trunc i32 [[TMP14]] to i16 104; CHECK-NEXT: [[TMP16:%.*]] = sext i16 [[TMP15]] to i32 105; CHECK-NEXT: [[CONV31:%.*]] = sext i16 [[TMP8]] to i32 106; CHECK-NEXT: [[TMP17:%.*]] = load i16, i16* [[INCDEC_PTR29]], align 2 107; CHECK-NEXT: [[CONV33:%.*]] = sext i16 [[TMP17]] to i32 108; CHECK-NEXT: [[TMP18:%.*]] = load i16, i16* [[SCEVGEP14]], align 2 109; CHECK-NEXT: [[CONV39:%.*]] = sext i16 [[TMP18]] to i32 110; CHECK-NEXT: [[MUL_I287_NEG_NEG:%.*]] = mul nsw i32 [[TMP16]], [[TMP4]] 111; CHECK-NEXT: [[MUL_I283_NEG_NEG:%.*]] = mul nsw i32 [[TMP13]], [[TMP7]] 112; CHECK-NEXT: [[REASS_ADD408:%.*]] = add i32 [[ACC]], [[MUL_I287_NEG_NEG]] 113; CHECK-NEXT: [[REASS_ADD409:%.*]] = add i32 [[REASS_ADD408]], [[MUL_I283_NEG_NEG]] 114; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], -1 115; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[IV_NEXT]], 0 116; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[EXIT:%.*]] 117; CHECK: exit: 118; CHECK-NEXT: ret i32 [[TMP12]] 119; 120entry: 121 %incdec.ptr21 = getelementptr inbounds i16, i16* %a, i32 3 122 %incdec.ptr29 = getelementptr inbounds i16, i16* %a, i32 4 123 br label %for.body 124 125for.body: 126 %iv = phi i32 [ %N, %entry ], [ %iv.next, %for.body ] 127 %acc = phi i32 [ 0, %entry ], [ %reass.add409, %for.body ] 128 %0 = load i16, i16* %incdec.ptr21, align 2 129 %conv25 = sext i16 %0 to i32 130 %uglygep15 = getelementptr i8, i8* %b, i32 0 131 %uglygep1516 = bitcast i8* %uglygep15 to i16* 132 %b.idx = add nuw nsw i32 %iv, 1 133 %scevgep17 = getelementptr i16, i16* %uglygep1516, i32 %b.idx 134 %scevgep14 = getelementptr i16, i16* %uglygep1516, i32 %iv 135 %1 = load i16, i16* %scevgep17, align 2 136 %conv31 = sext i16 %1 to i32 137 %2 = load i16, i16* %incdec.ptr29, align 2 138 %conv33 = sext i16 %2 to i32 139 %3 = load i16, i16* %scevgep14, align 2 140 %conv39 = sext i16 %3 to i32 141 %mul.i287.neg.neg = mul nsw i32 %conv31, %conv25 142 %mul.i283.neg.neg = mul nsw i32 %conv39, %conv33 143 %reass.add408 = add i32 %acc, %mul.i287.neg.neg 144 %reass.add409 = add i32 %reass.add408, %mul.i283.neg.neg 145 %iv.next = add nuw nsw i32 %iv, -1 146 %cmp = icmp ne i32 %iv.next, 0 147 br i1 %cmp, label %for.body, label %exit 148 149exit: 150 ret i32 %reass.add409 151} 152