xref: /llvm-project/llvm/test/CodeGen/ARM/2014-02-05-vfp-regs-after-stack.ll (revision 1dc1034218b95150bbbae415fa9937b113b327c0) 
1*1dc10342SOliver Stannard; RUN: llc < %s -o - -filetype=asm | FileCheck %s
2*1dc10342SOliver Stannard
3*1dc10342SOliver Stannardtarget datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-n32-S64"
4*1dc10342SOliver Stannardtarget triple = "armv8-none--eabi"
5*1dc10342SOliver Stannard
6*1dc10342SOliver Stannard; CHECK-LABEL: fn1:
7*1dc10342SOliver Stannarddefine arm_aapcs_vfpcc float @fn1(double %a, double %b, double %c, double %d, double %e, double %f, double %g, float %h, double %i, float %j) {
8*1dc10342SOliver Stannard  ret float %j
9*1dc10342SOliver Stannard; CHECK: vldr    s0, [sp, #8]
10*1dc10342SOliver Stannard}
11*1dc10342SOliver Stannard
12*1dc10342SOliver Stannard; CHECK-LABEL: fn2:
13*1dc10342SOliver Stannarddefine arm_aapcs_vfpcc float @fn2(double %a, double %b, double %c, double %d, double %e, double %f, float %h, <4 x float> %i, float %j) {
14*1dc10342SOliver Stannard  ret float %j
15*1dc10342SOliver Stannard; CHECK: vldr    s0, [sp, #16]
16*1dc10342SOliver Stannard}
17*1dc10342SOliver Stannard
18*1dc10342SOliver Stannard; CHECK-LABEL: fn3:
19*1dc10342SOliver Stannarddefine arm_aapcs_vfpcc float @fn3(float %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i, float %j) #0 {
20*1dc10342SOliver Stannard  ret float %j
21*1dc10342SOliver Stannard; CHECK: vldr    s0, [sp, #8]
22*1dc10342SOliver Stannard}
23