xref: /llvm-project/llvm/test/CodeGen/ARM/2013-05-05-IfConvertBug.ll (revision 0da5cc0765a99b659695fff6210a97397a81c153)
1; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 | FileCheck %s
2; RUN: llc < %s -mtriple=thumbv8 | FileCheck -check-prefix=CHECK-V8 %s
3; RUN: llc < %s -mtriple=thumbv7 -arm-restrict-it | FileCheck -check-prefix=CHECK-V8 %s
4; rdar://13782395
5
6define i32 @t1(i32 %a, i32 %b, i8** %retaddr) {
7; CHECK-LABEL: t1:
8; CHECK: Block address taken
9; CHECK-NOT: Address of block that was removed by CodeGen
10  store i8* blockaddress(@t1, %cond_true), i8** %retaddr
11  %tmp2 = icmp eq i32 %a, 0
12  br i1 %tmp2, label %cond_false, label %cond_true
13
14cond_true:
15  %tmp5 = add i32 %b, 1
16  ret i32 %tmp5
17
18cond_false:
19  %tmp7 = add i32 %b, -1
20  ret i32 %tmp7
21}
22
23define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d, i8** %retaddr) {
24; CHECK-LABEL: t2:
25; CHECK: Block address taken
26; CHECK: %cond_true
27; CHECK: add
28; CHECK: bx lr
29  store i8* blockaddress(@t2, %cond_true), i8** %retaddr
30  %tmp2 = icmp sgt i32 %c, 10
31  %tmp5 = icmp slt i32 %d, 4
32  %tmp8 = and i1 %tmp5, %tmp2
33  %tmp13 = add i32 %b, %a
34  br i1 %tmp8, label %cond_true, label %UnifiedReturnBlock
35
36cond_true:
37  %tmp15 = add i32 %tmp13, %c
38  %tmp1821 = sub i32 %tmp15, %d
39  ret i32 %tmp1821
40
41UnifiedReturnBlock:
42  ret i32 %tmp13
43}
44
45define hidden fastcc void @t3(i8** %retaddr) {
46; CHECK-LABEL: t3:
47; CHECK: Block address taken
48; CHECK-NOT: Address of block that was removed by CodeGen
49bb:
50  store i8* blockaddress(@t3, %KBBlockZero_return_1), i8** %retaddr
51  br i1 undef, label %bb77, label %bb7.i
52
53bb7.i:                                            ; preds = %bb35
54  br label %bb2.i
55
56KBBlockZero_return_1:                             ; preds = %KBBlockZero.exit
57  unreachable
58
59KBBlockZero_return_0:                             ; preds = %KBBlockZero.exit
60  unreachable
61
62bb77:                                             ; preds = %bb26, %bb12, %bb
63  ret void
64
65bb2.i:                                            ; preds = %bb6.i350, %bb7.i
66  br i1 undef, label %bb6.i350, label %KBBlockZero.exit
67
68bb6.i350:                                         ; preds = %bb2.i
69  br label %bb2.i
70
71KBBlockZero.exit:                                 ; preds = %bb2.i
72  indirectbr i8* undef, [label %KBBlockZero_return_1, label %KBBlockZero_return_0]
73}
74
75
76; If-converter was checking for the wrong predicate subsumes pattern when doing
77; nested predicates.
78; E.g., Let A be a basic block that flows conditionally into B and B be a
79; predicated block.
80; B can be predicated with A.BrToBPredicate into A iff B.Predicate is less
81; "permissive" than A.BrToBPredicate, i.e., iff A.BrToBPredicate subsumes
82; B.Predicate.
83; <rdar://problem/14379453>
84
85; Hard-coded registers comes from the ABI.
86; CHECK-LABEL: wrapDistance:
87; CHECK: cmp r1, #59
88; CHECK-NEXT: itt le
89; CHECK-NEXT: suble r0, r2, #1
90; CHECK-NEXT: bxle lr
91; CHECK-NEXT: subs [[REG:r[0-9]+]], #120
92; CHECK-NEXT: cmp [[REG]], r1
93; CHECK-NOT: it lt
94; CHECK-NEXT: bge [[LABEL:.+]]
95; Next BB
96; CHECK-NOT: cmplt
97; CHECK: cmp r0, #119
98; CHECK-NEXT: itt le
99; CHECK-NEXT: addle r0, r1, #1
100; CHECK-NEXT: bxle lr
101; Next BB
102; CHECK: [[LABEL]]:
103; CHECK-NEXT: subs r0, r1, r0
104; CHECK-NEXT: bx lr
105
106; CHECK-V8-LABEL: wrapDistance:
107; CHECK-V8: cmp r1, #59
108; CHECK-V8-NEXT: bgt
109; CHECK-V8-NEXT: %if.then
110; CHECK-V8-NEXT: subs r0, r2, #1
111; CHECK-V8-NEXT: bx lr
112; CHECK-V8-NEXT: %if.else
113; CHECK-V8-NEXT: subs [[REG:r[0-9]+]], #120
114; CHECK-V8-NEXT: cmp [[REG]], r1
115; CHECK-V8-NEXT: bge
116; CHECK-V8-NEXT: %if.else
117; CHECK-V8-NEXT: cmp r0, #119
118; CHECK-V8-NEXT: bgt
119; CHECK-V8-NEXT: %if.then4
120; CHECK-V8-NEXT: adds r0, r1, #1
121; CHECK-V8-NEXT: bx lr
122; CHECK-V8-NEXT: %if.end5
123; CHECK-V8-NEXT: subs r0, r1, r0
124; CHECK-V8-NEXT: bx lr
125
126define i32 @wrapDistance(i32 %tx, i32 %sx, i32 %w) {
127entry:
128  %cmp = icmp slt i32 %sx, 60
129  br i1 %cmp, label %if.then, label %if.else
130
131if.then:                                          ; preds = %entry
132  %sub = add nsw i32 %w, -1
133  br label %return
134
135if.else:                                          ; preds = %entry
136  %sub1 = add nsw i32 %w, -120
137  %cmp2 = icmp slt i32 %sub1, %sx
138  %cmp3 = icmp slt i32 %tx, 120
139  %or.cond = and i1 %cmp2, %cmp3
140  br i1 %or.cond, label %if.then4, label %if.end5
141
142if.then4:                                         ; preds = %if.else
143  %add = add nsw i32 %sx, 1
144  br label %return
145
146if.end5:                                          ; preds = %if.else
147  %sub6 = sub nsw i32 %sx, %tx
148  br label %return
149
150return:                                           ; preds = %if.end5, %if.then4, %if.then
151  %retval.0 = phi i32 [ %sub, %if.then ], [ %add, %if.then4 ], [ %sub6, %if.end5 ]
152  ret i32 %retval.0
153}
154