xref: /llvm-project/llvm/test/CodeGen/ARM/2012-05-04-vmov.ll (revision 7258735fa0b60dd7800f5b9859aceeee16bb4990)
1*7258735fSSaleem Abdulrasool; RUN: llc -O1 -mtriple=arm-eabi -mcpu=cortex-a9 %s -o - \
2*7258735fSSaleem Abdulrasool; RUN:  | FileCheck -check-prefix=A9-CHECK %s
3*7258735fSSaleem Abdulrasool
4*7258735fSSaleem Abdulrasool; RUN: llc -O1 -mtriple=arm-eabi -mcpu=swift %s -o - \
5*7258735fSSaleem Abdulrasool; RUN:  | FileCheck -check-prefix=SWIFT-CHECK %s
6*7258735fSSaleem Abdulrasool
7e8a549cdSBob Wilson; Check that swift doesn't use vmov.32. <rdar://problem/10453003>.
8e8a549cdSBob Wilson
9e8a549cdSBob Wilsondefine <2 x i32> @testuvec(<2 x i32> %A, <2 x i32> %B) nounwind {
10e8a549cdSBob Wilsonentry:
11e8a549cdSBob Wilson  %div = udiv <2 x i32> %A, %B
12e8a549cdSBob Wilson  ret <2 x i32> %div
13e8a549cdSBob Wilson; A9-CHECK: vmov.32
1404b3a0fdSQuentin Colombet; vmov.32 should not be used to get a lane:
1504b3a0fdSQuentin Colombet; vmov.32 <dst>, <src>[<lane>].
1604b3a0fdSQuentin Colombet; but vmov.32 <dst>[<lane>], <src> is fine.
1704b3a0fdSQuentin Colombet; SWIFT-CHECK-NOT: vmov.32 {{r[0-9]+}}, {{d[0-9]\[[0-9]+\]}}
18e8a549cdSBob Wilson}
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