xref: /llvm-project/llvm/test/CodeGen/ARM/2009-06-19-RegScavengerAssert.ll (revision c8054d90fbe7ff386577c27dd51d597924036cde)
1*c8054d90SDan Gohman; RUN: llc < %s -mtriple=armv6-eabi -mattr=+vfp2 -float-abi=hard
2c6a8d0dbSEvan Cheng; PR4419
3c6a8d0dbSEvan Cheng
4c6a8d0dbSEvan Chengdefine float @__ieee754_acosf(float %x) nounwind {
5c6a8d0dbSEvan Chengentry:
6c6a8d0dbSEvan Cheng	br i1 undef, label %bb, label %bb4
7c6a8d0dbSEvan Cheng
8c6a8d0dbSEvan Chengbb:		; preds = %entry
9c6a8d0dbSEvan Cheng	ret float undef
10c6a8d0dbSEvan Cheng
11c6a8d0dbSEvan Chengbb4:		; preds = %entry
12c6a8d0dbSEvan Cheng	br i1 undef, label %bb5, label %bb6
13c6a8d0dbSEvan Cheng
14c6a8d0dbSEvan Chengbb5:		; preds = %bb4
15c6a8d0dbSEvan Cheng	ret float undef
16c6a8d0dbSEvan Cheng
17c6a8d0dbSEvan Chengbb6:		; preds = %bb4
18c6a8d0dbSEvan Cheng	br i1 undef, label %bb11, label %bb12
19c6a8d0dbSEvan Cheng
20c6a8d0dbSEvan Chengbb11:		; preds = %bb6
21c6a8d0dbSEvan Cheng	%0 = tail call float @__ieee754_sqrtf(float undef) nounwind		; <float> [#uses=1]
22c6a8d0dbSEvan Cheng	%1 = fmul float %0, -2.000000e+00		; <float> [#uses=1]
23c6a8d0dbSEvan Cheng	%2 = fadd float %1, 0x400921FB40000000		; <float> [#uses=1]
24c6a8d0dbSEvan Cheng	ret float %2
25c6a8d0dbSEvan Cheng
26c6a8d0dbSEvan Chengbb12:		; preds = %bb6
27c6a8d0dbSEvan Cheng	ret float undef
28c6a8d0dbSEvan Cheng}
29c6a8d0dbSEvan Cheng
30c6a8d0dbSEvan Chengdeclare float @__ieee754_sqrtf(float)
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