xref: /llvm-project/llvm/test/CodeGen/AMDGPU/sreg-xnull-regclass-bitwidth.mir (revision e8811ad3cc2a840dcacde2f7ddea599d82f3b4e3)
1*e8811ad3SShoreshen# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
2*e8811ad3SShoreshen# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -run-pass=postmisched -o - %s | FileCheck %s
3*e8811ad3SShoreshen---
4*e8811ad3SShoreshenname:            test_xnull_256
5*e8811ad3SShoreshenbody:             |
6*e8811ad3SShoreshen  bb.0:
7*e8811ad3SShoreshen    ; CHECK-LABEL: name: test_xnull_256
8*e8811ad3SShoreshen    ; CHECK: IMAGE_STORE_V4_V2_gfx90a $vgpr0_vgpr1_vgpr2_vgpr3, killed $vgpr8_vgpr9, killed $sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31, 15, -1, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), addrspace 8)
9*e8811ad3SShoreshen    ; CHECK-NEXT: $vgpr2 = V_LSHRREV_B32_e32 4, killed $vgpr2, implicit $exec
10*e8811ad3SShoreshen  IMAGE_STORE_V4_V2_gfx90a $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr8_vgpr9, $sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31, 15, -1, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), addrspace 8)
11*e8811ad3SShoreshen  $vgpr2 = V_LSHRREV_B32_e32 4, $vgpr2, implicit $exec
12*e8811ad3SShoreshen...
13*e8811ad3SShoreshen
14*e8811ad3SShoreshen
15*e8811ad3SShoreshen# FIXME: We need xnull_128 test case (which reach unreachable in function AMDGPU::getRegBitWidth). Currently cannot find one
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