1*bd9145c8SJanek van Oirschot; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s | FileCheck %s 2*bd9145c8SJanek van Oirschot 3*bd9145c8SJanek van Oirschot; CHECK-LABEL: {{^}}qux 4*bd9145c8SJanek van Oirschot; CHECK: .set qux.num_vgpr, max(71, foo.num_vgpr) 5*bd9145c8SJanek van Oirschot; CHECK: .set qux.num_agpr, max(0, foo.num_agpr) 6*bd9145c8SJanek van Oirschot; CHECK: .set qux.numbered_sgpr, max(46, foo.numbered_sgpr) 7*bd9145c8SJanek van Oirschot; CHECK: .set qux.private_seg_size, 16 8*bd9145c8SJanek van Oirschot; CHECK: .set qux.uses_vcc, or(1, foo.uses_vcc) 9*bd9145c8SJanek van Oirschot; CHECK: .set qux.uses_flat_scratch, or(0, foo.uses_flat_scratch) 10*bd9145c8SJanek van Oirschot; CHECK: .set qux.has_dyn_sized_stack, or(0, foo.has_dyn_sized_stack) 11*bd9145c8SJanek van Oirschot; CHECK: .set qux.has_recursion, or(1, foo.has_recursion) 12*bd9145c8SJanek van Oirschot; CHECK: .set qux.has_indirect_call, or(0, foo.has_indirect_call) 13*bd9145c8SJanek van Oirschot 14*bd9145c8SJanek van Oirschot; CHECK-LABEL: {{^}}baz 15*bd9145c8SJanek van Oirschot; CHECK: .set baz.num_vgpr, max(61, qux.num_vgpr) 16*bd9145c8SJanek van Oirschot; CHECK: .set baz.num_agpr, max(0, qux.num_agpr) 17*bd9145c8SJanek van Oirschot; CHECK: .set baz.numbered_sgpr, max(51, qux.numbered_sgpr) 18*bd9145c8SJanek van Oirschot; CHECK: .set baz.private_seg_size, 16+(max(qux.private_seg_size)) 19*bd9145c8SJanek van Oirschot; CHECK: .set baz.uses_vcc, or(1, qux.uses_vcc) 20*bd9145c8SJanek van Oirschot; CHECK: .set baz.uses_flat_scratch, or(0, qux.uses_flat_scratch) 21*bd9145c8SJanek van Oirschot; CHECK: .set baz.has_dyn_sized_stack, or(0, qux.has_dyn_sized_stack) 22*bd9145c8SJanek van Oirschot; CHECK: .set baz.has_recursion, or(1, qux.has_recursion) 23*bd9145c8SJanek van Oirschot; CHECK: .set baz.has_indirect_call, or(0, qux.has_indirect_call) 24*bd9145c8SJanek van Oirschot 25*bd9145c8SJanek van Oirschot; CHECK-LABEL: {{^}}bar 26*bd9145c8SJanek van Oirschot; CHECK: .set bar.num_vgpr, max(51, baz.num_vgpr) 27*bd9145c8SJanek van Oirschot; CHECK: .set bar.num_agpr, max(0, baz.num_agpr) 28*bd9145c8SJanek van Oirschot; CHECK: .set bar.numbered_sgpr, max(61, baz.numbered_sgpr) 29*bd9145c8SJanek van Oirschot; CHECK: .set bar.private_seg_size, 16+(max(baz.private_seg_size)) 30*bd9145c8SJanek van Oirschot; CHECK: .set bar.uses_vcc, or(1, baz.uses_vcc) 31*bd9145c8SJanek van Oirschot; CHECK: .set bar.uses_flat_scratch, or(0, baz.uses_flat_scratch) 32*bd9145c8SJanek van Oirschot; CHECK: .set bar.has_dyn_sized_stack, or(0, baz.has_dyn_sized_stack) 33*bd9145c8SJanek van Oirschot; CHECK: .set bar.has_recursion, or(1, baz.has_recursion) 34*bd9145c8SJanek van Oirschot; CHECK: .set bar.has_indirect_call, or(0, baz.has_indirect_call) 35*bd9145c8SJanek van Oirschot 36*bd9145c8SJanek van Oirschot; CHECK-LABEL: {{^}}foo 37*bd9145c8SJanek van Oirschot; CHECK: .set foo.num_vgpr, max(46, amdgpu.max_num_vgpr) 38*bd9145c8SJanek van Oirschot; CHECK: .set foo.num_agpr, max(0, amdgpu.max_num_agpr) 39*bd9145c8SJanek van Oirschot; CHECK: .set foo.numbered_sgpr, max(71, amdgpu.max_num_sgpr) 40*bd9145c8SJanek van Oirschot; CHECK: .set foo.private_seg_size, 16 41*bd9145c8SJanek van Oirschot; CHECK: .set foo.uses_vcc, 1 42*bd9145c8SJanek van Oirschot; CHECK: .set foo.uses_flat_scratch, 0 43*bd9145c8SJanek van Oirschot; CHECK: .set foo.has_dyn_sized_stack, 0 44*bd9145c8SJanek van Oirschot; CHECK: .set foo.has_recursion, 1 45*bd9145c8SJanek van Oirschot; CHECK: .set foo.has_indirect_call, 0 46*bd9145c8SJanek van Oirschot 47*bd9145c8SJanek van Oirschotdefine void @foo() { 48*bd9145c8SJanek van Oirschotentry: 49*bd9145c8SJanek van Oirschot call void @bar() 50*bd9145c8SJanek van Oirschot call void asm sideeffect "", "~{v45}"() 51*bd9145c8SJanek van Oirschot call void asm sideeffect "", "~{s70}"() 52*bd9145c8SJanek van Oirschot ret void 53*bd9145c8SJanek van Oirschot} 54*bd9145c8SJanek van Oirschot 55*bd9145c8SJanek van Oirschotdefine void @bar() { 56*bd9145c8SJanek van Oirschotentry: 57*bd9145c8SJanek van Oirschot call void @baz() 58*bd9145c8SJanek van Oirschot call void asm sideeffect "", "~{v50}"() 59*bd9145c8SJanek van Oirschot call void asm sideeffect "", "~{s60}"() 60*bd9145c8SJanek van Oirschot ret void 61*bd9145c8SJanek van Oirschot} 62*bd9145c8SJanek van Oirschot 63*bd9145c8SJanek van Oirschotdefine void @baz() { 64*bd9145c8SJanek van Oirschotentry: 65*bd9145c8SJanek van Oirschot call void @qux() 66*bd9145c8SJanek van Oirschot call void asm sideeffect "", "~{v60}"() 67*bd9145c8SJanek van Oirschot call void asm sideeffect "", "~{s50}"() 68*bd9145c8SJanek van Oirschot ret void 69*bd9145c8SJanek van Oirschot} 70*bd9145c8SJanek van Oirschot 71*bd9145c8SJanek van Oirschotdefine void @qux() { 72*bd9145c8SJanek van Oirschotentry: 73*bd9145c8SJanek van Oirschot call void @foo() 74*bd9145c8SJanek van Oirschot call void asm sideeffect "", "~{v70}"() 75*bd9145c8SJanek van Oirschot call void asm sideeffect "", "~{s45}"() 76*bd9145c8SJanek van Oirschot ret void 77*bd9145c8SJanek van Oirschot} 78*bd9145c8SJanek van Oirschot 79*bd9145c8SJanek van Oirschot; CHECK-LABEL: {{^}}usefoo 80*bd9145c8SJanek van Oirschot; CHECK: .set usefoo.num_vgpr, max(32, foo.num_vgpr) 81*bd9145c8SJanek van Oirschot; CHECK: .set usefoo.num_agpr, max(0, foo.num_agpr) 82*bd9145c8SJanek van Oirschot; CHECK: .set usefoo.numbered_sgpr, max(33, foo.numbered_sgpr) 83*bd9145c8SJanek van Oirschot; CHECK: .set usefoo.private_seg_size, 0+(max(foo.private_seg_size)) 84*bd9145c8SJanek van Oirschot; CHECK: .set usefoo.uses_vcc, or(1, foo.uses_vcc) 85*bd9145c8SJanek van Oirschot; CHECK: .set usefoo.uses_flat_scratch, or(1, foo.uses_flat_scratch) 86*bd9145c8SJanek van Oirschot; CHECK: .set usefoo.has_dyn_sized_stack, or(0, foo.has_dyn_sized_stack) 87*bd9145c8SJanek van Oirschot; CHECK: .set usefoo.has_recursion, or(1, foo.has_recursion) 88*bd9145c8SJanek van Oirschot; CHECK: .set usefoo.has_indirect_call, or(0, foo.has_indirect_call) 89*bd9145c8SJanek van Oirschotdefine amdgpu_kernel void @usefoo() { 90*bd9145c8SJanek van Oirschot call void @foo() 91*bd9145c8SJanek van Oirschot ret void 92*bd9145c8SJanek van Oirschot} 93*bd9145c8SJanek van Oirschot 94