xref: /llvm-project/llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir (revision f61abee01a15d0339dea2d9f8e8da85b39b3b014) 
10a62980aSMatt Arsenault# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
20a62980aSMatt Arsenault# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -run-pass=localstackalloc -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX803 %s
30a62980aSMatt Arsenault# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=localstackalloc -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX900 %s
40a62980aSMatt Arsenault# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 -run-pass=localstackalloc -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX940 %s
50a62980aSMatt Arsenault# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 -mattr=+wavefrontsize64 -run-pass=localstackalloc -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX10 %s
60a62980aSMatt Arsenault# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+wavefrontsize64 -run-pass=localstackalloc -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX12 %s
70a62980aSMatt Arsenault
80a62980aSMatt Arsenault---
90a62980aSMatt Arsenaultname:            local_stack_alloc__v_add_co_u32_e32__literal_offsets
100a62980aSMatt ArsenaulttracksRegLiveness: true
110a62980aSMatt Arsenaultstack:
120a62980aSMatt Arsenault  - { id: 0, size: 4096, alignment: 4 }
130a62980aSMatt ArsenaultmachineFunctionInfo:
140a62980aSMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
150a62980aSMatt Arsenault  frameOffsetReg:  '$sgpr33'
160a62980aSMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
170a62980aSMatt Arsenaultbody:             |
180a62980aSMatt Arsenault  bb.0:
190a62980aSMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets
200a62980aSMatt Arsenault    ; GFX803: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 256
210a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
220a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_CO_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
230a62980aSMatt Arsenault    ; GFX803-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_CO_U32_e64_]]
240a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
250a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, [[V_ADD_CO_U32_e64_]], implicit-def dead $vcc, implicit $exec
260a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
270a62980aSMatt Arsenault    ; GFX803-NEXT: SI_RETURN
280a62980aSMatt Arsenault    ;
290a62980aSMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets
300a62980aSMatt Arsenault    ; GFX900: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 256
310a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
320a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
330a62980aSMatt Arsenault    ; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
340a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
350a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, [[V_ADD_U32_e64_]], implicit-def dead $vcc, implicit $exec
360a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
370a62980aSMatt Arsenault    ; GFX900-NEXT: SI_RETURN
380a62980aSMatt Arsenault    ;
390a62980aSMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets
400a62980aSMatt Arsenault    ; GFX940: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 256
410a62980aSMatt Arsenault    ; GFX940-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
428395b3f6SMatt Arsenault    ; GFX940-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32_xexec_hi = S_ADD_I32 killed [[S_MOV_B32_]], [[S_MOV_B32_1]], implicit-def dead $scc
430a62980aSMatt Arsenault    ; GFX940-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
440a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
450a62980aSMatt Arsenault    ; GFX940-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
460a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, [[COPY1]], implicit-def dead $vcc, implicit $exec
470a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
480a62980aSMatt Arsenault    ; GFX940-NEXT: SI_RETURN
490a62980aSMatt Arsenault    ;
500a62980aSMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets
510a62980aSMatt Arsenault    ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 256
520a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
530a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
540a62980aSMatt Arsenault    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
550a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
560a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, [[V_ADD_U32_e64_]], implicit-def dead $vcc, implicit $exec
570a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
580a62980aSMatt Arsenault    ; GFX10-NEXT: SI_RETURN
590a62980aSMatt Arsenault    ;
600a62980aSMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets
610a62980aSMatt Arsenault    ; GFX12: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 256
620a62980aSMatt Arsenault    ; GFX12-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
638395b3f6SMatt Arsenault    ; GFX12-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32_xexec_hi = S_ADD_I32 killed [[S_MOV_B32_]], [[S_MOV_B32_1]], implicit-def dead $scc
640a62980aSMatt Arsenault    ; GFX12-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
650a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
660a62980aSMatt Arsenault    ; GFX12-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
670a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, [[COPY1]], implicit-def dead $vcc, implicit $exec
680a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
690a62980aSMatt Arsenault    ; GFX12-NEXT: SI_RETURN
700a62980aSMatt Arsenault    %0:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
710a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0
720a62980aSMatt Arsenault    %1:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def dead $vcc, implicit $exec
730a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1
740a62980aSMatt Arsenault    SI_RETURN
750a62980aSMatt Arsenault
760a62980aSMatt Arsenault...
770a62980aSMatt Arsenault
780a62980aSMatt Arsenault---
790a62980aSMatt Arsenaultname:            local_stack_alloc__v_add_co_u32_e32__literal_offsets_live_vcc
800a62980aSMatt ArsenaulttracksRegLiveness: true
810a62980aSMatt Arsenaultstack:
820a62980aSMatt Arsenault  - { id: 0, size: 4096, alignment: 4 }
830a62980aSMatt ArsenaultmachineFunctionInfo:
840a62980aSMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
850a62980aSMatt Arsenault  frameOffsetReg:  '$sgpr33'
860a62980aSMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
870a62980aSMatt Arsenaultbody:             |
880a62980aSMatt Arsenault  bb.0:
890a62980aSMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets_live_vcc
900a62980aSMatt Arsenault    ; GFX803: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
910a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
920a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def $vcc, implicit $exec
930a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]], implicit $vcc
940a62980aSMatt Arsenault    ; GFX803-NEXT: SI_RETURN
950a62980aSMatt Arsenault    ;
960a62980aSMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets_live_vcc
970a62980aSMatt Arsenault    ; GFX900: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
980a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
990a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def $vcc, implicit $exec
1000a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]], implicit $vcc
1010a62980aSMatt Arsenault    ; GFX900-NEXT: SI_RETURN
1020a62980aSMatt Arsenault    ;
1030a62980aSMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets_live_vcc
1040a62980aSMatt Arsenault    ; GFX940: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
1050a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
1060a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def $vcc, implicit $exec
1070a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]], implicit $vcc
1080a62980aSMatt Arsenault    ; GFX940-NEXT: SI_RETURN
1090a62980aSMatt Arsenault    ;
1100a62980aSMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets_live_vcc
1110a62980aSMatt Arsenault    ; GFX10: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
1120a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
1130a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def $vcc, implicit $exec
1140a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]], implicit $vcc
1150a62980aSMatt Arsenault    ; GFX10-NEXT: SI_RETURN
1160a62980aSMatt Arsenault    ;
1170a62980aSMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets_live_vcc
1180a62980aSMatt Arsenault    ; GFX12: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
1190a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
1200a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def $vcc, implicit $exec
1210a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]], implicit $vcc
1220a62980aSMatt Arsenault    ; GFX12-NEXT: SI_RETURN
1230a62980aSMatt Arsenault    %0:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
1240a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0
1250a62980aSMatt Arsenault    %1:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def $vcc, implicit $exec
1260a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1, implicit $vcc
1270a62980aSMatt Arsenault    SI_RETURN
1280a62980aSMatt Arsenault
1290a62980aSMatt Arsenault...
1300a62980aSMatt Arsenault
1310a62980aSMatt Arsenault---
1320a62980aSMatt Arsenaultname:            local_stack_alloc__v_add_co_u32_e32__inline_imm_offsets
1330a62980aSMatt ArsenaulttracksRegLiveness: true
1340a62980aSMatt Arsenaultstack:
1350a62980aSMatt Arsenault  - { id: 0, size: 64, alignment: 4 }
1360a62980aSMatt ArsenaultmachineFunctionInfo:
1370a62980aSMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
1380a62980aSMatt Arsenault  frameOffsetReg:  '$sgpr33'
1390a62980aSMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
1400a62980aSMatt Arsenaultbody:             |
1410a62980aSMatt Arsenault  bb.0:
1420a62980aSMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__v_add_co_u32_e32__inline_imm_offsets
1430a62980aSMatt Arsenault    ; GFX803: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8
1440a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
1450a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_CO_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
1460a62980aSMatt Arsenault    ; GFX803-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_CO_U32_e64_]]
1470a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
1480a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 8, [[V_ADD_CO_U32_e64_]], implicit-def dead $vcc, implicit $exec
1490a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
1500a62980aSMatt Arsenault    ; GFX803-NEXT: SI_RETURN
1510a62980aSMatt Arsenault    ;
1520a62980aSMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e32__inline_imm_offsets
1530a62980aSMatt Arsenault    ; GFX900: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8
1540a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
1550a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
1560a62980aSMatt Arsenault    ; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
1570a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
1580a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 8, [[V_ADD_U32_e64_]], implicit-def dead $vcc, implicit $exec
1590a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
1600a62980aSMatt Arsenault    ; GFX900-NEXT: SI_RETURN
1610a62980aSMatt Arsenault    ;
1620a62980aSMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__v_add_co_u32_e32__inline_imm_offsets
1630a62980aSMatt Arsenault    ; GFX940: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8
1640a62980aSMatt Arsenault    ; GFX940-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
1658395b3f6SMatt Arsenault    ; GFX940-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32_xexec_hi = S_ADD_I32 killed [[S_MOV_B32_]], [[S_MOV_B32_1]], implicit-def dead $scc
1660a62980aSMatt Arsenault    ; GFX940-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
1670a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
1680a62980aSMatt Arsenault    ; GFX940-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
1690a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 8, [[COPY1]], implicit-def dead $vcc, implicit $exec
1700a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
1710a62980aSMatt Arsenault    ; GFX940-NEXT: SI_RETURN
1720a62980aSMatt Arsenault    ;
1730a62980aSMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e32__inline_imm_offsets
1740a62980aSMatt Arsenault    ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8
1750a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
1760a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
1770a62980aSMatt Arsenault    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
1780a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
1790a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 8, [[V_ADD_U32_e64_]], implicit-def dead $vcc, implicit $exec
1800a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
1810a62980aSMatt Arsenault    ; GFX10-NEXT: SI_RETURN
1820a62980aSMatt Arsenault    ;
1830a62980aSMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e32__inline_imm_offsets
1840a62980aSMatt Arsenault    ; GFX12: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8
1850a62980aSMatt Arsenault    ; GFX12-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
1868395b3f6SMatt Arsenault    ; GFX12-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32_xexec_hi = S_ADD_I32 killed [[S_MOV_B32_]], [[S_MOV_B32_1]], implicit-def dead $scc
1870a62980aSMatt Arsenault    ; GFX12-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
1880a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
1890a62980aSMatt Arsenault    ; GFX12-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
1900a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 8, [[COPY1]], implicit-def dead $vcc, implicit $exec
1910a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
1920a62980aSMatt Arsenault    ; GFX12-NEXT: SI_RETURN
1930a62980aSMatt Arsenault    %0:vgpr_32 = V_ADD_CO_U32_e32 8, %stack.0, implicit-def dead $vcc, implicit $exec
1940a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0
1950a62980aSMatt Arsenault    %1:vgpr_32 = V_ADD_CO_U32_e32 16, %stack.0, implicit-def dead $vcc, implicit $exec
1960a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1
1970a62980aSMatt Arsenault    SI_RETURN
1980a62980aSMatt Arsenault
1990a62980aSMatt Arsenault...
2000a62980aSMatt Arsenault
2010a62980aSMatt Arsenault---
2020a62980aSMatt Arsenaultname:            local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets
2030a62980aSMatt ArsenaulttracksRegLiveness: true
2040a62980aSMatt Arsenaultstack:
2050a62980aSMatt Arsenault  - { id: 0, size: 64, alignment: 4 }
2060a62980aSMatt ArsenaultmachineFunctionInfo:
2070a62980aSMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
2080a62980aSMatt Arsenault  frameOffsetReg:  '$sgpr33'
2090a62980aSMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
2100a62980aSMatt Arsenaultbody:             |
2110a62980aSMatt Arsenault  bb.0:
2120a62980aSMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets
2130a62980aSMatt Arsenault    ; GFX803: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8
2140a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
2150a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_CO_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
2160a62980aSMatt Arsenault    ; GFX803-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_CO_U32_e64_]]
2170a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
2180a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 8, [[V_ADD_CO_U32_e64_]], 0, implicit $exec
2190a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
2200a62980aSMatt Arsenault    ; GFX803-NEXT: SI_RETURN
2210a62980aSMatt Arsenault    ;
2220a62980aSMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets
2230a62980aSMatt Arsenault    ; GFX900: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8
2240a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
2250a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
2260a62980aSMatt Arsenault    ; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
2270a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
2280a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 8, [[V_ADD_U32_e64_]], 0, implicit $exec
2290a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
2300a62980aSMatt Arsenault    ; GFX900-NEXT: SI_RETURN
2310a62980aSMatt Arsenault    ;
2320a62980aSMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets
2330a62980aSMatt Arsenault    ; GFX940: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8
2340a62980aSMatt Arsenault    ; GFX940-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
2358395b3f6SMatt Arsenault    ; GFX940-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32_xexec_hi = S_ADD_I32 killed [[S_MOV_B32_]], [[S_MOV_B32_1]], implicit-def dead $scc
2360a62980aSMatt Arsenault    ; GFX940-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
2370a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
2380a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 8, [[S_ADD_I32_]], 0, implicit $exec
2390a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
2400a62980aSMatt Arsenault    ; GFX940-NEXT: SI_RETURN
2410a62980aSMatt Arsenault    ;
2420a62980aSMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets
2430a62980aSMatt Arsenault    ; GFX10: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8
2440a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
2450a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
2460a62980aSMatt Arsenault    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
2470a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
2480a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 8, [[V_ADD_U32_e64_]], 0, implicit $exec
2490a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
2500a62980aSMatt Arsenault    ; GFX10-NEXT: SI_RETURN
2510a62980aSMatt Arsenault    ;
2520a62980aSMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets
2530a62980aSMatt Arsenault    ; GFX12: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 8
2540a62980aSMatt Arsenault    ; GFX12-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
2558395b3f6SMatt Arsenault    ; GFX12-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32_xexec_hi = S_ADD_I32 killed [[S_MOV_B32_]], [[S_MOV_B32_1]], implicit-def dead $scc
2560a62980aSMatt Arsenault    ; GFX12-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
2570a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[COPY]]
2580a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 8, [[S_ADD_I32_]], 0, implicit $exec
2590a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
2600a62980aSMatt Arsenault    ; GFX12-NEXT: SI_RETURN
2610a62980aSMatt Arsenault    %0:vgpr_32, dead %2:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
2620a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0
2630a62980aSMatt Arsenault    %1:vgpr_32, dead %3:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
2640a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1
2650a62980aSMatt Arsenault    SI_RETURN
2660a62980aSMatt Arsenault
2670a62980aSMatt Arsenault...
2680a62980aSMatt Arsenault
2690a62980aSMatt Arsenault---
2700a62980aSMatt Arsenaultname:            local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets_live_vcc
2710a62980aSMatt ArsenaulttracksRegLiveness: true
2720a62980aSMatt Arsenaultstack:
2730a62980aSMatt Arsenault  - { id: 0, size: 64, alignment: 4 }
2740a62980aSMatt ArsenaultmachineFunctionInfo:
2750a62980aSMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
2760a62980aSMatt Arsenault  frameOffsetReg:  '$sgpr33'
2770a62980aSMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
2780a62980aSMatt Arsenaultbody:             |
2790a62980aSMatt Arsenault  bb.0:
2800a62980aSMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets_live_vcc
2810a62980aSMatt Arsenault    ; GFX803: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
2820a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
2830a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
2840a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
2850a62980aSMatt Arsenault    ; GFX803-NEXT: SI_RETURN implicit [[V_ADD_CO_U32_e64_1]]
2860a62980aSMatt Arsenault    ;
2870a62980aSMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets_live_vcc
2880a62980aSMatt Arsenault    ; GFX900: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
2890a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
2900a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
2910a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
2920a62980aSMatt Arsenault    ; GFX900-NEXT: SI_RETURN implicit [[V_ADD_CO_U32_e64_1]]
2930a62980aSMatt Arsenault    ;
2940a62980aSMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets_live_vcc
2950a62980aSMatt Arsenault    ; GFX940: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
2960a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
2970a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
2980a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
2990a62980aSMatt Arsenault    ; GFX940-NEXT: SI_RETURN implicit [[V_ADD_CO_U32_e64_1]]
3000a62980aSMatt Arsenault    ;
3010a62980aSMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets_live_vcc
3020a62980aSMatt Arsenault    ; GFX10: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
3030a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
3040a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
3050a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
3060a62980aSMatt Arsenault    ; GFX10-NEXT: SI_RETURN implicit [[V_ADD_CO_U32_e64_1]]
3070a62980aSMatt Arsenault    ;
3080a62980aSMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets_live_vcc
3090a62980aSMatt Arsenault    ; GFX12: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
3100a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
3110a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
3120a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
3130a62980aSMatt Arsenault    ; GFX12-NEXT: SI_RETURN implicit [[V_ADD_CO_U32_e64_1]]
3140a62980aSMatt Arsenault    %0:vgpr_32, %2:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
3150a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0
3160a62980aSMatt Arsenault    %1:vgpr_32, %3:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
3170a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1
3180a62980aSMatt Arsenault    SI_RETURN implicit %2
3190a62980aSMatt Arsenault
3200a62980aSMatt Arsenault...
3210a62980aSMatt Arsenault
3220a62980aSMatt Arsenault---
3230a62980aSMatt Arsenaultname:            local_stack_alloc__s_add_i32__literal_offsets
3240a62980aSMatt ArsenaulttracksRegLiveness: true
3250a62980aSMatt Arsenaultstack:
3260a62980aSMatt Arsenault  - { id: 0, size: 4096, alignment: 4 }
3270a62980aSMatt ArsenaultmachineFunctionInfo:
3280a62980aSMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
3290a62980aSMatt Arsenault  frameOffsetReg:  '$sgpr33'
3300a62980aSMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
3310a62980aSMatt Arsenaultbody:             |
3320a62980aSMatt Arsenault  bb.0:
3330a62980aSMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets
3340a62980aSMatt Arsenault    ; GFX803: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def dead $scc
3350a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_]]
3360a62980aSMatt Arsenault    ; GFX803-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def dead $scc
3370a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
3380a62980aSMatt Arsenault    ; GFX803-NEXT: SI_RETURN
3390a62980aSMatt Arsenault    ;
3400a62980aSMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets
3410a62980aSMatt Arsenault    ; GFX900: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def dead $scc
3420a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_]]
3430a62980aSMatt Arsenault    ; GFX900-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def dead $scc
3440a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
3450a62980aSMatt Arsenault    ; GFX900-NEXT: SI_RETURN
3460a62980aSMatt Arsenault    ;
3470a62980aSMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets
3480a62980aSMatt Arsenault    ; GFX940: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def dead $scc
3490a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_]]
3500a62980aSMatt Arsenault    ; GFX940-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def dead $scc
3510a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
3520a62980aSMatt Arsenault    ; GFX940-NEXT: SI_RETURN
3530a62980aSMatt Arsenault    ;
3540a62980aSMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets
3550a62980aSMatt Arsenault    ; GFX10: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def dead $scc
3560a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_]]
3570a62980aSMatt Arsenault    ; GFX10-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def dead $scc
3580a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
3590a62980aSMatt Arsenault    ; GFX10-NEXT: SI_RETURN
3600a62980aSMatt Arsenault    ;
3610a62980aSMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets
3620a62980aSMatt Arsenault    ; GFX12: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def dead $scc
3630a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_]]
3640a62980aSMatt Arsenault    ; GFX12-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def dead $scc
3650a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
3660a62980aSMatt Arsenault    ; GFX12-NEXT: SI_RETURN
3670a62980aSMatt Arsenault    %0:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def dead $scc
3680a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, %0
3690a62980aSMatt Arsenault    %1:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def dead $scc
3700a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, %1
3710a62980aSMatt Arsenault    SI_RETURN
3720a62980aSMatt Arsenault
3730a62980aSMatt Arsenault...
3740a62980aSMatt Arsenault
3750a62980aSMatt Arsenault---
3760a62980aSMatt Arsenaultname:            local_stack_alloc__s_add_i32__inline_imm_offsets
3770a62980aSMatt ArsenaulttracksRegLiveness: true
3780a62980aSMatt Arsenaultstack:
3790a62980aSMatt Arsenault  - { id: 0, size: 64, alignment: 4 }
3800a62980aSMatt ArsenaultmachineFunctionInfo:
3810a62980aSMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
3820a62980aSMatt Arsenault  frameOffsetReg:  '$sgpr33'
3830a62980aSMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
3840a62980aSMatt Arsenaultbody:             |
3850a62980aSMatt Arsenault  bb.0:
3860a62980aSMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__s_add_i32__inline_imm_offsets
3870a62980aSMatt Arsenault    ; GFX803: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 8, %stack.0, implicit-def dead $scc
3880a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
3890a62980aSMatt Arsenault    ; GFX803-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 16, %stack.0, implicit-def dead $scc
3900a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
3910a62980aSMatt Arsenault    ; GFX803-NEXT: SI_RETURN
3920a62980aSMatt Arsenault    ;
3930a62980aSMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__s_add_i32__inline_imm_offsets
3940a62980aSMatt Arsenault    ; GFX900: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 8, %stack.0, implicit-def dead $scc
3950a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
3960a62980aSMatt Arsenault    ; GFX900-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 16, %stack.0, implicit-def dead $scc
3970a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
3980a62980aSMatt Arsenault    ; GFX900-NEXT: SI_RETURN
3990a62980aSMatt Arsenault    ;
4000a62980aSMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__s_add_i32__inline_imm_offsets
4010a62980aSMatt Arsenault    ; GFX940: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 8, %stack.0, implicit-def dead $scc
4020a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
4030a62980aSMatt Arsenault    ; GFX940-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 16, %stack.0, implicit-def dead $scc
4040a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
4050a62980aSMatt Arsenault    ; GFX940-NEXT: SI_RETURN
4060a62980aSMatt Arsenault    ;
4070a62980aSMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__s_add_i32__inline_imm_offsets
4080a62980aSMatt Arsenault    ; GFX10: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 8, %stack.0, implicit-def dead $scc
4090a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
4100a62980aSMatt Arsenault    ; GFX10-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 16, %stack.0, implicit-def dead $scc
4110a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
4120a62980aSMatt Arsenault    ; GFX10-NEXT: SI_RETURN
4130a62980aSMatt Arsenault    ;
4140a62980aSMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__s_add_i32__inline_imm_offsets
4150a62980aSMatt Arsenault    ; GFX12: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 8, %stack.0, implicit-def dead $scc
4160a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
4170a62980aSMatt Arsenault    ; GFX12-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 16, %stack.0, implicit-def dead $scc
4180a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
4190a62980aSMatt Arsenault    ; GFX12-NEXT: SI_RETURN
4200a62980aSMatt Arsenault    %0:sreg_32 = S_ADD_I32 8, %stack.0, implicit-def dead $scc
4210a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:SREG_32 */, %0
4220a62980aSMatt Arsenault    %1:sreg_32 = S_ADD_I32 16, %stack.0, implicit-def dead $scc
4230a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:SREG_32 */, %1
4240a62980aSMatt Arsenault    SI_RETURN
4250a62980aSMatt Arsenault
4260a62980aSMatt Arsenault...
4270a62980aSMatt Arsenault
4280a62980aSMatt Arsenault---
429*f61abee0SMatt Arsenaultname:            local_stack_alloc__s_add_i32__reg_offsets
430*f61abee0SMatt ArsenaulttracksRegLiveness: true
431*f61abee0SMatt Arsenaultstack:
432*f61abee0SMatt Arsenault  - { id: 0, size: 64, alignment: 4 }
433*f61abee0SMatt ArsenaultmachineFunctionInfo:
434*f61abee0SMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
435*f61abee0SMatt Arsenault  frameOffsetReg:  '$sgpr33'
436*f61abee0SMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
437*f61abee0SMatt Arsenaultbody:             |
438*f61abee0SMatt Arsenault  bb.0:
439*f61abee0SMatt Arsenault    liveins: $sgpr4, $sgpr5
440*f61abee0SMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets
441*f61abee0SMatt Arsenault    ; GFX803: liveins: $sgpr4, $sgpr5
442*f61abee0SMatt Arsenault    ; GFX803-NEXT: {{  $}}
443*f61abee0SMatt Arsenault    ; GFX803-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
444*f61abee0SMatt Arsenault    ; GFX803-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
445*f61abee0SMatt Arsenault    ; GFX803-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], %stack.0, implicit-def dead $scc
446*f61abee0SMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
447*f61abee0SMatt Arsenault    ; GFX803-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], %stack.0, implicit-def dead $scc
448*f61abee0SMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
449*f61abee0SMatt Arsenault    ; GFX803-NEXT: SI_RETURN
450*f61abee0SMatt Arsenault    ;
451*f61abee0SMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets
452*f61abee0SMatt Arsenault    ; GFX900: liveins: $sgpr4, $sgpr5
453*f61abee0SMatt Arsenault    ; GFX900-NEXT: {{  $}}
454*f61abee0SMatt Arsenault    ; GFX900-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
455*f61abee0SMatt Arsenault    ; GFX900-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
456*f61abee0SMatt Arsenault    ; GFX900-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], %stack.0, implicit-def dead $scc
457*f61abee0SMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
458*f61abee0SMatt Arsenault    ; GFX900-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], %stack.0, implicit-def dead $scc
459*f61abee0SMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
460*f61abee0SMatt Arsenault    ; GFX900-NEXT: SI_RETURN
461*f61abee0SMatt Arsenault    ;
462*f61abee0SMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets
463*f61abee0SMatt Arsenault    ; GFX940: liveins: $sgpr4, $sgpr5
464*f61abee0SMatt Arsenault    ; GFX940-NEXT: {{  $}}
465*f61abee0SMatt Arsenault    ; GFX940-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
466*f61abee0SMatt Arsenault    ; GFX940-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
467*f61abee0SMatt Arsenault    ; GFX940-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], %stack.0, implicit-def dead $scc
468*f61abee0SMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
469*f61abee0SMatt Arsenault    ; GFX940-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], %stack.0, implicit-def dead $scc
470*f61abee0SMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
471*f61abee0SMatt Arsenault    ; GFX940-NEXT: SI_RETURN
472*f61abee0SMatt Arsenault    ;
473*f61abee0SMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets
474*f61abee0SMatt Arsenault    ; GFX10: liveins: $sgpr4, $sgpr5
475*f61abee0SMatt Arsenault    ; GFX10-NEXT: {{  $}}
476*f61abee0SMatt Arsenault    ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
477*f61abee0SMatt Arsenault    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
478*f61abee0SMatt Arsenault    ; GFX10-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], %stack.0, implicit-def dead $scc
479*f61abee0SMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
480*f61abee0SMatt Arsenault    ; GFX10-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], %stack.0, implicit-def dead $scc
481*f61abee0SMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
482*f61abee0SMatt Arsenault    ; GFX10-NEXT: SI_RETURN
483*f61abee0SMatt Arsenault    ;
484*f61abee0SMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets
485*f61abee0SMatt Arsenault    ; GFX12: liveins: $sgpr4, $sgpr5
486*f61abee0SMatt Arsenault    ; GFX12-NEXT: {{  $}}
487*f61abee0SMatt Arsenault    ; GFX12-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
488*f61abee0SMatt Arsenault    ; GFX12-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
489*f61abee0SMatt Arsenault    ; GFX12-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], %stack.0, implicit-def dead $scc
490*f61abee0SMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
491*f61abee0SMatt Arsenault    ; GFX12-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], %stack.0, implicit-def dead $scc
492*f61abee0SMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
493*f61abee0SMatt Arsenault    ; GFX12-NEXT: SI_RETURN
494*f61abee0SMatt Arsenault    %0:sreg_32 = COPY $sgpr4
495*f61abee0SMatt Arsenault    %1:sreg_32 = COPY $sgpr5
496*f61abee0SMatt Arsenault
497*f61abee0SMatt Arsenault    %2:sreg_32 = S_ADD_I32 %0, %stack.0, implicit-def dead $scc
498*f61abee0SMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:SREG_32 */, %2
499*f61abee0SMatt Arsenault    %3:sreg_32 = S_ADD_I32 %1, %stack.0, implicit-def dead $scc
500*f61abee0SMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:SREG_32 */, %3
501*f61abee0SMatt Arsenault    SI_RETURN
502*f61abee0SMatt Arsenault
503*f61abee0SMatt Arsenault...
504*f61abee0SMatt Arsenault
505*f61abee0SMatt Arsenault---
506*f61abee0SMatt Arsenaultname:            local_stack_alloc__s_add_i32__reg_offsets_commute
507*f61abee0SMatt ArsenaulttracksRegLiveness: true
508*f61abee0SMatt Arsenaultstack:
509*f61abee0SMatt Arsenault  - { id: 0, size: 64, alignment: 4 }
510*f61abee0SMatt ArsenaultmachineFunctionInfo:
511*f61abee0SMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
512*f61abee0SMatt Arsenault  frameOffsetReg:  '$sgpr33'
513*f61abee0SMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
514*f61abee0SMatt Arsenaultbody:             |
515*f61abee0SMatt Arsenault  bb.0:
516*f61abee0SMatt Arsenault    liveins: $sgpr4, $sgpr5
517*f61abee0SMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets_commute
518*f61abee0SMatt Arsenault    ; GFX803: liveins: $sgpr4, $sgpr5
519*f61abee0SMatt Arsenault    ; GFX803-NEXT: {{  $}}
520*f61abee0SMatt Arsenault    ; GFX803-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
521*f61abee0SMatt Arsenault    ; GFX803-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
522*f61abee0SMatt Arsenault    ; GFX803-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY]], implicit-def dead $scc
523*f61abee0SMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
524*f61abee0SMatt Arsenault    ; GFX803-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY1]], implicit-def dead $scc
525*f61abee0SMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
526*f61abee0SMatt Arsenault    ; GFX803-NEXT: SI_RETURN
527*f61abee0SMatt Arsenault    ;
528*f61abee0SMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets_commute
529*f61abee0SMatt Arsenault    ; GFX900: liveins: $sgpr4, $sgpr5
530*f61abee0SMatt Arsenault    ; GFX900-NEXT: {{  $}}
531*f61abee0SMatt Arsenault    ; GFX900-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
532*f61abee0SMatt Arsenault    ; GFX900-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
533*f61abee0SMatt Arsenault    ; GFX900-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY]], implicit-def dead $scc
534*f61abee0SMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
535*f61abee0SMatt Arsenault    ; GFX900-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY1]], implicit-def dead $scc
536*f61abee0SMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
537*f61abee0SMatt Arsenault    ; GFX900-NEXT: SI_RETURN
538*f61abee0SMatt Arsenault    ;
539*f61abee0SMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets_commute
540*f61abee0SMatt Arsenault    ; GFX940: liveins: $sgpr4, $sgpr5
541*f61abee0SMatt Arsenault    ; GFX940-NEXT: {{  $}}
542*f61abee0SMatt Arsenault    ; GFX940-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
543*f61abee0SMatt Arsenault    ; GFX940-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
544*f61abee0SMatt Arsenault    ; GFX940-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY]], implicit-def dead $scc
545*f61abee0SMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
546*f61abee0SMatt Arsenault    ; GFX940-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY1]], implicit-def dead $scc
547*f61abee0SMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
548*f61abee0SMatt Arsenault    ; GFX940-NEXT: SI_RETURN
549*f61abee0SMatt Arsenault    ;
550*f61abee0SMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets_commute
551*f61abee0SMatt Arsenault    ; GFX10: liveins: $sgpr4, $sgpr5
552*f61abee0SMatt Arsenault    ; GFX10-NEXT: {{  $}}
553*f61abee0SMatt Arsenault    ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
554*f61abee0SMatt Arsenault    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
555*f61abee0SMatt Arsenault    ; GFX10-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY]], implicit-def dead $scc
556*f61abee0SMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
557*f61abee0SMatt Arsenault    ; GFX10-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY1]], implicit-def dead $scc
558*f61abee0SMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
559*f61abee0SMatt Arsenault    ; GFX10-NEXT: SI_RETURN
560*f61abee0SMatt Arsenault    ;
561*f61abee0SMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets_commute
562*f61abee0SMatt Arsenault    ; GFX12: liveins: $sgpr4, $sgpr5
563*f61abee0SMatt Arsenault    ; GFX12-NEXT: {{  $}}
564*f61abee0SMatt Arsenault    ; GFX12-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
565*f61abee0SMatt Arsenault    ; GFX12-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
566*f61abee0SMatt Arsenault    ; GFX12-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY]], implicit-def dead $scc
567*f61abee0SMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_]]
568*f61abee0SMatt Arsenault    ; GFX12-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY1]], implicit-def dead $scc
569*f61abee0SMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[S_ADD_I32_1]]
570*f61abee0SMatt Arsenault    ; GFX12-NEXT: SI_RETURN
571*f61abee0SMatt Arsenault    %0:sreg_32 = COPY $sgpr4
572*f61abee0SMatt Arsenault    %1:sreg_32 = COPY $sgpr5
573*f61abee0SMatt Arsenault
574*f61abee0SMatt Arsenault    %2:sreg_32 = S_ADD_I32 %stack.0, %0, implicit-def dead $scc
575*f61abee0SMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:SREG_32 */, %2
576*f61abee0SMatt Arsenault    %3:sreg_32 = S_ADD_I32 %stack.0, %1, implicit-def dead $scc
577*f61abee0SMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:SREG_32 */, %3
578*f61abee0SMatt Arsenault    SI_RETURN
579*f61abee0SMatt Arsenault
580*f61abee0SMatt Arsenault...
581*f61abee0SMatt Arsenault
582*f61abee0SMatt Arsenault---
5830a62980aSMatt Arsenaultname:            local_stack_alloc__s_add_i32__literal_offsets_live_scc
5840a62980aSMatt ArsenaulttracksRegLiveness: true
5850a62980aSMatt Arsenaultstack:
5860a62980aSMatt Arsenault  - { id: 0, size: 4096, alignment: 4 }
5870a62980aSMatt ArsenaultmachineFunctionInfo:
5880a62980aSMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
5890a62980aSMatt Arsenault  frameOffsetReg:  '$sgpr33'
5900a62980aSMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
5910a62980aSMatt Arsenaultbody:             |
5920a62980aSMatt Arsenault  bb.0:
5930a62980aSMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets_live_scc
5940a62980aSMatt Arsenault    ; GFX803: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def $scc
5950a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_]]
5960a62980aSMatt Arsenault    ; GFX803-NEXT: S_NOP 0, implicit $scc
5970a62980aSMatt Arsenault    ; GFX803-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def $scc
5980a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
5990a62980aSMatt Arsenault    ; GFX803-NEXT: SI_RETURN implicit $scc
6000a62980aSMatt Arsenault    ;
6010a62980aSMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets_live_scc
6020a62980aSMatt Arsenault    ; GFX900: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def $scc
6030a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_]]
6040a62980aSMatt Arsenault    ; GFX900-NEXT: S_NOP 0, implicit $scc
6050a62980aSMatt Arsenault    ; GFX900-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def $scc
6060a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
6070a62980aSMatt Arsenault    ; GFX900-NEXT: SI_RETURN implicit $scc
6080a62980aSMatt Arsenault    ;
6090a62980aSMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets_live_scc
6100a62980aSMatt Arsenault    ; GFX940: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def $scc
6110a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_]]
6120a62980aSMatt Arsenault    ; GFX940-NEXT: S_NOP 0, implicit $scc
6130a62980aSMatt Arsenault    ; GFX940-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def $scc
6140a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
6150a62980aSMatt Arsenault    ; GFX940-NEXT: SI_RETURN implicit $scc
6160a62980aSMatt Arsenault    ;
6170a62980aSMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets_live_scc
6180a62980aSMatt Arsenault    ; GFX10: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def $scc
6190a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_]]
6200a62980aSMatt Arsenault    ; GFX10-NEXT: S_NOP 0, implicit $scc
6210a62980aSMatt Arsenault    ; GFX10-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def $scc
6220a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
6230a62980aSMatt Arsenault    ; GFX10-NEXT: SI_RETURN implicit $scc
6240a62980aSMatt Arsenault    ;
6250a62980aSMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets_live_scc
6260a62980aSMatt Arsenault    ; GFX12: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def $scc
6270a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_]]
6280a62980aSMatt Arsenault    ; GFX12-NEXT: S_NOP 0, implicit $scc
6290a62980aSMatt Arsenault    ; GFX12-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def $scc
6300a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
6310a62980aSMatt Arsenault    ; GFX12-NEXT: SI_RETURN implicit $scc
6320a62980aSMatt Arsenault    %0:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def $scc
6330a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, %0
6340a62980aSMatt Arsenault    S_NOP 0, implicit $scc
6350a62980aSMatt Arsenault    %1:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def $scc
6360a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:SReg_32 */, %1
6370a62980aSMatt Arsenault    SI_RETURN implicit $scc
6380a62980aSMatt Arsenault
6390a62980aSMatt Arsenault...
6400a62980aSMatt Arsenault
6410a62980aSMatt Arsenault---
6420a62980aSMatt Arsenaultname:            local_stack_alloc__v_add_co_u32_e32__vgpr_offsets
6430a62980aSMatt ArsenaulttracksRegLiveness: true
6440a62980aSMatt Arsenaultstack:
6450a62980aSMatt Arsenault  - { id: 0, size: 4096, alignment: 4 }
6460a62980aSMatt ArsenaultmachineFunctionInfo:
6470a62980aSMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
6480a62980aSMatt Arsenault  frameOffsetReg:  '$sgpr33'
6490a62980aSMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
6500a62980aSMatt Arsenaultbody:             |
6510a62980aSMatt Arsenault  bb.0:
6520a62980aSMatt Arsenault    liveins: $vgpr0
6530a62980aSMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets
6540a62980aSMatt Arsenault    ; GFX803: liveins: $vgpr0
6550a62980aSMatt Arsenault    ; GFX803-NEXT: {{  $}}
6560a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
6570a62980aSMatt Arsenault    ; GFX803-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
6580a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
6590a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
6600a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
6610a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
6620a62980aSMatt Arsenault    ; GFX803-NEXT: SI_RETURN
6630a62980aSMatt Arsenault    ;
6640a62980aSMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets
6650a62980aSMatt Arsenault    ; GFX900: liveins: $vgpr0
6660a62980aSMatt Arsenault    ; GFX900-NEXT: {{  $}}
6670a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
6680a62980aSMatt Arsenault    ; GFX900-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
6690a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
6700a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
6710a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
6720a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
6730a62980aSMatt Arsenault    ; GFX900-NEXT: SI_RETURN
6740a62980aSMatt Arsenault    ;
6750a62980aSMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets
6760a62980aSMatt Arsenault    ; GFX940: liveins: $vgpr0
6770a62980aSMatt Arsenault    ; GFX940-NEXT: {{  $}}
6780a62980aSMatt Arsenault    ; GFX940-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
6790a62980aSMatt Arsenault    ; GFX940-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
6800a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
6810a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
6820a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
6830a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
6840a62980aSMatt Arsenault    ; GFX940-NEXT: SI_RETURN
6850a62980aSMatt Arsenault    ;
6860a62980aSMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets
6870a62980aSMatt Arsenault    ; GFX10: liveins: $vgpr0
6880a62980aSMatt Arsenault    ; GFX10-NEXT: {{  $}}
6890a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
6900a62980aSMatt Arsenault    ; GFX10-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
6910a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
6920a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
6930a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
6940a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
6950a62980aSMatt Arsenault    ; GFX10-NEXT: SI_RETURN
6960a62980aSMatt Arsenault    ;
6970a62980aSMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets
6980a62980aSMatt Arsenault    ; GFX12: liveins: $vgpr0
6990a62980aSMatt Arsenault    ; GFX12-NEXT: {{  $}}
7000a62980aSMatt Arsenault    ; GFX12-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
7010a62980aSMatt Arsenault    ; GFX12-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
7020a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
7030a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
7040a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
7050a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
7060a62980aSMatt Arsenault    ; GFX12-NEXT: SI_RETURN
7070a62980aSMatt Arsenault    %vgpr_offset:vgpr_32 = COPY $vgpr0
7080a62980aSMatt Arsenault    %0:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
7090a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0
7100a62980aSMatt Arsenault    %1:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
7110a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1
7120a62980aSMatt Arsenault    SI_RETURN
7130a62980aSMatt Arsenault
7140a62980aSMatt Arsenault...
7150a62980aSMatt Arsenault
7160a62980aSMatt Arsenault---
7170a62980aSMatt Arsenaultname:            local_stack_alloc__v_add_co_u32_e32__vgpr_offsets_commute
7180a62980aSMatt ArsenaulttracksRegLiveness: true
7190a62980aSMatt Arsenaultstack:
7200a62980aSMatt Arsenault  - { id: 0, size: 4096, alignment: 4 }
7210a62980aSMatt ArsenaultmachineFunctionInfo:
7220a62980aSMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
7230a62980aSMatt Arsenault  frameOffsetReg:  '$sgpr33'
7240a62980aSMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
7250a62980aSMatt Arsenaultbody:             |
7260a62980aSMatt Arsenault  bb.0:
7270a62980aSMatt Arsenault    liveins: $vgpr0
7280a62980aSMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets_commute
7290a62980aSMatt Arsenault    ; GFX803: liveins: $vgpr0
7300a62980aSMatt Arsenault    ; GFX803-NEXT: {{  $}}
7310a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
7320a62980aSMatt Arsenault    ; GFX803-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
7330a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
7340a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
7350a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
7360a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
7370a62980aSMatt Arsenault    ; GFX803-NEXT: SI_RETURN
7380a62980aSMatt Arsenault    ;
7390a62980aSMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets_commute
7400a62980aSMatt Arsenault    ; GFX900: liveins: $vgpr0
7410a62980aSMatt Arsenault    ; GFX900-NEXT: {{  $}}
7420a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
7430a62980aSMatt Arsenault    ; GFX900-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
7440a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
7450a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
7460a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
7470a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
7480a62980aSMatt Arsenault    ; GFX900-NEXT: SI_RETURN
7490a62980aSMatt Arsenault    ;
7500a62980aSMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets_commute
7510a62980aSMatt Arsenault    ; GFX940: liveins: $vgpr0
7520a62980aSMatt Arsenault    ; GFX940-NEXT: {{  $}}
7530a62980aSMatt Arsenault    ; GFX940-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
7540a62980aSMatt Arsenault    ; GFX940-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
7550a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
7560a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
7570a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
7580a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
7590a62980aSMatt Arsenault    ; GFX940-NEXT: SI_RETURN
7600a62980aSMatt Arsenault    ;
7610a62980aSMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets_commute
7620a62980aSMatt Arsenault    ; GFX10: liveins: $vgpr0
7630a62980aSMatt Arsenault    ; GFX10-NEXT: {{  $}}
7640a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
7650a62980aSMatt Arsenault    ; GFX10-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
7660a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
7670a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
7680a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
7690a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
7700a62980aSMatt Arsenault    ; GFX10-NEXT: SI_RETURN
7710a62980aSMatt Arsenault    ;
7720a62980aSMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets_commute
7730a62980aSMatt Arsenault    ; GFX12: liveins: $vgpr0
7740a62980aSMatt Arsenault    ; GFX12-NEXT: {{  $}}
7750a62980aSMatt Arsenault    ; GFX12-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
7760a62980aSMatt Arsenault    ; GFX12-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
7770a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
7780a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
7790a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
7800a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
7810a62980aSMatt Arsenault    ; GFX12-NEXT: SI_RETURN
7820a62980aSMatt Arsenault    %vgpr_offset:vgpr_32 = COPY $vgpr0
7830a62980aSMatt Arsenault    %0:vgpr_32 = V_ADD_CO_U32_e32 %stack.0, %vgpr_offset, implicit-def dead $vcc, implicit $exec
7840a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0
7850a62980aSMatt Arsenault    %1:vgpr_32 = V_ADD_CO_U32_e32 %stack.0, %vgpr_offset, implicit-def dead $vcc, implicit $exec
7860a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1
7870a62980aSMatt Arsenault    SI_RETURN
7880a62980aSMatt Arsenault
7890a62980aSMatt Arsenault...
7900a62980aSMatt Arsenault
7910a62980aSMatt Arsenault---
7920a62980aSMatt Arsenaultname:            local_stack_alloc__v_add_co_u32_e32__sgpr_offsets
7930a62980aSMatt ArsenaulttracksRegLiveness: true
7940a62980aSMatt Arsenaultstack:
7950a62980aSMatt Arsenault  - { id: 0, size: 4096, alignment: 4 }
7960a62980aSMatt ArsenaultmachineFunctionInfo:
7970a62980aSMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
7980a62980aSMatt Arsenault  frameOffsetReg:  '$sgpr33'
7990a62980aSMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
8000a62980aSMatt Arsenaultbody:             |
8010a62980aSMatt Arsenault  bb.0:
8020a62980aSMatt Arsenault    liveins: $sgpr8
8030a62980aSMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__v_add_co_u32_e32__sgpr_offsets
8040a62980aSMatt Arsenault    ; GFX803: liveins: $sgpr8
8050a62980aSMatt Arsenault    ; GFX803-NEXT: {{  $}}
8060a62980aSMatt Arsenault    ; GFX803-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
8070a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
8080a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
8090a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
8100a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
8110a62980aSMatt Arsenault    ; GFX803-NEXT: SI_RETURN
8120a62980aSMatt Arsenault    ;
8130a62980aSMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e32__sgpr_offsets
8140a62980aSMatt Arsenault    ; GFX900: liveins: $sgpr8
8150a62980aSMatt Arsenault    ; GFX900-NEXT: {{  $}}
8160a62980aSMatt Arsenault    ; GFX900-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
8170a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
8180a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
8190a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
8200a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
8210a62980aSMatt Arsenault    ; GFX900-NEXT: SI_RETURN
8220a62980aSMatt Arsenault    ;
8230a62980aSMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__v_add_co_u32_e32__sgpr_offsets
8240a62980aSMatt Arsenault    ; GFX940: liveins: $sgpr8
8250a62980aSMatt Arsenault    ; GFX940-NEXT: {{  $}}
8260a62980aSMatt Arsenault    ; GFX940-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
8270a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
8280a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
8290a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
8300a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
8310a62980aSMatt Arsenault    ; GFX940-NEXT: SI_RETURN
8320a62980aSMatt Arsenault    ;
8330a62980aSMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e32__sgpr_offsets
8340a62980aSMatt Arsenault    ; GFX10: liveins: $sgpr8
8350a62980aSMatt Arsenault    ; GFX10-NEXT: {{  $}}
8360a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
8370a62980aSMatt Arsenault    ; GFX10-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
8380a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
8390a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
8400a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
8410a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
8420a62980aSMatt Arsenault    ; GFX10-NEXT: SI_RETURN
8430a62980aSMatt Arsenault    ;
8440a62980aSMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e32__sgpr_offsets
8450a62980aSMatt Arsenault    ; GFX12: liveins: $sgpr8
8460a62980aSMatt Arsenault    ; GFX12-NEXT: {{  $}}
8470a62980aSMatt Arsenault    ; GFX12-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
8480a62980aSMatt Arsenault    ; GFX12-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
8490a62980aSMatt Arsenault    ; GFX12-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
8500a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, [[COPY]], implicit-def dead $vcc, implicit $exec
8510a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
8520a62980aSMatt Arsenault    ; GFX12-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
8530a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, [[COPY1]], implicit-def dead $vcc, implicit $exec
8540a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
8550a62980aSMatt Arsenault    ; GFX12-NEXT: SI_RETURN
8560a62980aSMatt Arsenault    %sgpr_offset:sreg_32 = COPY $sgpr8
8570a62980aSMatt Arsenault    %0:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
8580a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0
8590a62980aSMatt Arsenault    %1:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
8600a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1
8610a62980aSMatt Arsenault    SI_RETURN
8620a62980aSMatt Arsenault
8630a62980aSMatt Arsenault...
8640a62980aSMatt Arsenault
8650a62980aSMatt Arsenault---
8660a62980aSMatt Arsenaultname:            local_stack_alloc__v_add_co_u32_e64__sgpr_offsets
8670a62980aSMatt ArsenaulttracksRegLiveness: true
8680a62980aSMatt Arsenaultstack:
8690a62980aSMatt Arsenault  - { id: 0, size: 4096, alignment: 4 }
8700a62980aSMatt ArsenaultmachineFunctionInfo:
8710a62980aSMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
8720a62980aSMatt Arsenault  frameOffsetReg:  '$sgpr33'
8730a62980aSMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
8740a62980aSMatt Arsenaultbody:             |
8750a62980aSMatt Arsenault  bb.0:
8760a62980aSMatt Arsenault    liveins: $sgpr8
8770a62980aSMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets
8780a62980aSMatt Arsenault    ; GFX803: liveins: $sgpr8
8790a62980aSMatt Arsenault    ; GFX803-NEXT: {{  $}}
8800a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
8810a62980aSMatt Arsenault    ; GFX803-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
8820a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
8830a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
8840a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
8850a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
8860a62980aSMatt Arsenault    ; GFX803-NEXT: SI_RETURN
8870a62980aSMatt Arsenault    ;
8880a62980aSMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets
8890a62980aSMatt Arsenault    ; GFX900: liveins: $sgpr8
8900a62980aSMatt Arsenault    ; GFX900-NEXT: {{  $}}
8910a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
8920a62980aSMatt Arsenault    ; GFX900-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
8930a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
8940a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
8950a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
8960a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
8970a62980aSMatt Arsenault    ; GFX900-NEXT: SI_RETURN
8980a62980aSMatt Arsenault    ;
8990a62980aSMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets
9000a62980aSMatt Arsenault    ; GFX940: liveins: $sgpr8
9010a62980aSMatt Arsenault    ; GFX940-NEXT: {{  $}}
9020a62980aSMatt Arsenault    ; GFX940-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
9030a62980aSMatt Arsenault    ; GFX940-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
9040a62980aSMatt Arsenault    ; GFX940-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
9050a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[COPY]], 0, implicit $exec
9060a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
9070a62980aSMatt Arsenault    ; GFX940-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
9080a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[COPY1]], 0, implicit $exec
9090a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
9100a62980aSMatt Arsenault    ; GFX940-NEXT: SI_RETURN
9110a62980aSMatt Arsenault    ;
9120a62980aSMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets
9130a62980aSMatt Arsenault    ; GFX10: liveins: $sgpr8
9140a62980aSMatt Arsenault    ; GFX10-NEXT: {{  $}}
9150a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
9160a62980aSMatt Arsenault    ; GFX10-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
9170a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
9180a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
9190a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
9200a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
9210a62980aSMatt Arsenault    ; GFX10-NEXT: SI_RETURN
9220a62980aSMatt Arsenault    ;
9230a62980aSMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets
9240a62980aSMatt Arsenault    ; GFX12: liveins: $sgpr8
9250a62980aSMatt Arsenault    ; GFX12-NEXT: {{  $}}
9260a62980aSMatt Arsenault    ; GFX12-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
9270a62980aSMatt Arsenault    ; GFX12-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
9280a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[S_MOV_B32_]], 0, implicit $exec
9290a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
9300a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[S_MOV_B32_]], 0, implicit $exec
9310a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
9320a62980aSMatt Arsenault    ; GFX12-NEXT: SI_RETURN
9330a62980aSMatt Arsenault    %sgpr_offset:sreg_32 = COPY $sgpr8
9340a62980aSMatt Arsenault    %0:vgpr_32, dead %2:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec
9350a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0
9360a62980aSMatt Arsenault    %1:vgpr_32, dead %3:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec
9370a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1
9380a62980aSMatt Arsenault    SI_RETURN
9390a62980aSMatt Arsenault
9400a62980aSMatt Arsenault...
9410a62980aSMatt Arsenault
9420a62980aSMatt Arsenault---
9430a62980aSMatt Arsenaultname:            local_stack_alloc__v_add_co_u32_e64__sgpr_offsets_commute
9440a62980aSMatt ArsenaulttracksRegLiveness: true
9450a62980aSMatt Arsenaultstack:
9460a62980aSMatt Arsenault  - { id: 0, size: 4096, alignment: 4 }
9470a62980aSMatt ArsenaultmachineFunctionInfo:
9480a62980aSMatt Arsenault  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
9490a62980aSMatt Arsenault  frameOffsetReg:  '$sgpr33'
9500a62980aSMatt Arsenault  stackPtrOffsetReg: '$sgpr32'
9510a62980aSMatt Arsenaultbody:             |
9520a62980aSMatt Arsenault  bb.0:
9530a62980aSMatt Arsenault    liveins: $sgpr8
9540a62980aSMatt Arsenault    ; GFX803-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets_commute
9550a62980aSMatt Arsenault    ; GFX803: liveins: $sgpr8
9560a62980aSMatt Arsenault    ; GFX803-NEXT: {{  $}}
9570a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
9580a62980aSMatt Arsenault    ; GFX803-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
9590a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
9600a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
9610a62980aSMatt Arsenault    ; GFX803-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
9620a62980aSMatt Arsenault    ; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
9630a62980aSMatt Arsenault    ; GFX803-NEXT: SI_RETURN
9640a62980aSMatt Arsenault    ;
9650a62980aSMatt Arsenault    ; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets_commute
9660a62980aSMatt Arsenault    ; GFX900: liveins: $sgpr8
9670a62980aSMatt Arsenault    ; GFX900-NEXT: {{  $}}
9680a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
9690a62980aSMatt Arsenault    ; GFX900-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
9700a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
9710a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
9720a62980aSMatt Arsenault    ; GFX900-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
9730a62980aSMatt Arsenault    ; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
9740a62980aSMatt Arsenault    ; GFX900-NEXT: SI_RETURN
9750a62980aSMatt Arsenault    ;
9760a62980aSMatt Arsenault    ; GFX940-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets_commute
9770a62980aSMatt Arsenault    ; GFX940: liveins: $sgpr8
9780a62980aSMatt Arsenault    ; GFX940-NEXT: {{  $}}
9790a62980aSMatt Arsenault    ; GFX940-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
9800a62980aSMatt Arsenault    ; GFX940-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
9810a62980aSMatt Arsenault    ; GFX940-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY %sgpr_offset
9820a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[S_MOV_B32_]], [[COPY]], 0, implicit $exec
9830a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
9840a62980aSMatt Arsenault    ; GFX940-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY %sgpr_offset
9850a62980aSMatt Arsenault    ; GFX940-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[S_MOV_B32_]], [[COPY1]], 0, implicit $exec
9860a62980aSMatt Arsenault    ; GFX940-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
9870a62980aSMatt Arsenault    ; GFX940-NEXT: SI_RETURN
9880a62980aSMatt Arsenault    ;
9890a62980aSMatt Arsenault    ; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets_commute
9900a62980aSMatt Arsenault    ; GFX10: liveins: $sgpr8
9910a62980aSMatt Arsenault    ; GFX10-NEXT: {{  $}}
9920a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
9930a62980aSMatt Arsenault    ; GFX10-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
9940a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
9950a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
9960a62980aSMatt Arsenault    ; GFX10-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
9970a62980aSMatt Arsenault    ; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
9980a62980aSMatt Arsenault    ; GFX10-NEXT: SI_RETURN
9990a62980aSMatt Arsenault    ;
10000a62980aSMatt Arsenault    ; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets_commute
10010a62980aSMatt Arsenault    ; GFX12: liveins: $sgpr8
10020a62980aSMatt Arsenault    ; GFX12-NEXT: {{  $}}
10030a62980aSMatt Arsenault    ; GFX12-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
10040a62980aSMatt Arsenault    ; GFX12-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
10050a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[S_MOV_B32_]], %sgpr_offset, 0, implicit $exec
10060a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
10070a62980aSMatt Arsenault    ; GFX12-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[S_MOV_B32_]], %sgpr_offset, 0, implicit $exec
10080a62980aSMatt Arsenault    ; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
10090a62980aSMatt Arsenault    ; GFX12-NEXT: SI_RETURN
10100a62980aSMatt Arsenault    %sgpr_offset:sreg_32 = COPY $sgpr8
10110a62980aSMatt Arsenault    %0:vgpr_32, dead %2:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec
10120a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %0
10130a62980aSMatt Arsenault    %1:vgpr_32, dead %3:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec
10140a62980aSMatt Arsenault    INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:VGPR_32 */, %1
10150a62980aSMatt Arsenault    SI_RETURN
10160a62980aSMatt Arsenault
10170a62980aSMatt Arsenault...
1018