1*a6dabed3SJay Foad; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 2*a6dabed3SJay Foad; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck %s 3*a6dabed3SJay Foad 4*a6dabed3SJay Foaddefine amdgpu_gs void @f(i32 inreg %arg, i32 %arg1, i32 %arg2) { 5*a6dabed3SJay Foad; CHECK-LABEL: f: 6*a6dabed3SJay Foad; CHECK: ; %bb.0: ; %bb 7*a6dabed3SJay Foad; CHECK-NEXT: s_cmp_eq_u32 s0, 0 8*a6dabed3SJay Foad; CHECK-NEXT: s_mov_b32 s0, 0 9*a6dabed3SJay Foad; CHECK-NEXT: s_cbranch_scc1 .LBB0_2 10*a6dabed3SJay Foad; CHECK-NEXT: ; %bb.1: ; %bb3 11*a6dabed3SJay Foad; CHECK-NEXT: v_mov_b32_e32 v5, v0 12*a6dabed3SJay Foad; CHECK-NEXT: s_branch .LBB0_3 13*a6dabed3SJay Foad; CHECK-NEXT: .LBB0_2: 14*a6dabed3SJay Foad; CHECK-NEXT: v_mov_b32_e32 v5, 1 15*a6dabed3SJay Foad; CHECK-NEXT: v_mov_b32_e32 v1, 0 16*a6dabed3SJay Foad; CHECK-NEXT: .LBB0_3: ; %bb4 17*a6dabed3SJay Foad; CHECK-NEXT: v_mov_b32_e32 v6, 0 18*a6dabed3SJay Foad; CHECK-NEXT: s_mov_b32 s1, s0 19*a6dabed3SJay Foad; CHECK-NEXT: s_mov_b32 s2, s0 20*a6dabed3SJay Foad; CHECK-NEXT: s_mov_b32 s3, s0 21*a6dabed3SJay Foad; CHECK-NEXT: s_delay_alu instid0(VALU_DEP_1) 22*a6dabed3SJay Foad; CHECK-NEXT: v_mov_b32_e32 v7, v6 23*a6dabed3SJay Foad; CHECK-NEXT: v_mov_b32_e32 v8, v6 24*a6dabed3SJay Foad; CHECK-NEXT: v_mov_b32_e32 v2, v6 25*a6dabed3SJay Foad; CHECK-NEXT: v_mov_b32_e32 v3, v6 26*a6dabed3SJay Foad; CHECK-NEXT: v_mov_b32_e32 v4, v6 27*a6dabed3SJay Foad; CHECK-NEXT: s_clause 0x1 28*a6dabed3SJay Foad; CHECK-NEXT: buffer_store_b128 v[5:8], v6, s[0:3], 0 idxen 29*a6dabed3SJay Foad; CHECK-NEXT: buffer_store_b128 v[1:4], v6, s[0:3], 0 idxen 30*a6dabed3SJay Foad; CHECK-NEXT: s_endpgm 31*a6dabed3SJay Foadbb: 32*a6dabed3SJay Foad %i = icmp eq i32 %arg, 0 33*a6dabed3SJay Foad br i1 %i, label %bb4, label %bb3 34*a6dabed3SJay Foad 35*a6dabed3SJay Foadbb3: 36*a6dabed3SJay Foad br label %bb4 37*a6dabed3SJay Foad 38*a6dabed3SJay Foadbb4: 39*a6dabed3SJay Foad %i5 = phi i32 [ %arg1, %bb3 ], [ 1, %bb ] 40*a6dabed3SJay Foad %i6 = phi i32 [ %arg2, %bb3 ], [ 0, %bb ] 41*a6dabed3SJay Foad %i7 = insertelement <4 x i32> zeroinitializer, i32 %i5, i64 0 42*a6dabed3SJay Foad %i8 = bitcast <4 x i32> %i7 to <4 x float> 43*a6dabed3SJay Foad call void @llvm.amdgcn.struct.buffer.store.v4f32(<4 x float> %i8, <4 x i32> zeroinitializer, i32 0, i32 0, i32 0, i32 0) 44*a6dabed3SJay Foad %i9 = insertelement <4 x i32> zeroinitializer, i32 %i6, i64 0 45*a6dabed3SJay Foad %i10 = bitcast <4 x i32> %i9 to <4 x float> 46*a6dabed3SJay Foad call void @llvm.amdgcn.struct.buffer.store.v4f32(<4 x float> %i10, <4 x i32> zeroinitializer, i32 0, i32 0, i32 0, i32 0) 47*a6dabed3SJay Foad ret void 48*a6dabed3SJay Foad} 49*a6dabed3SJay Foad 50*a6dabed3SJay Foaddeclare void @llvm.amdgcn.struct.buffer.store.v4f32(<4 x float>, <4 x i32>, i32, i32, i32, i32 immarg) 51