10a140c42SVikash Gupta; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2fd6f8b3cSVikash Gupta; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-SDAG %s 3*5a81a559SDavid Green; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-GISEL %s 4fd6f8b3cSVikash Gupta; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX9-SDAG %s 5*5a81a559SDavid Green; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX9-GISEL %s 6fd6f8b3cSVikash Gupta; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10,GFX10-SDAG %s 7*5a81a559SDavid Green; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s 8fd6f8b3cSVikash Gupta; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG %s 9*5a81a559SDavid Green; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL %s 100a140c42SVikash Gupta 110a140c42SVikash Guptadefine float @fmul_select_f32_test1(float %x, i32 %bool.arg1, i32 %bool.arg2) { 120a140c42SVikash Gupta; GFX7-LABEL: fmul_select_f32_test1: 130a140c42SVikash Gupta; GFX7: ; %bb.0: 140a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 150a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 160a140c42SVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v1, 1.0, 2.0, vcc 170a140c42SVikash Gupta; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 180a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 190a140c42SVikash Gupta; 200a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f32_test1: 210a140c42SVikash Gupta; GFX9: ; %bb.0: 220a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 230a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 240a140c42SVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v1, 1.0, 2.0, vcc 250a140c42SVikash Gupta; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 260a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 270a140c42SVikash Gupta; 28fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f32_test1: 29fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 30fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 31fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 32fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v1, 1.0, 2.0, vcc_lo 33fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 34fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 350a140c42SVikash Gupta; 36fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f32_test1: 37fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 38fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 39fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 40fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v1, 1.0, 2.0, vcc_lo 41fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 42fd6f8b3cSVikash Gupta; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 43fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 440a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 450a140c42SVikash Gupta %y = select i1 %bool, float 2.000000e+00, float 1.000000e+00 460a140c42SVikash Gupta %ldexp = fmul float %x, %y 470a140c42SVikash Gupta ret float %ldexp 480a140c42SVikash Gupta} 490a140c42SVikash Gupta 500a140c42SVikash Guptadefine float @fmul_select_f32_test2(float %x, i32 %bool.arg1, i32 %bool.arg2) { 510a140c42SVikash Gupta; GFX7-LABEL: fmul_select_f32_test2: 520a140c42SVikash Gupta; GFX7: ; %bb.0: 530a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 540a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 550a140c42SVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v1, 1.0, 0.5, vcc 560a140c42SVikash Gupta; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 570a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 580a140c42SVikash Gupta; 590a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f32_test2: 600a140c42SVikash Gupta; GFX9: ; %bb.0: 610a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 620a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 630a140c42SVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v1, 1.0, 0.5, vcc 640a140c42SVikash Gupta; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 650a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 660a140c42SVikash Gupta; 67fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f32_test2: 68fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 69fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 70fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 71fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v1, 1.0, 0.5, vcc_lo 72fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 73fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 740a140c42SVikash Gupta; 75fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f32_test2: 76fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 77fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 78fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 79fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v1, 1.0, 0.5, vcc_lo 80fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 81fd6f8b3cSVikash Gupta; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 82fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 830a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 840a140c42SVikash Gupta %y = select i1 %bool, float 5.000000e-01, float 1.000000e+00 850a140c42SVikash Gupta %ldexp = fmul float %x, %y 860a140c42SVikash Gupta ret float %ldexp 870a140c42SVikash Gupta} 880a140c42SVikash Gupta 890a140c42SVikash Guptadefine <2 x float> @fmul_select_v2f32_test3(<2 x float> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) { 90fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_v2f32_test3: 91fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 92fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 93fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 94fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc 95fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 96fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc 97fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2 98fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, v1, v3 99fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 1000a140c42SVikash Gupta; 101fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_v2f32_test3: 102fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 103fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 104fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 105fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc 106fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 107fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc 108fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v2 109fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, v1, v3 110fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 1110a140c42SVikash Gupta; 112fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_v2f32_test3: 113fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 114fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 115fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 116fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc 117fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 118fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc 119fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2 120fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mul_f32_e32 v1, v1, v3 121fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 1220a140c42SVikash Gupta; 123fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_v2f32_test3: 124fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 125fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 126fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 127fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc 128fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 129fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc 130fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mul_f32_e32 v0, v0, v2 131fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mul_f32_e32 v1, v1, v3 132fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 133fd6f8b3cSVikash Gupta; 134fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_v2f32_test3: 135fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 136fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 137fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 138fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc_lo 139fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v5 140fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mul_f32_e32 v0, v0, v2 141fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc_lo 142fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mul_f32_e32 v1, v1, v3 143fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 144fd6f8b3cSVikash Gupta; 145fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_v2f32_test3: 146fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 147fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 148fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 149fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc_lo 150fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v5 151fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc_lo 152fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 153fd6f8b3cSVikash Gupta; GFX11-NEXT: v_dual_mul_f32 v0, v0, v2 :: v_dual_mul_f32 v1, v1, v3 154fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 1550a140c42SVikash Gupta %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2 1560a140c42SVikash Gupta %y = select <2 x i1> %bool, <2 x float> <float 2.000000e+00, float 2.000000e+00>, <2 x float> <float 1.000000e+00, float 1.000000e+00> 1570a140c42SVikash Gupta %ldexp = fmul <2 x float> %x, %y 1580a140c42SVikash Gupta ret <2 x float> %ldexp 1590a140c42SVikash Gupta} 1600a140c42SVikash Gupta 1610a140c42SVikash Guptadefine <2 x float> @fmul_select_v2f32_test4(<2 x float> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) { 162fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_v2f32_test4: 163fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 164fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 165fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 166fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc 167fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 168fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc 169fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2 170fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, v1, v3 171fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 1720a140c42SVikash Gupta; 173fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_v2f32_test4: 174fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 175fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 176fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 177fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc 178fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 179fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc 180fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v2 181fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, v1, v3 182fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 1830a140c42SVikash Gupta; 184fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_v2f32_test4: 185fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 186fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 187fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 188fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc 189fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 190fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc 191fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2 192fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mul_f32_e32 v1, v1, v3 193fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 1940a140c42SVikash Gupta; 195fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_v2f32_test4: 196fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 197fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 198fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 199fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc 200fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 201fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc 202fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mul_f32_e32 v0, v0, v2 203fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mul_f32_e32 v1, v1, v3 204fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 205fd6f8b3cSVikash Gupta; 206fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_v2f32_test4: 207fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 208fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 209fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 210fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc_lo 211fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v5 212fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mul_f32_e32 v0, v0, v2 213fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc_lo 214fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mul_f32_e32 v1, v1, v3 215fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 216fd6f8b3cSVikash Gupta; 217fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_v2f32_test4: 218fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 219fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 220fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 221fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc_lo 222fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v5 223fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc_lo 224fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 225fd6f8b3cSVikash Gupta; GFX11-NEXT: v_dual_mul_f32 v0, v0, v2 :: v_dual_mul_f32 v1, v1, v3 226fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 2270a140c42SVikash Gupta %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2 2280a140c42SVikash Gupta %y = select <2 x i1> %bool, <2 x float> <float 5.000000e-01, float 5.000000e-01>, <2 x float> <float 1.000000e+00, float 1.000000e+00> 2290a140c42SVikash Gupta %ldexp = fmul <2 x float> %x, %y 2300a140c42SVikash Gupta ret <2 x float> %ldexp 2310a140c42SVikash Gupta} 2320a140c42SVikash Gupta 2330a140c42SVikash Guptadefine float @fmul_select_f32_test5(float %x, i32 %bool.arg1, i32 %bool.arg2) { 2340a140c42SVikash Gupta; GFX7-LABEL: fmul_select_f32_test5: 2350a140c42SVikash Gupta; GFX7: ; %bb.0: 2360a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2370a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2380a140c42SVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v1, -1.0, -2.0, vcc 2390a140c42SVikash Gupta; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 2400a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 2410a140c42SVikash Gupta; 2420a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f32_test5: 2430a140c42SVikash Gupta; GFX9: ; %bb.0: 2440a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2450a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2460a140c42SVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v1, -1.0, -2.0, vcc 2470a140c42SVikash Gupta; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 2480a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 2490a140c42SVikash Gupta; 250fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f32_test5: 251fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 252fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 253fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 254fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v1, -1.0, -2.0, vcc_lo 255fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 256fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 2570a140c42SVikash Gupta; 258fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f32_test5: 259fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 260fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 261fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 262fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v1, -1.0, -2.0, vcc_lo 263fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 264fd6f8b3cSVikash Gupta; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 265fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 2660a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 2670a140c42SVikash Gupta %y = select i1 %bool, float -2.000000e+00, float -1.000000e+00 2680a140c42SVikash Gupta %ldexp = fmul float %x, %y 2690a140c42SVikash Gupta ret float %ldexp 2700a140c42SVikash Gupta} 2710a140c42SVikash Gupta 2720a140c42SVikash Guptadefine float @fmul_select_f32_test6(float %x, i32 %bool.arg1, i32 %bool.arg2) { 273fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f32_test6: 274fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 275fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 276fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v3, 0x41000000 277fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v4, 0xc0400000 278fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 279fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 280fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1 281fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 2820a140c42SVikash Gupta; 283fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f32_test6: 284fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 285fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 286fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v3, 0xc0400000 287fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0x41000000 288fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 289fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc 290fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1 291fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 2920a140c42SVikash Gupta; 293fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f32_test6: 294fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 295fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 296fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x41000000 297fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0xc0400000 298fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 299fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 300fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1 301fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 3020a140c42SVikash Gupta; 303fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f32_test6: 304fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 305fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 306fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xc0400000 307fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x41000000 308fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 309fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc 310fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1 311fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 312fd6f8b3cSVikash Gupta; 313fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_f32_test6: 314fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 315fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 316fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0xc0400000 317fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 318fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x41000000, v3, vcc_lo 319fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1 320fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 321fd6f8b3cSVikash Gupta; 322fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_f32_test6: 323fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 324fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 325fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x41000000 326fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 327fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0xc0400000, vcc_lo 328fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1 329fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 330fd6f8b3cSVikash Gupta; 331fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_f32_test6: 332fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 333fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 334fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mov_b32_e32 v3, 0xc0400000 335fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 336fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 337fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x41000000, v3, vcc_lo 338fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1 339fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 340fd6f8b3cSVikash Gupta; 341fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_f32_test6: 342fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 343fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 344fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mov_b32_e32 v3, 0x41000000 345fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 346fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 347fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0xc0400000, vcc_lo 348fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1 349fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 3500a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 3510a140c42SVikash Gupta %y = select i1 %bool, float -3.000000e+00, float 8.000000e+00 3520a140c42SVikash Gupta %ldexp = fmul float %x, %y 3530a140c42SVikash Gupta ret float %ldexp 3540a140c42SVikash Gupta} 3550a140c42SVikash Gupta 3560a140c42SVikash Guptadefine float @fmul_select_f32_test7_sel_log2val_pos59_pos92(float %x, i32 %bool.arg1, i32 %bool.arg2) { 3570a140c42SVikash Gupta; GFX7-LABEL: fmul_select_f32_test7_sel_log2val_pos59_pos92: 3580a140c42SVikash Gupta; GFX7: ; %bb.0: 3590a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3600b0d9a3bSVikash Gupta; GFX7-NEXT: v_mov_b32_e32 v3, 0x5c 3610a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 3620b0d9a3bSVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v1, v3, 59, vcc 3630b0d9a3bSVikash Gupta; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v1 3640a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 3650a140c42SVikash Gupta; 3660a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f32_test7_sel_log2val_pos59_pos92: 3670a140c42SVikash Gupta; GFX9: ; %bb.0: 3680a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3690b0d9a3bSVikash Gupta; GFX9-NEXT: v_mov_b32_e32 v3, 0x5c 3700a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 3710b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v1, v3, 59, vcc 3720b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f32 v0, v0, v1 3730a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 3740a140c42SVikash Gupta; 375fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f32_test7_sel_log2val_pos59_pos92: 376fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 377fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 378fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 379fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v1, 0x5c, 59, vcc_lo 380fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f32 v0, v0, v1 381fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 3820a140c42SVikash Gupta; 383fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f32_test7_sel_log2val_pos59_pos92: 384fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 385fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 386fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 387fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v1, 0x5c, 59, vcc_lo 388fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 389fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f32 v0, v0, v1 390fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 3910a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 3920a140c42SVikash Gupta %y = select i1 %bool, float 0x43A0000000000000, float 0x45B0000000000000 3930a140c42SVikash Gupta %ldexp = fmul float %x, %y 3940a140c42SVikash Gupta ret float %ldexp 3950a140c42SVikash Gupta} 3960a140c42SVikash Gupta 3970a140c42SVikash Guptadefine float @fmul_select_f32_test8(float %x, i32 %bool.arg1, i32 %bool.arg2) { 398fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f32_test8: 399fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 400fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 401fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v3, 0xc1000000 402fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v4, 0x41800000 403fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 404fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 405fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1 406fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 4070a140c42SVikash Gupta; 408fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f32_test8: 409fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 410fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 411fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v3, 0x41800000 412fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0xc1000000 413fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 414fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc 415fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1 416fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 4170a140c42SVikash Gupta; 418fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f32_test8: 419fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 420fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 421fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0xc1000000 422fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x41800000 423fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 424fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 425fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1 426fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 4270a140c42SVikash Gupta; 428fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f32_test8: 429fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 430fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 431fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x41800000 432fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0xc1000000 433fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 434fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc 435fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1 436fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 437fd6f8b3cSVikash Gupta; 438fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_f32_test8: 439fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 440fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 441fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x41800000 442fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 443fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0xc1000000, v3, vcc_lo 444fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1 445fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 446fd6f8b3cSVikash Gupta; 447fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_f32_test8: 448fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 449fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 450fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1000000 451fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 452fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0x41800000, vcc_lo 453fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1 454fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 455fd6f8b3cSVikash Gupta; 456fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_f32_test8: 457fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 458fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 459fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mov_b32_e32 v3, 0x41800000 460fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 461fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 462fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v1, 0xc1000000, v3, vcc_lo 463fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1 464fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 465fd6f8b3cSVikash Gupta; 466fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_f32_test8: 467fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 468fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 469fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1000000 470fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 471fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 472fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0x41800000, vcc_lo 473fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1 474fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 4750a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 4760a140c42SVikash Gupta %y = select i1 %bool, float 1.600000e+01, float -8.000000e+00 4770a140c42SVikash Gupta %ldexp = fmul float %x, %y 4780a140c42SVikash Gupta ret float %ldexp 4790a140c42SVikash Gupta} 4800a140c42SVikash Gupta 4810a140c42SVikash Guptadefine float @fmul_select_f32_test9(float %x, i32 %bool.arg1, i32 %bool.arg2) { 4820a140c42SVikash Gupta; GFX7-LABEL: fmul_select_f32_test9: 4830a140c42SVikash Gupta; GFX7: ; %bb.0: 4840a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 4850a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 4860a140c42SVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v1, 2.0, 0, vcc 4870a140c42SVikash Gupta; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 4880a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 4890a140c42SVikash Gupta; 4900a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f32_test9: 4910a140c42SVikash Gupta; GFX9: ; %bb.0: 4920a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 4930a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 4940a140c42SVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v1, 2.0, 0, vcc 4950a140c42SVikash Gupta; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 4960a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 4970a140c42SVikash Gupta; 498fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f32_test9: 499fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 500fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 501fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 502fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v1, 2.0, 0, vcc_lo 503fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 504fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 5050a140c42SVikash Gupta; 506fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f32_test9: 507fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 508fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 509fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 510fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v1, 2.0, 0, vcc_lo 511fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 512fd6f8b3cSVikash Gupta; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 513fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 5140a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 5150a140c42SVikash Gupta %y = select i1 %bool, float 0.000000e+00, float 2.000000e+00 5160a140c42SVikash Gupta %ldexp = fmul float %x, %y 5170a140c42SVikash Gupta ret float %ldexp 5180a140c42SVikash Gupta} 5190a140c42SVikash Gupta 5200a140c42SVikash Guptadefine float @fmul_select_f32_test10(float %x, i32 %bool.arg1, i32 %bool.arg2) { 5210a140c42SVikash Gupta; GFX7-LABEL: fmul_select_f32_test10: 5220a140c42SVikash Gupta; GFX7: ; %bb.0: 5230a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 5240a140c42SVikash Gupta; GFX7-NEXT: v_bfrev_b32_e32 v3, 1 5250a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 5260a140c42SVikash Gupta; GFX7-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc 5270a140c42SVikash Gupta; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 5280a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 5290a140c42SVikash Gupta; 5300a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f32_test10: 5310a140c42SVikash Gupta; GFX9: ; %bb.0: 5320a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 5330a140c42SVikash Gupta; GFX9-NEXT: v_bfrev_b32_e32 v3, 1 5340a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 5350a140c42SVikash Gupta; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc 5360a140c42SVikash Gupta; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 5370a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 5380a140c42SVikash Gupta; 539fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f32_test10: 540fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 541fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 542fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 543fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x80000000, vcc_lo 544fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 545fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 5460a140c42SVikash Gupta; 547fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f32_test10: 548fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 549fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 550fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 551fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x80000000, vcc_lo 552fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 553fd6f8b3cSVikash Gupta; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 554fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 5550a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 5560a140c42SVikash Gupta %y = select i1 %bool, float -0.000000e+00, float 0.000000e+00 5570a140c42SVikash Gupta %ldexp = fmul float %x, %y 5580a140c42SVikash Gupta ret float %ldexp 5590a140c42SVikash Gupta} 5600a140c42SVikash Gupta 5610a140c42SVikash Guptadefine float @fmul_select_f32_test11_sel_log2val_pos78_pos56(float %x, i32 %bool.arg1, i32 %bool.arg2) { 5620a140c42SVikash Gupta; GFX7-LABEL: fmul_select_f32_test11_sel_log2val_pos78_pos56: 5630a140c42SVikash Gupta; GFX7: ; %bb.0: 5640a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 5650b0d9a3bSVikash Gupta; GFX7-NEXT: v_mov_b32_e32 v3, 0x4e 5660a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 5670b0d9a3bSVikash Gupta; GFX7-NEXT: v_cndmask_b32_e32 v1, 56, v3, vcc 5680b0d9a3bSVikash Gupta; GFX7-NEXT: v_ldexp_f32_e64 v0, -v0, v1 5690a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 5700a140c42SVikash Gupta; 5710a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f32_test11_sel_log2val_pos78_pos56: 5720a140c42SVikash Gupta; GFX9: ; %bb.0: 5730a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 5740b0d9a3bSVikash Gupta; GFX9-NEXT: v_mov_b32_e32 v3, 0x4e 5750a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 5760b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e32 v1, 56, v3, vcc 5770b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f32 v0, -v0, v1 5780a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 5790a140c42SVikash Gupta; 580fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f32_test11_sel_log2val_pos78_pos56: 581fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 582fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 583fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 584fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v1, 56, 0x4e, vcc_lo 585fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f32 v0, -v0, v1 586fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 5870a140c42SVikash Gupta; 588fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f32_test11_sel_log2val_pos78_pos56: 589fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 590fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 591fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 592fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v1, 56, 0x4e, vcc_lo 593fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 594fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f32 v0, -v0, v1 595fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 5960a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 5970a140c42SVikash Gupta %y = select i1 %bool, float 0xC4D0000000000000, float 0xC370000000000000 5980a140c42SVikash Gupta %ldexp = fmul float %x, %y 5990a140c42SVikash Gupta ret float %ldexp 6000a140c42SVikash Gupta} 6010a140c42SVikash Gupta 6020a140c42SVikash Guptadefine float @fmul_select_f32_test12_sel_log2val_neg48_pos68(float %x, i32 %bool.arg1, i32 %bool.arg2) { 603fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68: 604fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 605fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 606fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v3, 0x44 607fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_not_b32_e32 v4, 47 608fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 609fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 610fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v1 611fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 6120a140c42SVikash Gupta; 613fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68: 614fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 615fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 616fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_not_b32_e32 v3, 47 617fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0x44 618fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 619fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc 620fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v1 621fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 6220a140c42SVikash Gupta; 623fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68: 624fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 625fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 626fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x44 627fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_not_b32_e32 v4, 47 628fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 629fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 630fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_ldexp_f32 v0, v0, v1 631fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 6320a140c42SVikash Gupta; 633fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68: 634fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 635fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 636fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_not_b32_e32 v3, 47 637fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x44 638fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 639fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc 640fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_ldexp_f32 v0, v0, v1 641fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 642fd6f8b3cSVikash Gupta; 643fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68: 644fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 645fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 646fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_not_b32_e32 v3, 47 647fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 648fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x44, v3, vcc_lo 649fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_ldexp_f32 v0, v0, v1 650fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 651fd6f8b3cSVikash Gupta; 652fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68: 653fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 654fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 655fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x44 656fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 657fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0xffffffd0, vcc_lo 658fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_ldexp_f32 v0, v0, v1 659fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 660fd6f8b3cSVikash Gupta; 661fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68: 662fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 663fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 664fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_not_b32_e32 v3, 47 665fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 666fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 667fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x44, v3, vcc_lo 668fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_ldexp_f32 v0, v0, v1 669fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 670fd6f8b3cSVikash Gupta; 671fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68: 672fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 673fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 674fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mov_b32_e32 v3, 0x44 675fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 676fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 677fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0xffffffd0, vcc_lo 678fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_ldexp_f32 v0, v0, v1 679fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 6800a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 6810a140c42SVikash Gupta %y = select i1 %bool, float 0x3CF0000000000000, float 0x4430000000000000 6820a140c42SVikash Gupta %ldexp = fmul float %x, %y 6830a140c42SVikash Gupta ret float %ldexp 6840a140c42SVikash Gupta} 6850a140c42SVikash Gupta 6860a140c42SVikash Guptadefine double @fmul_select_f64_test1(double %x, i32 %bool.arg1, i32 %bool.arg2) { 6870a140c42SVikash Gupta; GFX7-LABEL: fmul_select_f64_test1: 6880a140c42SVikash Gupta; GFX7: ; %bb.0: 6890a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 6900a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 6910b0d9a3bSVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc 6920b0d9a3bSVikash Gupta; GFX7-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 6930a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 6940a140c42SVikash Gupta; 6950a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f64_test1: 6960a140c42SVikash Gupta; GFX9: ; %bb.0: 6970a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 6980a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 6990b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc 7000b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 7010a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 7020a140c42SVikash Gupta; 703fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f64_test1: 704fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 705fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 706fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 707fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo 708fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 709fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 7100a140c42SVikash Gupta; 711fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f64_test1: 712fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 713fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 714fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 715fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo 716fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 717fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 718fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 7190a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 7200a140c42SVikash Gupta %y = select i1 %bool, double 2.000000e+00, double 1.000000e+00 7210a140c42SVikash Gupta %ldexp = fmul double %x, %y 7220a140c42SVikash Gupta ret double %ldexp 7230a140c42SVikash Gupta} 7240a140c42SVikash Gupta 7250a140c42SVikash Guptadefine double @fmul_select_f64_test2(double %x, i32 %bool.arg1, i32 %bool.arg2) { 7260a140c42SVikash Gupta; GFX7-LABEL: fmul_select_f64_test2: 7270a140c42SVikash Gupta; GFX7: ; %bb.0: 7280a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 7290a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 7300b0d9a3bSVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 7310b0d9a3bSVikash Gupta; GFX7-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 7320a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 7330a140c42SVikash Gupta; 7340a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f64_test2: 7350a140c42SVikash Gupta; GFX9: ; %bb.0: 7360a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 7370a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 7380b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 7390b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 7400a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 7410a140c42SVikash Gupta; 742fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f64_test2: 743fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 744fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 745fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 746fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc_lo 747fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 748fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 7490a140c42SVikash Gupta; 750fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f64_test2: 751fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 752fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 753fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 754fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc_lo 755fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 756fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 757fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 7580a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 7590a140c42SVikash Gupta %y = select i1 %bool, double 5.000000e-01, double 1.000000e+00 7600a140c42SVikash Gupta %ldexp = fmul double %x, %y 7610a140c42SVikash Gupta ret double %ldexp 7620a140c42SVikash Gupta} 7630a140c42SVikash Gupta 7640a140c42SVikash Guptadefine <2 x double> @fmul_select_v2f64_test3(<2 x double> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) { 7650a140c42SVikash Gupta; GFX7-LABEL: fmul_select_v2f64_test3: 7660a140c42SVikash Gupta; GFX7: ; %bb.0: 7670a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 7680a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6 7690b0d9a3bSVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 7700a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7 7710b0d9a3bSVikash Gupta; GFX7-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4 7720b0d9a3bSVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 7730b0d9a3bSVikash Gupta; GFX7-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4 7740a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 7750a140c42SVikash Gupta; 7760a140c42SVikash Gupta; GFX9-LABEL: fmul_select_v2f64_test3: 7770a140c42SVikash Gupta; GFX9: ; %bb.0: 7780a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 7790a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6 7800b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 7810a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7 7820b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4 7830b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 7840b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4 7850a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 7860a140c42SVikash Gupta; 787fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_v2f64_test3: 788fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 789fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 790fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6 791fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo 792fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 793fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4 794fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo 795fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f64 v[2:3], v[2:3], v5 796fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 7970a140c42SVikash Gupta; 798fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_v2f64_test3: 799fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 800fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 801fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6 802fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo 803fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 804fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) 805fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4 806fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo 807fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f64 v[2:3], v[2:3], v5 808fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 8090a140c42SVikash Gupta %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2 8100a140c42SVikash Gupta %y = select <2 x i1> %bool, <2 x double> <double 2.000000e+00, double 2.000000e+00>, <2 x double> <double 1.000000e+00, double 1.000000e+00> 8110a140c42SVikash Gupta %ldexp = fmul <2 x double> %x, %y 8120a140c42SVikash Gupta ret <2 x double> %ldexp 8130a140c42SVikash Gupta} 8140a140c42SVikash Gupta 8150a140c42SVikash Guptadefine <2 x double> @fmul_select_v2f64_test4(<2 x double> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) { 8160a140c42SVikash Gupta; GFX7-LABEL: fmul_select_v2f64_test4: 8170a140c42SVikash Gupta; GFX7: ; %bb.0: 8180a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 8190a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6 8200b0d9a3bSVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc 8210a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7 8220b0d9a3bSVikash Gupta; GFX7-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4 8230b0d9a3bSVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc 8240b0d9a3bSVikash Gupta; GFX7-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4 8250a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 8260a140c42SVikash Gupta; 8270a140c42SVikash Gupta; GFX9-LABEL: fmul_select_v2f64_test4: 8280a140c42SVikash Gupta; GFX9: ; %bb.0: 8290a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 8300a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6 8310b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc 8320a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7 8330b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4 8340b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc 8350b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4 8360a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 8370a140c42SVikash Gupta; 838fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_v2f64_test4: 839fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 840fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 841fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6 842fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc_lo 843fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 844fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4 845fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc_lo 846fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f64 v[2:3], v[2:3], v5 847fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 8480a140c42SVikash Gupta; 849fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_v2f64_test4: 850fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 851fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 852fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6 853fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc_lo 854fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 855fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) 856fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4 857fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc_lo 858fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f64 v[2:3], v[2:3], v5 859fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 8600a140c42SVikash Gupta %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2 8610a140c42SVikash Gupta %y = select <2 x i1> %bool, <2 x double> <double 5.000000e-01, double 5.000000e-01>, <2 x double> <double 1.000000e+00, double 1.000000e+00> 8620a140c42SVikash Gupta %ldexp = fmul <2 x double> %x, %y 8630a140c42SVikash Gupta ret <2 x double> %ldexp 8640a140c42SVikash Gupta} 8650a140c42SVikash Gupta 8660a140c42SVikash Guptadefine double @fmul_select_f64_test5(double %x, i32 %bool.arg1, i32 %bool.arg2) { 8670a140c42SVikash Gupta; GFX7-LABEL: fmul_select_f64_test5: 8680a140c42SVikash Gupta; GFX7: ; %bb.0: 8690a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 8700a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 8710b0d9a3bSVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 8720b0d9a3bSVikash Gupta; GFX7-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2 8730a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 8740a140c42SVikash Gupta; 8750a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f64_test5: 8760a140c42SVikash Gupta; GFX9: ; %bb.0: 8770a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 8780a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 8790b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 8800b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2 8810a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 8820a140c42SVikash Gupta; 883fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f64_test5: 884fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 885fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 886fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 887fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc_lo 888fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2 889fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 8900a140c42SVikash Gupta; 891fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f64_test5: 892fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 893fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 894fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 895fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc_lo 896fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 897fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2 898fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 8990a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 9000a140c42SVikash Gupta %y = select i1 %bool, double -5.000000e-01, double -1.000000e+00 9010a140c42SVikash Gupta %ldexp = fmul double %x, %y 9020a140c42SVikash Gupta ret double %ldexp 9030a140c42SVikash Gupta} 9040a140c42SVikash Gupta 9050a140c42SVikash Guptadefine double @fmul_select_f64_test6(double %x, i32 %bool.arg1, i32 %bool.arg2) { 9060a140c42SVikash Gupta; GFX7-LABEL: fmul_select_f64_test6: 9070a140c42SVikash Gupta; GFX7: ; %bb.0: 9080a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 9090a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 9100b0d9a3bSVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc 9110b0d9a3bSVikash Gupta; GFX7-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2 9120a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 9130a140c42SVikash Gupta; 9140a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f64_test6: 9150a140c42SVikash Gupta; GFX9: ; %bb.0: 9160a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 9170a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 9180b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc 9190b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2 9200a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 9210a140c42SVikash Gupta; 922fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f64_test6: 923fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 924fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 925fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 926fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo 927fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2 928fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 9290a140c42SVikash Gupta; 930fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f64_test6: 931fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 932fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 933fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 934fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo 935fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 936fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2 937fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 9380a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 9390a140c42SVikash Gupta %y = select i1 %bool, double -2.000000e+00, double -1.000000e+00 9400a140c42SVikash Gupta %ldexp = fmul double %x, %y 9410a140c42SVikash Gupta ret double %ldexp 9420a140c42SVikash Gupta} 9430a140c42SVikash Gupta 9440a140c42SVikash Guptadefine double @fmul_select_f64_test7(double %x, i32 %bool.arg1, i32 %bool.arg2) { 945fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f64_test7: 946fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 947fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 948fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v4, 0xbff00000 949fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 950fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, v4, 2.0, vcc 951fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v2, 0 952fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3] 953fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 9540a140c42SVikash Gupta; 955fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f64_test7: 956fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 957fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 958fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v5, 0xbff00000 959fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 960fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0 961fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v5, v5, 2.0, vcc 962fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 963fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 9640a140c42SVikash Gupta; 965fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f64_test7: 966fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 967fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 968fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0xbff00000 969fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 970fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v3, v4, 2.0, vcc 971fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0 972fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3] 973fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 9740a140c42SVikash Gupta; 975fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f64_test7: 976fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 977fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 978fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0xbff00000 979fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 980fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0 981fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v5, v5, 2.0, vcc 982fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 983fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 984fd6f8b3cSVikash Gupta; 985fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f64_test7: 986fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 987fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 988fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 989fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mov_b32_e32 v4, 0 990fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v5, 0xbff00000, 2.0, vcc_lo 991fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 992fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 993fd6f8b3cSVikash Gupta; 994fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f64_test7: 995fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 996fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 997fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 998fd6f8b3cSVikash Gupta; GFX11-NEXT: v_mov_b32_e32 v4, 0 999fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v5, 0xbff00000, 2.0, vcc_lo 1000fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1001fd6f8b3cSVikash Gupta; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 1002fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 10030a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 10040a140c42SVikash Gupta %y = select i1 %bool, double 2.000000e+00, double -1.000000e+00 10050a140c42SVikash Gupta %ldexp = fmul double %x, %y 10060a140c42SVikash Gupta ret double %ldexp 10070a140c42SVikash Gupta} 10080a140c42SVikash Gupta 10090a140c42SVikash Guptadefine double @fmul_select_f64_test8(double %x, i32 %bool.arg1, i32 %bool.arg2) { 10100a140c42SVikash Gupta; GFX7-LABEL: fmul_select_f64_test8: 10110a140c42SVikash Gupta; GFX7: ; %bb.0: 10120a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 10130a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 10140b0d9a3bSVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v2, 5, 2, vcc 10150b0d9a3bSVikash Gupta; GFX7-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2 10160a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 10170a140c42SVikash Gupta; 10180a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f64_test8: 10190a140c42SVikash Gupta; GFX9: ; %bb.0: 10200a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 10210a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 10220b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v2, 5, 2, vcc 10230b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2 10240a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 10250a140c42SVikash Gupta; 1026fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f64_test8: 1027fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 1028fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1029fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1030fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v2, 5, 2, vcc_lo 1031fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2 1032fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 10330a140c42SVikash Gupta; 1034fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f64_test8: 1035fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 1036fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1037fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1038fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v2, 5, 2, vcc_lo 1039fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1040fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2 1041fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 10420a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 10430a140c42SVikash Gupta %y = select i1 %bool, double -4.000000e+00, double -3.200000e+01 10440a140c42SVikash Gupta %ldexp = fmul double %x, %y 10450a140c42SVikash Gupta ret double %ldexp 10460a140c42SVikash Gupta} 10470a140c42SVikash Gupta 10480a140c42SVikash Guptadefine <2 x double> @fmul_select_v2f64_test9(<2 x double> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) { 10490a140c42SVikash Gupta; GFX7-LABEL: fmul_select_v2f64_test9: 10500a140c42SVikash Gupta; GFX7: ; %bb.0: 10510a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 10520a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6 10530b0d9a3bSVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 10540a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7 10550b0d9a3bSVikash Gupta; GFX7-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v4 10560b0d9a3bSVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 10570b0d9a3bSVikash Gupta; GFX7-NEXT: v_ldexp_f64 v[2:3], -v[2:3], v4 10580a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 10590a140c42SVikash Gupta; 10600a140c42SVikash Gupta; GFX9-LABEL: fmul_select_v2f64_test9: 10610a140c42SVikash Gupta; GFX9: ; %bb.0: 10620a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 10630a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6 10640b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 10650a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7 10660b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v4 10670b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 10680b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f64 v[2:3], -v[2:3], v4 10690a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 10700a140c42SVikash Gupta; 1071fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_v2f64_test9: 1072fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 1073fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1074fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6 1075fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo 1076fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 1077fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v4 1078fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo 1079fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f64 v[2:3], -v[2:3], v5 1080fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 10810a140c42SVikash Gupta; 1082fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_v2f64_test9: 1083fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 1084fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1085fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6 1086fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo 1087fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 1088fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1) 1089fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v4 1090fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo 1091fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f64 v[2:3], -v[2:3], v5 1092fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 10930a140c42SVikash Gupta %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2 10940a140c42SVikash Gupta %y = select <2 x i1> %bool, <2 x double> <double -2.000000e+00, double -2.000000e+00>, <2 x double> <double -1.000000e+00, double -1.000000e+00> 10950a140c42SVikash Gupta %ldexp = fmul <2 x double> %x, %y 10960a140c42SVikash Gupta ret <2 x double> %ldexp 10970a140c42SVikash Gupta} 10980a140c42SVikash Gupta 10990a140c42SVikash Guptadefine <2 x double> @fmul_select_v2f64_test10(<2 x double> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) { 1100fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_v2f64_test10: 1101fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 1102fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1103fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v8, 0xbff00000 1104fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v9, 0x3fe00000 1105fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6 1106fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v9, v8, v9, vcc 1107fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7 1108fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v8, 0 1109fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 1110fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9] 1111fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4 1112fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 11130a140c42SVikash Gupta; 1114fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_v2f64_test10: 1115fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 1116fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1117fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v9, 0x3fe00000 1118fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v10, 0xbff00000 1119fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6 1120fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v9, v10, v9, vcc 1121fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7 1122fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v8, 0 1123fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 1124fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9] 1125fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4 1126fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 11270a140c42SVikash Gupta; 1128fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_v2f64_test10: 1129fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 1130fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1131fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v8, 0xbff00000 1132fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v9, 0x3fe00000 1133fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6 1134fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v9, v8, v9, vcc 1135fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7 1136fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v8, 0 1137fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 1138fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9] 1139fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4 1140fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 11410a140c42SVikash Gupta; 1142fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_v2f64_test10: 1143fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 1144fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1145fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v9, 0x3fe00000 1146fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v10, 0xbff00000 1147fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6 1148fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v9, v10, v9, vcc 1149fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7 1150fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v8, 0 1151fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc 1152fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9] 1153fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4 1154fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 1155fd6f8b3cSVikash Gupta; 1156fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_v2f64_test10: 1157fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 1158fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1159fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mov_b32_e32 v8, 0x3fe00000 1160fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6 1161fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v9, 0xbff00000, v8, vcc_lo 1162fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 1163fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mov_b32_e32 v8, 0 1164fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo 1165fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9] 1166fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4 1167fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 1168fd6f8b3cSVikash Gupta; 1169fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_v2f64_test10: 1170fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 1171fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1172fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mov_b32_e32 v9, 0xbff00000 1173fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6 1174fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mov_b32_e32 v8, 0 1175fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v9, v9, 0x3fe00000, vcc_lo 1176fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 1177fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9] 1178fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo 1179fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4 1180fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 1181fd6f8b3cSVikash Gupta; 1182fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_v2f64_test10: 1183fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 1184fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1185fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mov_b32_e32 v8, 0x3fe00000 1186fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6 1187fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) 1188fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_dual_cndmask_b32 v9, 0xbff00000, v8 :: v_dual_mov_b32 v8, 0 1189fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 1190fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9] 1191fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo 1192fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) 1193fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4 1194fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 1195fd6f8b3cSVikash Gupta; 1196fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_v2f64_test10: 1197fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 1198fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1199fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_dual_mov_b32 v9, 0xbff00000 :: v_dual_mov_b32 v8, 0 1200fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6 1201fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) 1202fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v9, v9, 0x3fe00000, vcc_lo 1203fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 1204fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9] 1205fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo 1206fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) 1207fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4 1208fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 12090a140c42SVikash Gupta %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2 12100a140c42SVikash Gupta %y = select <2 x i1> %bool, <2 x double> <double 5.000000e-01, double 2.000000e+00>, <2 x double> <double -1.000000e+00, double 1.000000e+00> 12110a140c42SVikash Gupta %ldexp = fmul <2 x double> %x, %y 12120a140c42SVikash Gupta ret <2 x double> %ldexp 12130a140c42SVikash Gupta} 12140a140c42SVikash Gupta 12150a140c42SVikash Guptadefine double @fmul_select_f64_test11(double %x, i32 %bool.arg1, i32 %bool.arg2) { 1216fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f64_test11: 1217fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 1218fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1219fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_bfrev_b32_e32 v4, 1 1220fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1221fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, v4, -2.0, vcc 1222fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v2, 0 1223fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3] 1224fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 12250a140c42SVikash Gupta; 1226fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f64_test11: 1227fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 1228fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1229fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_bfrev_b32_e32 v5, 1 1230fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1231fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0 1232fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v5, v5, -2.0, vcc 1233fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 1234fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 12350a140c42SVikash Gupta; 1236fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f64_test11: 1237fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 1238fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1239fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_bfrev_b32_e32 v4, 1 1240fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1241fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v3, v4, -2.0, vcc 1242fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0 1243fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3] 1244fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 12450a140c42SVikash Gupta; 1246fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f64_test11: 1247fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 1248fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1249fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_bfrev_b32_e32 v5, 1 1250fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1251fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0 1252fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v5, v5, -2.0, vcc 1253fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 1254fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 1255fd6f8b3cSVikash Gupta; 1256fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f64_test11: 1257fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 1258fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1259fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1260fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mov_b32_e32 v4, 0 1261fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v5, 0x80000000, -2.0, vcc_lo 1262fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 1263fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 1264fd6f8b3cSVikash Gupta; 1265fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f64_test11: 1266fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 1267fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1268fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1269fd6f8b3cSVikash Gupta; GFX11-NEXT: v_mov_b32_e32 v4, 0 1270fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v5, 0x80000000, -2.0, vcc_lo 1271fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1272fd6f8b3cSVikash Gupta; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 1273fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 12740a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 12750a140c42SVikash Gupta %y = select i1 %bool, double -2.000000e+00, double -0.000000e+00 12760a140c42SVikash Gupta %ldexp = fmul double %x, %y 12770a140c42SVikash Gupta ret double %ldexp 12780a140c42SVikash Gupta} 12790a140c42SVikash Gupta 12800a140c42SVikash Guptadefine double @fmul_select_f64_test12(double %x, i32 %bool.arg1, i32 %bool.arg2) { 1281fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f64_test12: 1282fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 1283fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1284fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, v2, v3 1285fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc 1286fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_lshlrev_b32_e32 v3, 31, v2 1287fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v2, 0 1288fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3] 1289fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 12900a140c42SVikash Gupta; 1291fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f64_test12: 1292fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 1293fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1294fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_bfrev_b32_e32 v5, 1 1295fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1296fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0 1297fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v5, v5, 0, vcc 1298fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 1299fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 13000a140c42SVikash Gupta; 1301fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f64_test12: 1302fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 1303fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1304fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, v2, v3 1305fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc 1306fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_lshlrev_b32_e32 v3, 31, v2 1307fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0 1308fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3] 1309fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 13100a140c42SVikash Gupta; 1311fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f64_test12: 1312fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 1313fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1314fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_bfrev_b32_e32 v5, 1 1315fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1316fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0 1317fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v5, v5, 0, vcc 1318fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 1319fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 1320fd6f8b3cSVikash Gupta; 1321fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_f64_test12: 1322fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 1323fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1324fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v3 1325fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mov_b32_e32 v2, 0 1326fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo 1327fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_lshlrev_b32_e32 v3, 31, v3 1328fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3] 1329fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 1330fd6f8b3cSVikash Gupta; 1331fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_f64_test12: 1332fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 1333fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1334fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1335fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, 0 1336fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v5, 0x80000000, 0, vcc_lo 1337fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 1338fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 1339fd6f8b3cSVikash Gupta; 1340fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_f64_test12: 1341fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 1342fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1343fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_ne_u32_e32 vcc_lo, v2, v3 1344fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc_lo 1345fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 1346fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_lshlrev_b32 v3, 31, v3 1347fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3] 1348fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 1349fd6f8b3cSVikash Gupta; 1350fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_f64_test12: 1351fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 1352fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1353fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1354fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mov_b32_e32 v4, 0 1355fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v5, 0x80000000, 0, vcc_lo 1356fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) 1357fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 1358fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 13590a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 13600a140c42SVikash Gupta %y = select i1 %bool, double 0.000000e+00, double -0.000000e+00 13610a140c42SVikash Gupta %ldexp = fmul double %x, %y 13620a140c42SVikash Gupta ret double %ldexp 13630a140c42SVikash Gupta} 13640a140c42SVikash Gupta 13650a140c42SVikash Guptadefine double @fmul_select_f64_test13(double %x, i32 %bool.arg1, i32 %bool.arg2) { 13660a140c42SVikash Gupta; GFX7-LABEL: fmul_select_f64_test13: 13670a140c42SVikash Gupta; GFX7: ; %bb.0: 13680a140c42SVikash Gupta; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 13690a140c42SVikash Gupta; GFX7-NEXT: v_mov_b32_e32 v5, 0x40300000 13700a140c42SVikash Gupta; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 13710a140c42SVikash Gupta; GFX7-NEXT: v_mov_b32_e32 v4, 0 13720a140c42SVikash Gupta; GFX7-NEXT: v_cndmask_b32_e64 v5, v5, 0, vcc 13730a140c42SVikash Gupta; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 13740a140c42SVikash Gupta; GFX7-NEXT: s_setpc_b64 s[30:31] 13750a140c42SVikash Gupta; 13760a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f64_test13: 13770a140c42SVikash Gupta; GFX9: ; %bb.0: 13780a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 13790a140c42SVikash Gupta; GFX9-NEXT: v_mov_b32_e32 v5, 0x40300000 13800a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 13810a140c42SVikash Gupta; GFX9-NEXT: v_mov_b32_e32 v4, 0 13820a140c42SVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v5, v5, 0, vcc 13830a140c42SVikash Gupta; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 13840a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 13850a140c42SVikash Gupta; 1386fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f64_test13: 1387fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 1388fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1389fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1390fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mov_b32_e32 v4, 0 1391fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v5, 0x40300000, 0, vcc_lo 1392fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 1393fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 13940a140c42SVikash Gupta; 1395fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f64_test13: 1396fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 1397fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1398fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1399fd6f8b3cSVikash Gupta; GFX11-NEXT: v_mov_b32_e32 v4, 0 1400fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v5, 0x40300000, 0, vcc_lo 1401fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 1402fd6f8b3cSVikash Gupta; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5] 1403fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 14040a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 14050a140c42SVikash Gupta %y = select i1 %bool, double 0.000000e+00, double 1.600000e+01 14060a140c42SVikash Gupta %ldexp = fmul double %x, %y 14070a140c42SVikash Gupta ret double %ldexp 14080a140c42SVikash Gupta} 14090a140c42SVikash Gupta 14100a140c42SVikash Guptadefine double @fmul_select_f64_test14_sel_log2val_pos92_neg27(double %x, i32 %bool.arg1, i32 %bool.arg2) { 1411fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27: 1412fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 1413fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1414fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_not_b32_e32 v4, 26 1415fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v5, 0x5c 1416fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1417fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc 1418fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1419fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 14200a140c42SVikash Gupta; 1421fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27: 1422fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 1423fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1424fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0x5c 1425fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_not_b32_e32 v5, 26 1426fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1427fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v2, v5, v4, vcc 1428fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1429fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 14300a140c42SVikash Gupta; 1431fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27: 1432fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 1433fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1434fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_not_b32_e32 v4, 26 1435fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0x5c 1436fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1437fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc 1438fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1439fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 14400a140c42SVikash Gupta; 1441fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27: 1442fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 1443fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1444fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x5c 1445fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_not_b32_e32 v5, 26 1446fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1447fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v2, v5, v4, vcc 1448fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1449fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 1450fd6f8b3cSVikash Gupta; 1451fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27: 1452fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 1453fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1454fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0x5c 1455fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1456fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v2, 0xffffffe5, v4, vcc_lo 1457fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1458fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 1459fd6f8b3cSVikash Gupta; 1460fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27: 1461fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 1462fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1463fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_not_b32_e32 v4, 26 1464fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1465fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v2, v4, 0x5c, vcc_lo 1466fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1467fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 1468fd6f8b3cSVikash Gupta; 1469fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27: 1470fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 1471fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1472fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, 0x5c 1473fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1474fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 1475fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v2, 0xffffffe5, v4, vcc_lo 1476fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1477fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 1478fd6f8b3cSVikash Gupta; 1479fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27: 1480fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 1481fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1482fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_not_b32_e32 v4, 26 1483fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1484fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 1485fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v2, v4, 0x5c, vcc_lo 1486fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1487fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 14880a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 14890a140c42SVikash Gupta %y = select i1 %bool, double 0x45B0000000000000, double 0x3E40000000000000 14900a140c42SVikash Gupta %ldexp = fmul double %x, %y 14910a140c42SVikash Gupta ret double %ldexp 14920a140c42SVikash Gupta} 14930a140c42SVikash Gupta 14940a140c42SVikash Guptadefine double @fmul_select_f64_test15_sel_log2val_neg42_neg33(double %x, i32 %bool.arg1, i32 %bool.arg2) { 1495fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33: 1496fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 1497fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1498fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_not_b32_e32 v4, 32 1499fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_not_b32_e32 v5, 41 1500fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1501fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc 1502fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1503fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 15040a140c42SVikash Gupta; 1505fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33: 1506fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 1507fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1508fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_not_b32_e32 v4, 41 1509fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_not_b32_e32 v5, 32 1510fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1511fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v2, v5, v4, vcc 1512fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1513fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 15140a140c42SVikash Gupta; 1515fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33: 1516fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 1517fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1518fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_not_b32_e32 v4, 32 1519fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_not_b32_e32 v5, 41 1520fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1521fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc 1522fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1523fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 15240a140c42SVikash Gupta; 1525fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33: 1526fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 1527fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1528fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_not_b32_e32 v4, 41 1529fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_not_b32_e32 v5, 32 1530fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3 1531fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v2, v5, v4, vcc 1532fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1533fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 1534fd6f8b3cSVikash Gupta; 1535fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33: 1536fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 1537fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1538fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_not_b32_e32 v4, 41 1539fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1540fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v2, 0xffffffdf, v4, vcc_lo 1541fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1542fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 1543fd6f8b3cSVikash Gupta; 1544fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33: 1545fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 1546fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1547fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_not_b32_e32 v4, 32 1548fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1549fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v2, v4, 0xffffffd6, vcc_lo 1550fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1551fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 1552fd6f8b3cSVikash Gupta; 1553fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33: 1554fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 1555fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1556fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_not_b32_e32 v4, 41 1557fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1558fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 1559fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v2, 0xffffffdf, v4, vcc_lo 1560fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1561fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 1562fd6f8b3cSVikash Gupta; 1563fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33: 1564fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 1565fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1566fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_not_b32_e32 v4, 32 1567fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3 1568fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 1569fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v2, v4, 0xffffffd6, vcc_lo 1570fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2 1571fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 15720a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 15730a140c42SVikash Gupta %y = select i1 %bool, double 0x3D50000000000000, double 0x3DE0000000000000 15740a140c42SVikash Gupta %ldexp = fmul double %x, %y 15750a140c42SVikash Gupta ret double %ldexp 15760a140c42SVikash Gupta} 15770a140c42SVikash Gupta 15780a140c42SVikash Gupta 15790a140c42SVikash Guptadefine half @fmul_select_f16_test1(half %x, i32 %bool.arg1, i32 %bool.arg2) { 1580fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f16_test1: 1581fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 1582fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1583fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 1584fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 1585fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc 1586fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0 1587fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v1 1588fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 15890a140c42SVikash Gupta; 1590fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f16_test1: 1591fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 1592fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1593fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0 1594fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 1595fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc 1596fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v1 1597fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 1598fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 15990a140c42SVikash Gupta; 1600fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f16_test1: 1601fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 1602fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1603fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 1604fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc 1605fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v1 1606fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 16070a140c42SVikash Gupta; 1608fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f16_test1: 1609fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 1610fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1611fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 1612fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc 1613fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0xffff8000 1614fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff 1615fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v2, v3 1616fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 1617fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 1618fd6f8b3cSVikash Gupta; 1619fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_f16_test1: 1620fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 1621fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1622fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 1623fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo 1624fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v1 1625fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 1626fd6f8b3cSVikash Gupta; 1627fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_f16_test1: 1628fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 1629fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1630fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 1631fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0x7fff 1632fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo 1633fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v2 1634fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 1635fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 1636fd6f8b3cSVikash Gupta; 1637fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_f16_test1: 1638fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 1639fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1640fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 1641fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo 1642fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) 1643fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v1 1644fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 1645fd6f8b3cSVikash Gupta; 1646fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_f16_test1: 1647fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 1648fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1649fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 1650fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0x7fff 1651fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo 1652fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 1653fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v2 1654fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 1655fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 16560a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 16570a140c42SVikash Gupta %y = select i1 %bool, half 2.000000e+00, half 1.000000e+00 16580a140c42SVikash Gupta %ldexp = fmul half %x, %y 16590a140c42SVikash Gupta ret half %ldexp 16600a140c42SVikash Gupta} 16610a140c42SVikash Gupta 16620a140c42SVikash Guptadefine half @fmul_select_f16_test2(half %x, i32 %bool.arg1, i32 %bool.arg2) { 1663fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f16_test2: 1664fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 1665fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1666fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 1667fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 1668fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc 1669fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0 1670fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v1 1671fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 16720a140c42SVikash Gupta; 1673fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f16_test2: 1674fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 1675fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1676fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0 1677fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 1678fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc 1679fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v1 1680fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 1681fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 16820a140c42SVikash Gupta; 1683fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f16_test2: 1684fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 1685fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1686fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 1687fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc 1688fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x8000 1689fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0x7fff 1690fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_med3_i32 v1, v1, s4, v2 1691fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v1 1692fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 16930a140c42SVikash Gupta; 1694fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f16_test2: 1695fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 1696fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1697fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 1698fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc 1699fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0xffff8000 1700fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff 1701fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v2, v3 1702fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 1703fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 1704fd6f8b3cSVikash Gupta; 1705fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_f16_test2: 1706fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 1707fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1708fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 1709fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_movk_i32 s4, 0x8000 1710fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo 1711fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_med3_i32 v1, v1, s4, 0x7fff 1712fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v1 1713fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 1714fd6f8b3cSVikash Gupta; 1715fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_f16_test2: 1716fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 1717fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1718fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 1719fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0x7fff 1720fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo 1721fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v2 1722fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 1723fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 1724fd6f8b3cSVikash Gupta; 1725fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_f16_test2: 1726fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 1727fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1728fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 1729fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_movk_i32 s0, 0x8000 1730fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo 1731fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 1732fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_med3_i32 v1, v1, s0, 0x7fff 1733fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v1 1734fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 1735fd6f8b3cSVikash Gupta; 1736fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_f16_test2: 1737fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 1738fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1739fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 1740fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0x7fff 1741fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo 1742fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 1743fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v2 1744fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 1745fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 17460a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 17470a140c42SVikash Gupta %y = select i1 %bool, half 5.000000e-01, half 1.000000e+00 17480a140c42SVikash Gupta %ldexp = fmul half %x, %y 17490a140c42SVikash Gupta ret half %ldexp 17500a140c42SVikash Gupta} 17510a140c42SVikash Gupta 17520a140c42SVikash Guptadefine <2 x half> @fmul_select_v2f16_test3(<2 x half> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) { 1753fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_v2f16_test3: 1754fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 1755fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1756fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1 1757fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 1758fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 1759fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc 1760fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1 1761fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0 1762fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 1763fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc 1764fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, v1, v3 1765fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2 1766fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 17670a140c42SVikash Gupta; 1768fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_v2f16_test3: 1769fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 1770fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1771fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0 1772fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1 1773fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 1774fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc 1775fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 1776fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc 1777fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v2 1778fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v1, v1, v3 1779fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 1780fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1 1781fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 17820a140c42SVikash Gupta; 1783fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_v2f16_test3: 1784fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 1785fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1786fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0x3c00 1787fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v6, 0x4000 1788fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 1789fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc 1790fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3 1791fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc 1792fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_pack_b32_f16 v1, v1, v2 1793fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v0, v1 1794fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 17950a140c42SVikash Gupta; 1796fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_v2f16_test3: 1797fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 1798fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1799fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3 1800fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc 1801fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 1802fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc 1803fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xffff8000 1804fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x7fff 1805fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v3, v4 1806fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_med3_i32 v2, v2, v3, v4 1807fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v1, v0, v1 1808fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 1809fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v1 1810fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 1811fd6f8b3cSVikash Gupta; 1812fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_v2f16_test3: 1813fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 1814fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1815fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, 0x4000 1816fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 1817fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v2, 0x3c00, v5, vcc_lo 1818fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v3 1819fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x3c00, v5, vcc_lo 1820fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_pack_b32_f16 v1, v1, v2 1821fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, v0, v1 1822fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 1823fd6f8b3cSVikash Gupta; 1824fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_v2f16_test3: 1825fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 1826fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1827fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v3 1828fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff 1829fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo 1830fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 1831fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v3 1832fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo 1833fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v1, v0, v1 1834fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_med3_i32 v2, 0xffff8000, v2, v3 1835fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_and_b32_e32 v1, 0xffff, v1 1836fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 1837fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v1 1838fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 1839fd6f8b3cSVikash Gupta; 1840fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_v2f16_test3: 1841fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 1842fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1843fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mov_b32_e32 v5, 0x4000 1844fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 1845fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) 1846fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v2, 0x3c00, v5, vcc_lo 1847fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v3 1848fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x3c00, v5, vcc_lo 1849fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_pack_b32_f16 v1, v1, v2 1850fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) 1851fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_pk_mul_f16 v0, v0, v1 1852fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 1853fd6f8b3cSVikash Gupta; 1854fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_v2f16_test3: 1855fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 1856fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1857fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v3 1858fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff 1859fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo 1860fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 1861fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0 1862fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) 1863fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v3 1864fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo 1865fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 1866fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) 1867fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_med3_i32 v2, 0xffff8000, v2, v3 1868fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v0 1869fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 1870fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_ldexp_f16_e32 v1, v4, v2 1871fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v0 1872fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 18730a140c42SVikash Gupta %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2 18740a140c42SVikash Gupta %y = select <2 x i1> %bool, <2 x half> <half 2.000000e+00, half 2.000000e+00>, <2 x half> <half 1.000000e+00, half 1.000000e+00> 18750a140c42SVikash Gupta %ldexp = fmul <2 x half> %x, %y 18760a140c42SVikash Gupta ret <2 x half> %ldexp 18770a140c42SVikash Gupta} 18780a140c42SVikash Gupta 18790a140c42SVikash Guptadefine <2 x half> @fmul_select_v2f16_test4(<2 x half> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) { 1880fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_v2f16_test4: 1881fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 1882fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1883fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1 1884fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 1885fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 1886fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc 1887fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1 1888fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0 1889fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 1890fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc 1891fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, v1, v3 1892fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2 1893fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 18940a140c42SVikash Gupta; 1895fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_v2f16_test4: 1896fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 1897fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1898fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0 1899fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1 1900fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 1901fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 1902fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 1903fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc 1904fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v2 1905fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v1, v1, v3 1906fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 1907fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1 1908fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 19090a140c42SVikash Gupta; 1910fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_v2f16_test4: 1911fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 1912fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1913fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0x3c00 1914fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v6, 0x3800 1915fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 1916fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc 1917fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3 1918fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc 1919fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_pack_b32_f16 v1, v1, v2 1920fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v0, v1 1921fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 19220a140c42SVikash Gupta; 1923fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_v2f16_test4: 1924fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 1925fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1926fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3 1927fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc 1928fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 1929fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc 1930fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xffff8000 1931fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x7fff 1932fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v3, v4 1933fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_med3_i32 v2, v2, v3, v4 1934fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v1, v0, v1 1935fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 1936fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v1 1937fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 1938fd6f8b3cSVikash Gupta; 1939fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_v2f16_test4: 1940fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 1941fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1942fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, 0x3800 1943fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 1944fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v2, 0x3c00, v5, vcc_lo 1945fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v3 1946fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x3c00, v5, vcc_lo 1947fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_pack_b32_f16 v1, v1, v2 1948fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, v0, v1 1949fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 1950fd6f8b3cSVikash Gupta; 1951fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_v2f16_test4: 1952fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 1953fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1954fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v3 1955fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff 1956fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo 1957fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 1958fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v3 1959fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc_lo 1960fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v1, v0, v1 1961fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_med3_i32 v2, 0xffff8000, v2, v3 1962fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_and_b32_e32 v1, 0xffff, v1 1963fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 1964fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v1 1965fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 1966fd6f8b3cSVikash Gupta; 1967fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_v2f16_test4: 1968fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 1969fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1970fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mov_b32_e32 v5, 0x3800 1971fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 1972fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1) 1973fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v2, 0x3c00, v5, vcc_lo 1974fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v3 1975fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x3c00, v5, vcc_lo 1976fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_pack_b32_f16 v1, v1, v2 1977fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) 1978fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_pk_mul_f16 v0, v0, v1 1979fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 1980fd6f8b3cSVikash Gupta; 1981fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_v2f16_test4: 1982fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 1983fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 1984fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v3 1985fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff 1986fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo 1987fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 1988fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_lshrrev_b32_e32 v4, 16, v0 1989fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2) 1990fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v3 1991fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc_lo 1992fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 1993fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2) 1994fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_med3_i32 v2, 0xffff8000, v2, v3 1995fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v0 1996fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 1997fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_ldexp_f16_e32 v1, v4, v2 1998fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v0 1999fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 20000a140c42SVikash Gupta %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2 20010a140c42SVikash Gupta %y = select <2 x i1> %bool, <2 x half> <half 5.000000e-01, half 5.000000e-01>, <2 x half> <half 1.000000e+00, half 1.000000e+00> 20020a140c42SVikash Gupta %ldexp = fmul <2 x half> %x, %y 20030a140c42SVikash Gupta ret <2 x half> %ldexp 20040a140c42SVikash Gupta} 20050a140c42SVikash Gupta 20060a140c42SVikash Guptadefine half @fmul_select_f16_test5(half %x, i32 %bool.arg1, i32 %bool.arg2) { 2007fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f16_test5: 2008fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 2009fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2010fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 2011fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2012fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, 3, 1, vcc 2013fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0 2014fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v1 2015fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 2016fd6f8b3cSVikash Gupta; 2017fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f16_test5: 2018fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 2019fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2020fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0 2021fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2022fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v1, 3, 1, vcc 2023fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v1 2024fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 2025fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 20260a140c42SVikash Gupta; 20270a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f16_test5: 20280a140c42SVikash Gupta; GFX9: ; %bb.0: 20290a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 20300a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 20310b0d9a3bSVikash Gupta; GFX9-NEXT: v_cndmask_b32_e64 v1, 3, 1, vcc 20320b0d9a3bSVikash Gupta; GFX9-NEXT: v_ldexp_f16_e32 v0, v0, v1 20330a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 20340a140c42SVikash Gupta; 2035fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f16_test5: 2036fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 2037fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2038fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2039fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v1, 3, 1, vcc_lo 2040fd6f8b3cSVikash Gupta; GFX10-NEXT: v_ldexp_f16_e32 v0, v0, v1 2041fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 20420a140c42SVikash Gupta; 2043fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f16_test5: 2044fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 2045fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2046fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2047fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v1, 3, 1, vcc_lo 2048fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 2049fd6f8b3cSVikash Gupta; GFX11-NEXT: v_ldexp_f16_e32 v0, v0, v1 2050fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 20510a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 20520a140c42SVikash Gupta %y = select i1 %bool, half 2.000000e+00, half 8.000000e+00 20530a140c42SVikash Gupta %ldexp = fmul half %x, %y 20540a140c42SVikash Gupta ret half %ldexp 20550a140c42SVikash Gupta} 20560a140c42SVikash Gupta 20570a140c42SVikash Guptadefine half @fmul_select_f16_test6(half %x, i32 %bool.arg1, i32 %bool.arg2) { 2058fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f16_test6: 2059fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 2060fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2061fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 2062fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v3, 0x40400000 2063fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v4, 0xc1000000 2064fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2065fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0 2066fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 2067fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1 2068fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 20690a140c42SVikash Gupta; 2070fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f16_test6: 2071fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 2072fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2073fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v3, 0xc800 2074fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0x4200 2075fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2076fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc 2077fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0 2078fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1 2079fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1 2080fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 2081fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 20820a140c42SVikash Gupta; 2083fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f16_test6: 2084fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 2085fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2086fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x4200 2087fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0xc800 2088fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2089fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 2090fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mul_f16_e32 v0, v0, v1 2091fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 20920a140c42SVikash Gupta; 2093fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f16_test6: 2094fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 2095fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2096fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xc800 2097fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x4200 2098fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2099fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc 2100fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mul_f16_e32 v0, v0, v1 2101fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 2102fd6f8b3cSVikash Gupta; 2103fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_f16_test6: 2104fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 2105fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2106fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0xc800 2107fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2108fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x4200, v3, vcc_lo 2109fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mul_f16_e32 v0, v0, v1 2110fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 2111fd6f8b3cSVikash Gupta; 2112fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_f16_test6: 2113fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 2114fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2115fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x4200 2116fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2117fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0xc800, vcc_lo 2118fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mul_f16_e32 v0, v0, v1 2119fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 2120fd6f8b3cSVikash Gupta; 2121fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_f16_test6: 2122fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 2123fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2124fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mov_b32_e32 v3, 0xc800 2125fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2126fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 2127fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x4200, v3, vcc_lo 2128fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mul_f16_e32 v0, v0, v1 2129fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 2130fd6f8b3cSVikash Gupta; 2131fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_f16_test6: 2132fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 2133fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2134fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mov_b32_e32 v3, 0x4200 2135fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2136fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 2137fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0xc800, vcc_lo 2138fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mul_f16_e32 v0, v0, v1 2139fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 21400a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 21410a140c42SVikash Gupta %y = select i1 %bool, half -8.000000e+00, half 3.000000e+00 21420a140c42SVikash Gupta %ldexp = fmul half %x, %y 21430a140c42SVikash Gupta ret half %ldexp 21440a140c42SVikash Gupta} 21450a140c42SVikash Gupta 21460a140c42SVikash Guptadefine half @fmul_select_f16_test7(half %x, i32 %bool.arg1, i32 %bool.arg2) { 2147fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f16_test7: 2148fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 2149fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2150fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 2151fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mov_b32_e32 v3, 0x41000000 2152fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2153fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, -4.0, v3, vcc 2154fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0 2155fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1 2156fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 21570a140c42SVikash Gupta; 2158fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f16_test7: 2159fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 2160fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2161fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v3, 0x4800 2162fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0xc400 2163fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2164fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc 2165fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0 2166fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1 2167fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1 2168fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 2169fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 21700a140c42SVikash Gupta; 2171fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f16_test7: 2172fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 2173fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2174fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0xc400 2175fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x4800 2176fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2177fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 2178fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mul_f16_e32 v0, v0, v1 2179fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 21800a140c42SVikash Gupta; 2181fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f16_test7: 2182fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 2183fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2184fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x4800 2185fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0xc400 2186fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2187fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc 2188fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mul_f16_e32 v0, v0, v1 2189fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 2190fd6f8b3cSVikash Gupta; 2191fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_f16_test7: 2192fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 2193fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2194fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x4800 2195fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2196fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0xc400, v3, vcc_lo 2197fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_mul_f16_e32 v0, v0, v1 2198fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 2199fd6f8b3cSVikash Gupta; 2200fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_f16_test7: 2201fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 2202fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2203fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0xc400 2204fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2205fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0x4800, vcc_lo 2206fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mul_f16_e32 v0, v0, v1 2207fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 2208fd6f8b3cSVikash Gupta; 2209fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_f16_test7: 2210fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 2211fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2212fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mov_b32_e32 v3, 0x4800 2213fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2214fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 2215fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v1, 0xc400, v3, vcc_lo 2216fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_mul_f16_e32 v0, v0, v1 2217fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 2218fd6f8b3cSVikash Gupta; 2219fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_f16_test7: 2220fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 2221fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2222fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mov_b32_e32 v3, 0xc400 2223fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2224fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 2225fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0x4800, vcc_lo 2226fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mul_f16_e32 v0, v0, v1 2227fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 22280a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 22290a140c42SVikash Gupta %y = select i1 %bool, half 8.000000e+00, half -4.000000e+00 22300a140c42SVikash Gupta %ldexp = fmul half %x, %y 22310a140c42SVikash Gupta ret half %ldexp 22320a140c42SVikash Gupta} 22330a140c42SVikash Gupta 22340a140c42SVikash Guptadefine half @fmul_select_f16_test8(half %x, i32 %bool.arg1, i32 %bool.arg2) { 2235fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f16_test8: 2236fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 2237fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2238fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 2239fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_bfrev_b32_e32 v3, 1 2240fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2241fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc 2242fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0 2243fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1 2244fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 2245fd6f8b3cSVikash Gupta; 2246fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f16_test8: 2247fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 2248fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2249fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mov_b32_e32 v3, 0x8000 2250fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2251fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc 2252fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0 2253fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1 2254fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1 2255fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 2256fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 22570a140c42SVikash Gupta; 22580a140c42SVikash Gupta; GFX9-LABEL: fmul_select_f16_test8: 22590a140c42SVikash Gupta; GFX9: ; %bb.0: 22600a140c42SVikash Gupta; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 22610a140c42SVikash Gupta; GFX9-NEXT: v_mov_b32_e32 v3, 0x8000 22620a140c42SVikash Gupta; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 22630a140c42SVikash Gupta; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc 22640a140c42SVikash Gupta; GFX9-NEXT: v_mul_f16_e32 v0, v0, v1 22650a140c42SVikash Gupta; GFX9-NEXT: s_setpc_b64 s[30:31] 22660a140c42SVikash Gupta; 2267fd6f8b3cSVikash Gupta; GFX10-LABEL: fmul_select_f16_test8: 2268fd6f8b3cSVikash Gupta; GFX10: ; %bb.0: 2269fd6f8b3cSVikash Gupta; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2270fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2271fd6f8b3cSVikash Gupta; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x8000, vcc_lo 2272fd6f8b3cSVikash Gupta; GFX10-NEXT: v_mul_f16_e32 v0, v0, v1 2273fd6f8b3cSVikash Gupta; GFX10-NEXT: s_setpc_b64 s[30:31] 22740a140c42SVikash Gupta; 2275fd6f8b3cSVikash Gupta; GFX11-LABEL: fmul_select_f16_test8: 2276fd6f8b3cSVikash Gupta; GFX11: ; %bb.0: 2277fd6f8b3cSVikash Gupta; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2278fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2279fd6f8b3cSVikash Gupta; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x8000, vcc_lo 2280fd6f8b3cSVikash Gupta; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 2281fd6f8b3cSVikash Gupta; GFX11-NEXT: v_mul_f16_e32 v0, v0, v1 2282fd6f8b3cSVikash Gupta; GFX11-NEXT: s_setpc_b64 s[30:31] 22830a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 22840a140c42SVikash Gupta %y = select i1 %bool, half -0.000000e+00, half 0.000000e+00 22850a140c42SVikash Gupta %ldexp = fmul half %x, %y 22860a140c42SVikash Gupta ret half %ldexp 22870a140c42SVikash Gupta} 22880a140c42SVikash Gupta 22890a140c42SVikash Guptadefine half @fmul_select_f16_test9(half %x, i32 %bool.arg1, i32 %bool.arg2) { 2290fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f16_test9: 2291fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 2292fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2293fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f16_f32_e64 v0, -v0 2294fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2295fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, 5, 4, vcc 2296fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0 2297fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v1 2298fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 22990a140c42SVikash Gupta; 2300fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f16_test9: 2301fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 2302fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2303fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v0, -v0 2304fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2305fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc 2306fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_add_i32_e32 v1, vcc, 5, v1 2307fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v1 2308fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 2309fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 23100a140c42SVikash Gupta; 2311fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f16_test9: 2312fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 2313fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2314fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2315fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v1, 5, 4, vcc 2316fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_ldexp_f16_e64 v0, -v0, v1 2317fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 23180a140c42SVikash Gupta; 2319fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f16_test9: 2320fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 2321fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2322fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2323fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc 2324fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_add_u32_e32 v1, 5, v1 2325fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0xffff8000 2326fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff 2327fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v2, v3 2328fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_ldexp_f16_e64 v0, -v0, v1 2329fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 2330fd6f8b3cSVikash Gupta; 2331fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_f16_test9: 2332fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 2333fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2334fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2335fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v1, 5, 4, vcc_lo 2336fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_ldexp_f16_e64 v0, -v0, v1 2337fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 2338fd6f8b3cSVikash Gupta; 2339fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_f16_test9: 2340fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 2341fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2342fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2343fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0x7fff 2344fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo 2345fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v1, 5, v1 2346fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v2 2347fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_ldexp_f16_e64 v0, -v0, v1 2348fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 2349fd6f8b3cSVikash Gupta; 2350fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_f16_test9: 2351fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 2352fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2353fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2354fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v1, 5, 4, vcc_lo 2355fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) 2356fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_ldexp_f16_e64 v0, -v0, v1 2357fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 2358fd6f8b3cSVikash Gupta; 2359fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_f16_test9: 2360fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 2361fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2362fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2363fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_mov_b32_e32 v2, 0x7fff 2364fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo 2365fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 2366fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_add_nc_u32_e32 v1, 5, v1 2367fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v2 2368fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) 2369fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_ldexp_f16_e64 v0, -v0, v1 2370fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 23710a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 23720a140c42SVikash Gupta %y = select i1 %bool, half -1.600000e+01, half -3.200000e+01 23730a140c42SVikash Gupta %ldexp = fmul half %x, %y 23740a140c42SVikash Gupta ret half %ldexp 23750a140c42SVikash Gupta} 23760a140c42SVikash Gupta 23770a140c42SVikash Guptadefine half @fmul_select_f16_test10_sel_log2val_neg11_pos11(half %x, i32 %bool.arg1, i32 %bool.arg2) { 2378fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11: 2379fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 2380fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2381fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 2382fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2383fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc 2384fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0 2385fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v1 2386fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 23870a140c42SVikash Gupta; 2388fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11: 2389fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 2390fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2391fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0 2392fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2393fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc 2394fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v1 2395fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 2396fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 23970a140c42SVikash Gupta; 2398fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11: 2399fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 2400fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2401fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2402fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc 2403fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x8000 2404fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0x7fff 2405fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_med3_i32 v1, v1, s4, v2 2406fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v1 2407fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 24080a140c42SVikash Gupta; 2409fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11: 2410fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 2411fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2412fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2413fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc 2414fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 2415fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 2416fd6f8b3cSVikash Gupta; 2417fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11: 2418fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 2419fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2420fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2421fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_movk_i32 s4, 0x8000 2422fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc_lo 2423fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_med3_i32 v1, v1, s4, 0x7fff 2424fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v1 2425fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 2426fd6f8b3cSVikash Gupta; 2427fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11: 2428fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 2429fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2430fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2431fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc_lo 2432fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 2433fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 2434fd6f8b3cSVikash Gupta; 2435fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11: 2436fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 2437fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2438fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2439fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_movk_i32 s0, 0x8000 2440fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc_lo 2441fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 2442fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_med3_i32 v1, v1, s0, 0x7fff 2443fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v1 2444fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 2445fd6f8b3cSVikash Gupta; 2446fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11: 2447fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 2448fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2449fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2450fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc_lo 2451fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) 2452fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 2453fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 24540a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 24550a140c42SVikash Gupta %y = select i1 %bool, half 0xH1000, half 0xH6800 24560a140c42SVikash Gupta %ldexp = fmul half %x, %y 24570a140c42SVikash Gupta ret half %ldexp 24580a140c42SVikash Gupta} 24590a140c42SVikash Gupta 24600a140c42SVikash Guptadefine half @fmul_select_f16_test11_sel_log2val_pos7_neg14(half %x, i32 %bool.arg1, i32 %bool.arg2) { 2461fd6f8b3cSVikash Gupta; GFX7-SDAG-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14: 2462fd6f8b3cSVikash Gupta; GFX7-SDAG: ; %bb.0: 2463fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2464fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0 2465fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2466fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc 2467fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0 2468fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v1 2469fd6f8b3cSVikash Gupta; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31] 24700a140c42SVikash Gupta; 2471fd6f8b3cSVikash Gupta; GFX7-GISEL-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14: 2472fd6f8b3cSVikash Gupta; GFX7-GISEL: ; %bb.0: 2473fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2474fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0 2475fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2476fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc 2477fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v1 2478fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0 2479fd6f8b3cSVikash Gupta; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31] 24800a140c42SVikash Gupta; 2481fd6f8b3cSVikash Gupta; GFX9-SDAG-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14: 2482fd6f8b3cSVikash Gupta; GFX9-SDAG: ; %bb.0: 2483fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2484fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2485fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc 2486fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x8000 2487fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0x7fff 2488fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_med3_i32 v1, v1, s4, v2 2489fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v1 2490fd6f8b3cSVikash Gupta; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31] 24910a140c42SVikash Gupta; 2492fd6f8b3cSVikash Gupta; GFX9-GISEL-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14: 2493fd6f8b3cSVikash Gupta; GFX9-GISEL: ; %bb.0: 2494fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2495fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2496fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc 2497fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 2498fd6f8b3cSVikash Gupta; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31] 2499fd6f8b3cSVikash Gupta; 2500fd6f8b3cSVikash Gupta; GFX10-SDAG-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14: 2501fd6f8b3cSVikash Gupta; GFX10-SDAG: ; %bb.0: 2502fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2503fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2504fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_movk_i32 s4, 0x8000 2505fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc_lo 2506fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_med3_i32 v1, v1, s4, 0x7fff 2507fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v1 2508fd6f8b3cSVikash Gupta; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31] 2509fd6f8b3cSVikash Gupta; 2510fd6f8b3cSVikash Gupta; GFX10-GISEL-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14: 2511fd6f8b3cSVikash Gupta; GFX10-GISEL: ; %bb.0: 2512fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2513fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2514fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc_lo 2515fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 2516fd6f8b3cSVikash Gupta; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31] 2517fd6f8b3cSVikash Gupta; 2518fd6f8b3cSVikash Gupta; GFX11-SDAG-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14: 2519fd6f8b3cSVikash Gupta; GFX11-SDAG: ; %bb.0: 2520fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2521fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2522fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_movk_i32 s0, 0x8000 2523fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc_lo 2524fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 2525fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_med3_i32 v1, v1, s0, 0x7fff 2526fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v1 2527fd6f8b3cSVikash Gupta; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31] 2528fd6f8b3cSVikash Gupta; 2529fd6f8b3cSVikash Gupta; GFX11-GISEL-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14: 2530fd6f8b3cSVikash Gupta; GFX11-GISEL: ; %bb.0: 2531fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2532fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2533fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc_lo 2534fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1) 2535fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v1 2536fd6f8b3cSVikash Gupta; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31] 25370a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 25380a140c42SVikash Gupta %y = select i1 %bool, half 0xH5800, half 0xH0400 25390a140c42SVikash Gupta %ldexp = fmul half %x, %y 25400a140c42SVikash Gupta ret half %ldexp 25410a140c42SVikash Gupta} 25420a140c42SVikash Gupta 25430a140c42SVikash Guptadefine bfloat @fmul_select_bf16_test1(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) { 2544*5a81a559SDavid Green; GFX7-LABEL: fmul_select_bf16_test1: 2545*5a81a559SDavid Green; GFX7: ; %bb.0: 2546*5a81a559SDavid Green; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2547*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0 2548*5a81a559SDavid Green; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2549*5a81a559SDavid Green; GFX7-NEXT: v_cndmask_b32_e64 v1, 1.0, 2.0, vcc 2550*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2551*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 2552*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2553*5a81a559SDavid Green; GFX7-NEXT: s_setpc_b64 s[30:31] 25540a140c42SVikash Gupta; 2555*5a81a559SDavid Green; GFX9-LABEL: fmul_select_bf16_test1: 2556*5a81a559SDavid Green; GFX9: ; %bb.0: 2557*5a81a559SDavid Green; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2558*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v3, 0x3f80 2559*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v4, 0x4000 2560*5a81a559SDavid Green; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2561*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 2562*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 2563*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0 2564*5a81a559SDavid Green; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 2565*5a81a559SDavid Green; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 2566*5a81a559SDavid Green; GFX9-NEXT: s_movk_i32 s4, 0x7fff 2567*5a81a559SDavid Green; GFX9-NEXT: v_add3_u32 v1, v1, v0, s4 2568*5a81a559SDavid Green; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 2569*5a81a559SDavid Green; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 2570*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc 2571*5a81a559SDavid Green; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 2572*5a81a559SDavid Green; GFX9-NEXT: s_setpc_b64 s[30:31] 25730a140c42SVikash Gupta; 2574*5a81a559SDavid Green; GFX10-LABEL: fmul_select_bf16_test1: 2575*5a81a559SDavid Green; GFX10: ; %bb.0: 2576*5a81a559SDavid Green; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2577*5a81a559SDavid Green; GFX10-NEXT: v_mov_b32_e32 v3, 0x4000 2578*5a81a559SDavid Green; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2579*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v0 2580*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v3, vcc_lo 2581*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v1 2582*5a81a559SDavid Green; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 2583*5a81a559SDavid Green; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 1 2584*5a81a559SDavid Green; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v0 2585*5a81a559SDavid Green; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 2586*5a81a559SDavid Green; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 2587*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 2588*5a81a559SDavid Green; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v0 2589*5a81a559SDavid Green; GFX10-NEXT: s_setpc_b64 s[30:31] 25900a140c42SVikash Gupta; 2591*5a81a559SDavid Green; GFX11-LABEL: fmul_select_bf16_test1: 2592*5a81a559SDavid Green; GFX11: ; %bb.0: 2593*5a81a559SDavid Green; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2594*5a81a559SDavid Green; GFX11-NEXT: v_dual_mov_b32 v3, 0x4000 :: v_dual_lshlrev_b32 v0, 16, v0 2595*5a81a559SDavid Green; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2596*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 2597*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v3, vcc_lo 2598*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1 2599*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 2600*5a81a559SDavid Green; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 2601*5a81a559SDavid Green; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1 2602*5a81a559SDavid Green; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0 2603*5a81a559SDavid Green; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 2604*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) 2605*5a81a559SDavid Green; GFX11-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 2606*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 2607*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 2608*5a81a559SDavid Green; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0 2609*5a81a559SDavid Green; GFX11-NEXT: s_setpc_b64 s[30:31] 26100a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 26110a140c42SVikash Gupta %y = select i1 %bool, bfloat 2.000000e+00, bfloat 1.000000e+00 26120a140c42SVikash Gupta %ldexp = fmul bfloat %x, %y 26130a140c42SVikash Gupta ret bfloat %ldexp 26140a140c42SVikash Gupta} 26150a140c42SVikash Gupta 26160a140c42SVikash Guptadefine bfloat @fmul_select_bf16_test2(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) { 2617*5a81a559SDavid Green; GFX7-LABEL: fmul_select_bf16_test2: 2618*5a81a559SDavid Green; GFX7: ; %bb.0: 2619*5a81a559SDavid Green; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2620*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0 2621*5a81a559SDavid Green; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2622*5a81a559SDavid Green; GFX7-NEXT: v_cndmask_b32_e64 v1, 1.0, 0.5, vcc 2623*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2624*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 2625*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2626*5a81a559SDavid Green; GFX7-NEXT: s_setpc_b64 s[30:31] 26270a140c42SVikash Gupta; 2628*5a81a559SDavid Green; GFX9-LABEL: fmul_select_bf16_test2: 2629*5a81a559SDavid Green; GFX9: ; %bb.0: 2630*5a81a559SDavid Green; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2631*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v3, 0x3f80 2632*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v4, 0x3f00 2633*5a81a559SDavid Green; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2634*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 2635*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 2636*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0 2637*5a81a559SDavid Green; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 2638*5a81a559SDavid Green; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 2639*5a81a559SDavid Green; GFX9-NEXT: s_movk_i32 s4, 0x7fff 2640*5a81a559SDavid Green; GFX9-NEXT: v_add3_u32 v1, v1, v0, s4 2641*5a81a559SDavid Green; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 2642*5a81a559SDavid Green; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 2643*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc 2644*5a81a559SDavid Green; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 2645*5a81a559SDavid Green; GFX9-NEXT: s_setpc_b64 s[30:31] 26460a140c42SVikash Gupta; 2647*5a81a559SDavid Green; GFX10-LABEL: fmul_select_bf16_test2: 2648*5a81a559SDavid Green; GFX10: ; %bb.0: 2649*5a81a559SDavid Green; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2650*5a81a559SDavid Green; GFX10-NEXT: v_mov_b32_e32 v3, 0x3f00 2651*5a81a559SDavid Green; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2652*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v0 2653*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v3, vcc_lo 2654*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v1 2655*5a81a559SDavid Green; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 2656*5a81a559SDavid Green; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 1 2657*5a81a559SDavid Green; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v0 2658*5a81a559SDavid Green; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 2659*5a81a559SDavid Green; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 2660*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 2661*5a81a559SDavid Green; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v0 2662*5a81a559SDavid Green; GFX10-NEXT: s_setpc_b64 s[30:31] 26630a140c42SVikash Gupta; 2664*5a81a559SDavid Green; GFX11-LABEL: fmul_select_bf16_test2: 2665*5a81a559SDavid Green; GFX11: ; %bb.0: 2666*5a81a559SDavid Green; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2667*5a81a559SDavid Green; GFX11-NEXT: v_dual_mov_b32 v3, 0x3f00 :: v_dual_lshlrev_b32 v0, 16, v0 2668*5a81a559SDavid Green; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2669*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 2670*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v3, vcc_lo 2671*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1 2672*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 2673*5a81a559SDavid Green; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 2674*5a81a559SDavid Green; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1 2675*5a81a559SDavid Green; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0 2676*5a81a559SDavid Green; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 2677*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) 2678*5a81a559SDavid Green; GFX11-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 2679*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 2680*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 2681*5a81a559SDavid Green; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0 2682*5a81a559SDavid Green; GFX11-NEXT: s_setpc_b64 s[30:31] 26830a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 26840a140c42SVikash Gupta %y = select i1 %bool, bfloat 5.000000e-01, bfloat 1.000000e+00 26850a140c42SVikash Gupta %ldexp = fmul bfloat %x, %y 26860a140c42SVikash Gupta ret bfloat %ldexp 26870a140c42SVikash Gupta} 26880a140c42SVikash Gupta 26890a140c42SVikash Guptadefine <2 x bfloat> @fmul_select_v2bf16_test3(<2 x bfloat> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) { 2690*5a81a559SDavid Green; GFX7-LABEL: fmul_select_v2bf16_test3: 2691*5a81a559SDavid Green; GFX7: ; %bb.0: 2692*5a81a559SDavid Green; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2693*5a81a559SDavid Green; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 2694*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0 2695*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1 2696*5a81a559SDavid Green; GFX7-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc 2697*5a81a559SDavid Green; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 2698*5a81a559SDavid Green; GFX7-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc 2699*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 2700*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2701*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v1, v1, v3 2702*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, v0, v2 2703*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2704*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 2705*5a81a559SDavid Green; GFX7-NEXT: s_setpc_b64 s[30:31] 27060a140c42SVikash Gupta; 2707*5a81a559SDavid Green; GFX9-LABEL: fmul_select_v2bf16_test3: 2708*5a81a559SDavid Green; GFX9: ; %bb.0: 2709*5a81a559SDavid Green; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2710*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v5, 0x3f80 2711*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v6, 0x4000 2712*5a81a559SDavid Green; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 2713*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc 2714*5a81a559SDavid Green; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3 2715*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc 2716*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v0 2717*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 2718*5a81a559SDavid Green; GFX9-NEXT: v_mul_f32_e32 v1, v3, v1 2719*5a81a559SDavid Green; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2720*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 2721*5a81a559SDavid Green; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 2722*5a81a559SDavid Green; GFX9-NEXT: s_movk_i32 s4, 0x7fff 2723*5a81a559SDavid Green; GFX9-NEXT: v_mul_f32_e32 v0, v0, v2 2724*5a81a559SDavid Green; GFX9-NEXT: v_add3_u32 v3, v3, v1, s4 2725*5a81a559SDavid Green; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 2726*5a81a559SDavid Green; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 2727*5a81a559SDavid Green; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1 2728*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 2729*5a81a559SDavid Green; GFX9-NEXT: v_add3_u32 v2, v2, v0, s4 2730*5a81a559SDavid Green; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0 2731*5a81a559SDavid Green; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 2732*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc 2733*5a81a559SDavid Green; GFX9-NEXT: s_mov_b32 s4, 0x7060302 2734*5a81a559SDavid Green; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 2735*5a81a559SDavid Green; GFX9-NEXT: s_setpc_b64 s[30:31] 27360a140c42SVikash Gupta; 2737*5a81a559SDavid Green; GFX10-LABEL: fmul_select_v2bf16_test3: 2738*5a81a559SDavid Green; GFX10: ; %bb.0: 2739*5a81a559SDavid Green; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2740*5a81a559SDavid Green; GFX10-NEXT: v_mov_b32_e32 v5, 0x4000 2741*5a81a559SDavid Green; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v3 2742*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v0 2743*5a81a559SDavid Green; GFX10-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2744*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v5, vcc_lo 2745*5a81a559SDavid Green; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 2746*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v1 2747*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v2, 0x3f80, v5, vcc_lo 2748*5a81a559SDavid Green; GFX10-NEXT: v_mul_f32_e32 v1, v3, v1 2749*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v2, 16, v2 2750*5a81a559SDavid Green; GFX10-NEXT: v_or_b32_e32 v4, 0x400000, v1 2751*5a81a559SDavid Green; GFX10-NEXT: v_mul_f32_e32 v0, v0, v2 2752*5a81a559SDavid Green; GFX10-NEXT: v_bfe_u32 v2, v1, 16, 1 2753*5a81a559SDavid Green; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 2754*5a81a559SDavid Green; GFX10-NEXT: v_bfe_u32 v3, v0, 16, 1 2755*5a81a559SDavid Green; GFX10-NEXT: v_add3_u32 v2, v2, v1, 0x7fff 2756*5a81a559SDavid Green; GFX10-NEXT: v_or_b32_e32 v5, 0x400000, v0 2757*5a81a559SDavid Green; GFX10-NEXT: v_add3_u32 v3, v3, v0, 0x7fff 2758*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo 2759*5a81a559SDavid Green; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 2760*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo 2761*5a81a559SDavid Green; GFX10-NEXT: v_perm_b32 v0, v0, v1, 0x7060302 2762*5a81a559SDavid Green; GFX10-NEXT: s_setpc_b64 s[30:31] 27630a140c42SVikash Gupta; 2764*5a81a559SDavid Green; GFX11-LABEL: fmul_select_v2bf16_test3: 2765*5a81a559SDavid Green; GFX11: ; %bb.0: 2766*5a81a559SDavid Green; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2767*5a81a559SDavid Green; GFX11-NEXT: v_mov_b32_e32 v5, 0x4000 2768*5a81a559SDavid Green; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v3 2769*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v0 2770*5a81a559SDavid Green; GFX11-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2771*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1) 2772*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v5, vcc_lo 2773*5a81a559SDavid Green; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 2774*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v2, 0x3f80, v5, vcc_lo 2775*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2 2776*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 2777*5a81a559SDavid Green; GFX11-NEXT: v_dual_mul_f32 v0, v0, v2 :: v_dual_lshlrev_b32 v1, 16, v1 2778*5a81a559SDavid Green; GFX11-NEXT: v_or_b32_e32 v5, 0x400000, v0 2779*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) 2780*5a81a559SDavid Green; GFX11-NEXT: v_mul_f32_e32 v1, v3, v1 2781*5a81a559SDavid Green; GFX11-NEXT: v_bfe_u32 v3, v0, 16, 1 2782*5a81a559SDavid Green; GFX11-NEXT: v_bfe_u32 v2, v1, 16, 1 2783*5a81a559SDavid Green; GFX11-NEXT: v_or_b32_e32 v4, 0x400000, v1 2784*5a81a559SDavid Green; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 2785*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) 2786*5a81a559SDavid Green; GFX11-NEXT: v_add3_u32 v3, v3, v0, 0x7fff 2787*5a81a559SDavid Green; GFX11-NEXT: v_add3_u32 v2, v2, v1, 0x7fff 2788*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4) 2789*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo 2790*5a81a559SDavid Green; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 2791*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo 2792*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 2793*5a81a559SDavid Green; GFX11-NEXT: v_perm_b32 v0, v0, v1, 0x7060302 2794*5a81a559SDavid Green; GFX11-NEXT: s_setpc_b64 s[30:31] 27950a140c42SVikash Gupta %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2 27960a140c42SVikash Gupta %y = select <2 x i1> %bool, <2 x bfloat> <bfloat 2.000000e+00, bfloat 2.000000e+00>, <2 x bfloat> <bfloat 1.000000e+00, bfloat 1.000000e+00> 27970a140c42SVikash Gupta %ldexp = fmul <2 x bfloat> %x, %y 27980a140c42SVikash Gupta ret <2 x bfloat> %ldexp 27990a140c42SVikash Gupta} 28000a140c42SVikash Gupta 28010a140c42SVikash Guptadefine <2 x bfloat> @fmul_select_v2bf16_test4(<2 x bfloat> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) { 2802*5a81a559SDavid Green; GFX7-LABEL: fmul_select_v2bf16_test4: 2803*5a81a559SDavid Green; GFX7: ; %bb.0: 2804*5a81a559SDavid Green; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2805*5a81a559SDavid Green; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 2806*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0 2807*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v1 2808*5a81a559SDavid Green; GFX7-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc 2809*5a81a559SDavid Green; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5 2810*5a81a559SDavid Green; GFX7-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc 2811*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 2812*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2813*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v1, v1, v3 2814*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, v0, v2 2815*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2816*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v1 2817*5a81a559SDavid Green; GFX7-NEXT: s_setpc_b64 s[30:31] 28180a140c42SVikash Gupta; 2819*5a81a559SDavid Green; GFX9-LABEL: fmul_select_v2bf16_test4: 2820*5a81a559SDavid Green; GFX9: ; %bb.0: 2821*5a81a559SDavid Green; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2822*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v5, 0x3f80 2823*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v6, 0x3f00 2824*5a81a559SDavid Green; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4 2825*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc 2826*5a81a559SDavid Green; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v3 2827*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc 2828*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v3, 16, v0 2829*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 2830*5a81a559SDavid Green; GFX9-NEXT: v_mul_f32_e32 v1, v3, v1 2831*5a81a559SDavid Green; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2832*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v2 2833*5a81a559SDavid Green; GFX9-NEXT: v_bfe_u32 v3, v1, 16, 1 2834*5a81a559SDavid Green; GFX9-NEXT: s_movk_i32 s4, 0x7fff 2835*5a81a559SDavid Green; GFX9-NEXT: v_mul_f32_e32 v0, v0, v2 2836*5a81a559SDavid Green; GFX9-NEXT: v_add3_u32 v3, v3, v1, s4 2837*5a81a559SDavid Green; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v1 2838*5a81a559SDavid Green; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v1 2839*5a81a559SDavid Green; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 1 2840*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 2841*5a81a559SDavid Green; GFX9-NEXT: v_add3_u32 v2, v2, v0, s4 2842*5a81a559SDavid Green; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v0 2843*5a81a559SDavid Green; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 2844*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc 2845*5a81a559SDavid Green; GFX9-NEXT: s_mov_b32 s4, 0x7060302 2846*5a81a559SDavid Green; GFX9-NEXT: v_perm_b32 v0, v0, v1, s4 2847*5a81a559SDavid Green; GFX9-NEXT: s_setpc_b64 s[30:31] 28480a140c42SVikash Gupta; 2849*5a81a559SDavid Green; GFX10-LABEL: fmul_select_v2bf16_test4: 2850*5a81a559SDavid Green; GFX10: ; %bb.0: 2851*5a81a559SDavid Green; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2852*5a81a559SDavid Green; GFX10-NEXT: v_mov_b32_e32 v5, 0x3f00 2853*5a81a559SDavid Green; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v3 2854*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v0 2855*5a81a559SDavid Green; GFX10-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2856*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v5, vcc_lo 2857*5a81a559SDavid Green; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 2858*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v1 2859*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v2, 0x3f80, v5, vcc_lo 2860*5a81a559SDavid Green; GFX10-NEXT: v_mul_f32_e32 v1, v3, v1 2861*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v2, 16, v2 2862*5a81a559SDavid Green; GFX10-NEXT: v_or_b32_e32 v4, 0x400000, v1 2863*5a81a559SDavid Green; GFX10-NEXT: v_mul_f32_e32 v0, v0, v2 2864*5a81a559SDavid Green; GFX10-NEXT: v_bfe_u32 v2, v1, 16, 1 2865*5a81a559SDavid Green; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 2866*5a81a559SDavid Green; GFX10-NEXT: v_bfe_u32 v3, v0, 16, 1 2867*5a81a559SDavid Green; GFX10-NEXT: v_add3_u32 v2, v2, v1, 0x7fff 2868*5a81a559SDavid Green; GFX10-NEXT: v_or_b32_e32 v5, 0x400000, v0 2869*5a81a559SDavid Green; GFX10-NEXT: v_add3_u32 v3, v3, v0, 0x7fff 2870*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo 2871*5a81a559SDavid Green; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 2872*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo 2873*5a81a559SDavid Green; GFX10-NEXT: v_perm_b32 v0, v0, v1, 0x7060302 2874*5a81a559SDavid Green; GFX10-NEXT: s_setpc_b64 s[30:31] 28750a140c42SVikash Gupta; 2876*5a81a559SDavid Green; GFX11-LABEL: fmul_select_v2bf16_test4: 2877*5a81a559SDavid Green; GFX11: ; %bb.0: 2878*5a81a559SDavid Green; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2879*5a81a559SDavid Green; GFX11-NEXT: v_mov_b32_e32 v5, 0x3f00 2880*5a81a559SDavid Green; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v3 2881*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v3, 16, v0 2882*5a81a559SDavid Green; GFX11-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2883*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1) 2884*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v5, vcc_lo 2885*5a81a559SDavid Green; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4 2886*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v2, 0x3f80, v5, vcc_lo 2887*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v2, 16, v2 2888*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 2889*5a81a559SDavid Green; GFX11-NEXT: v_dual_mul_f32 v0, v0, v2 :: v_dual_lshlrev_b32 v1, 16, v1 2890*5a81a559SDavid Green; GFX11-NEXT: v_or_b32_e32 v5, 0x400000, v0 2891*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2) 2892*5a81a559SDavid Green; GFX11-NEXT: v_mul_f32_e32 v1, v3, v1 2893*5a81a559SDavid Green; GFX11-NEXT: v_bfe_u32 v3, v0, 16, 1 2894*5a81a559SDavid Green; GFX11-NEXT: v_bfe_u32 v2, v1, 16, 1 2895*5a81a559SDavid Green; GFX11-NEXT: v_or_b32_e32 v4, 0x400000, v1 2896*5a81a559SDavid Green; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1 2897*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4) 2898*5a81a559SDavid Green; GFX11-NEXT: v_add3_u32 v3, v3, v0, 0x7fff 2899*5a81a559SDavid Green; GFX11-NEXT: v_add3_u32 v2, v2, v1, 0x7fff 2900*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4) 2901*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo 2902*5a81a559SDavid Green; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 2903*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo 2904*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 2905*5a81a559SDavid Green; GFX11-NEXT: v_perm_b32 v0, v0, v1, 0x7060302 2906*5a81a559SDavid Green; GFX11-NEXT: s_setpc_b64 s[30:31] 29070a140c42SVikash Gupta %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2 29080a140c42SVikash Gupta %y = select <2 x i1> %bool, <2 x bfloat> <bfloat 5.000000e-01, bfloat 5.000000e-01>, <2 x bfloat> <bfloat 1.000000e+00, bfloat 1.000000e+00> 29090a140c42SVikash Gupta %ldexp = fmul <2 x bfloat> %x, %y 29100a140c42SVikash Gupta ret <2 x bfloat> %ldexp 29110a140c42SVikash Gupta} 29120a140c42SVikash Gupta 29130a140c42SVikash Guptadefine bfloat @fmul_select_bf16_test5(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) { 2914*5a81a559SDavid Green; GFX7-LABEL: fmul_select_bf16_test5: 2915*5a81a559SDavid Green; GFX7: ; %bb.0: 2916*5a81a559SDavid Green; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2917*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0 2918*5a81a559SDavid Green; GFX7-NEXT: v_mov_b32_e32 v3, 0x41000000 2919*5a81a559SDavid Green; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2920*5a81a559SDavid Green; GFX7-NEXT: v_cndmask_b32_e64 v1, v3, 2.0, vcc 2921*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2922*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 2923*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2924*5a81a559SDavid Green; GFX7-NEXT: s_setpc_b64 s[30:31] 29250a140c42SVikash Gupta; 2926*5a81a559SDavid Green; GFX9-LABEL: fmul_select_bf16_test5: 2927*5a81a559SDavid Green; GFX9: ; %bb.0: 2928*5a81a559SDavid Green; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2929*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v3, 0x4100 2930*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v4, 0x4000 2931*5a81a559SDavid Green; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2932*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 2933*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 2934*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0 2935*5a81a559SDavid Green; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 2936*5a81a559SDavid Green; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 2937*5a81a559SDavid Green; GFX9-NEXT: s_movk_i32 s4, 0x7fff 2938*5a81a559SDavid Green; GFX9-NEXT: v_add3_u32 v1, v1, v0, s4 2939*5a81a559SDavid Green; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 2940*5a81a559SDavid Green; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 2941*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc 2942*5a81a559SDavid Green; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 2943*5a81a559SDavid Green; GFX9-NEXT: s_setpc_b64 s[30:31] 29440a140c42SVikash Gupta; 2945*5a81a559SDavid Green; GFX10-LABEL: fmul_select_bf16_test5: 2946*5a81a559SDavid Green; GFX10: ; %bb.0: 2947*5a81a559SDavid Green; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2948*5a81a559SDavid Green; GFX10-NEXT: v_mov_b32_e32 v3, 0x4000 2949*5a81a559SDavid Green; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2950*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v0 2951*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v1, 0x4100, v3, vcc_lo 2952*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v1 2953*5a81a559SDavid Green; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 2954*5a81a559SDavid Green; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 1 2955*5a81a559SDavid Green; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v0 2956*5a81a559SDavid Green; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 2957*5a81a559SDavid Green; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 2958*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 2959*5a81a559SDavid Green; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v0 2960*5a81a559SDavid Green; GFX10-NEXT: s_setpc_b64 s[30:31] 29610a140c42SVikash Gupta; 2962*5a81a559SDavid Green; GFX11-LABEL: fmul_select_bf16_test5: 2963*5a81a559SDavid Green; GFX11: ; %bb.0: 2964*5a81a559SDavid Green; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2965*5a81a559SDavid Green; GFX11-NEXT: v_dual_mov_b32 v3, 0x4000 :: v_dual_lshlrev_b32 v0, 16, v0 2966*5a81a559SDavid Green; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 2967*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 2968*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v1, 0x4100, v3, vcc_lo 2969*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1 2970*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 2971*5a81a559SDavid Green; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 2972*5a81a559SDavid Green; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1 2973*5a81a559SDavid Green; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0 2974*5a81a559SDavid Green; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 2975*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) 2976*5a81a559SDavid Green; GFX11-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 2977*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 2978*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 2979*5a81a559SDavid Green; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0 2980*5a81a559SDavid Green; GFX11-NEXT: s_setpc_b64 s[30:31] 29810a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 29820a140c42SVikash Gupta %y = select i1 %bool, bfloat 2.000000e+00, bfloat 8.000000e+00 29830a140c42SVikash Gupta %ldexp = fmul bfloat %x, %y 29840a140c42SVikash Gupta ret bfloat %ldexp 29850a140c42SVikash Gupta} 29860a140c42SVikash Gupta 29870a140c42SVikash Guptadefine bfloat @fmul_select_bf16_test6(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) { 2988*5a81a559SDavid Green; GFX7-LABEL: fmul_select_bf16_test6: 2989*5a81a559SDavid Green; GFX7: ; %bb.0: 2990*5a81a559SDavid Green; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 2991*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0 2992*5a81a559SDavid Green; GFX7-NEXT: v_mov_b32_e32 v3, 0x40400000 2993*5a81a559SDavid Green; GFX7-NEXT: v_mov_b32_e32 v4, 0xc1000000 2994*5a81a559SDavid Green; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 2995*5a81a559SDavid Green; GFX7-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 2996*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2997*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 2998*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 2999*5a81a559SDavid Green; GFX7-NEXT: s_setpc_b64 s[30:31] 30000a140c42SVikash Gupta; 3001*5a81a559SDavid Green; GFX9-LABEL: fmul_select_bf16_test6: 3002*5a81a559SDavid Green; GFX9: ; %bb.0: 3003*5a81a559SDavid Green; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3004*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v3, 0x4040 3005*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v4, 0xffffc100 3006*5a81a559SDavid Green; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 3007*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 3008*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3009*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0 3010*5a81a559SDavid Green; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 3011*5a81a559SDavid Green; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 3012*5a81a559SDavid Green; GFX9-NEXT: s_movk_i32 s4, 0x7fff 3013*5a81a559SDavid Green; GFX9-NEXT: v_add3_u32 v1, v1, v0, s4 3014*5a81a559SDavid Green; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 3015*5a81a559SDavid Green; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 3016*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc 3017*5a81a559SDavid Green; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3018*5a81a559SDavid Green; GFX9-NEXT: s_setpc_b64 s[30:31] 30190a140c42SVikash Gupta; 3020*5a81a559SDavid Green; GFX10-LABEL: fmul_select_bf16_test6: 3021*5a81a559SDavid Green; GFX10: ; %bb.0: 3022*5a81a559SDavid Green; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3023*5a81a559SDavid Green; GFX10-NEXT: v_mov_b32_e32 v3, 0xffffc100 3024*5a81a559SDavid Green; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 3025*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v0 3026*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v1, 0x4040, v3, vcc_lo 3027*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3028*5a81a559SDavid Green; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 3029*5a81a559SDavid Green; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 1 3030*5a81a559SDavid Green; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v0 3031*5a81a559SDavid Green; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 3032*5a81a559SDavid Green; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 3033*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 3034*5a81a559SDavid Green; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3035*5a81a559SDavid Green; GFX10-NEXT: s_setpc_b64 s[30:31] 30360a140c42SVikash Gupta; 3037*5a81a559SDavid Green; GFX11-LABEL: fmul_select_bf16_test6: 3038*5a81a559SDavid Green; GFX11: ; %bb.0: 3039*5a81a559SDavid Green; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3040*5a81a559SDavid Green; GFX11-NEXT: v_dual_mov_b32 v3, 0xffffc100 :: v_dual_lshlrev_b32 v0, 16, v0 3041*5a81a559SDavid Green; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 3042*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 3043*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v1, 0x4040, v3, vcc_lo 3044*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3045*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 3046*5a81a559SDavid Green; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 3047*5a81a559SDavid Green; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1 3048*5a81a559SDavid Green; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0 3049*5a81a559SDavid Green; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 3050*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) 3051*5a81a559SDavid Green; GFX11-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 3052*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 3053*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 3054*5a81a559SDavid Green; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3055*5a81a559SDavid Green; GFX11-NEXT: s_setpc_b64 s[30:31] 30560a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 30570a140c42SVikash Gupta %y = select i1 %bool, bfloat -8.000000e+00, bfloat 3.000000e+00 30580a140c42SVikash Gupta %ldexp = fmul bfloat %x, %y 30590a140c42SVikash Gupta ret bfloat %ldexp 30600a140c42SVikash Gupta} 30610a140c42SVikash Gupta 30620a140c42SVikash Guptadefine bfloat @fmul_select_bf16_test7(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) { 3063*5a81a559SDavid Green; GFX7-LABEL: fmul_select_bf16_test7: 3064*5a81a559SDavid Green; GFX7: ; %bb.0: 3065*5a81a559SDavid Green; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3066*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0 3067*5a81a559SDavid Green; GFX7-NEXT: v_mov_b32_e32 v3, 0x41000000 3068*5a81a559SDavid Green; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 3069*5a81a559SDavid Green; GFX7-NEXT: v_cndmask_b32_e32 v1, -4.0, v3, vcc 3070*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 3071*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 3072*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 3073*5a81a559SDavid Green; GFX7-NEXT: s_setpc_b64 s[30:31] 30740a140c42SVikash Gupta; 3075*5a81a559SDavid Green; GFX9-LABEL: fmul_select_bf16_test7: 3076*5a81a559SDavid Green; GFX9: ; %bb.0: 3077*5a81a559SDavid Green; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3078*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v3, 0xffffc080 3079*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v4, 0x4100 3080*5a81a559SDavid Green; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 3081*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 3082*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3083*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0 3084*5a81a559SDavid Green; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 3085*5a81a559SDavid Green; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 3086*5a81a559SDavid Green; GFX9-NEXT: s_movk_i32 s4, 0x7fff 3087*5a81a559SDavid Green; GFX9-NEXT: v_add3_u32 v1, v1, v0, s4 3088*5a81a559SDavid Green; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 3089*5a81a559SDavid Green; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 3090*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc 3091*5a81a559SDavid Green; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3092*5a81a559SDavid Green; GFX9-NEXT: s_setpc_b64 s[30:31] 30930a140c42SVikash Gupta; 3094*5a81a559SDavid Green; GFX10-LABEL: fmul_select_bf16_test7: 3095*5a81a559SDavid Green; GFX10: ; %bb.0: 3096*5a81a559SDavid Green; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3097*5a81a559SDavid Green; GFX10-NEXT: v_mov_b32_e32 v3, 0x4100 3098*5a81a559SDavid Green; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 3099*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v0 3100*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v1, 0xffffc080, v3, vcc_lo 3101*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3102*5a81a559SDavid Green; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 3103*5a81a559SDavid Green; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 1 3104*5a81a559SDavid Green; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v0 3105*5a81a559SDavid Green; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 3106*5a81a559SDavid Green; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 3107*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 3108*5a81a559SDavid Green; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3109*5a81a559SDavid Green; GFX10-NEXT: s_setpc_b64 s[30:31] 31100a140c42SVikash Gupta; 3111*5a81a559SDavid Green; GFX11-LABEL: fmul_select_bf16_test7: 3112*5a81a559SDavid Green; GFX11: ; %bb.0: 3113*5a81a559SDavid Green; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3114*5a81a559SDavid Green; GFX11-NEXT: v_dual_mov_b32 v3, 0x4100 :: v_dual_lshlrev_b32 v0, 16, v0 3115*5a81a559SDavid Green; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 3116*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 3117*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v1, 0xffffc080, v3, vcc_lo 3118*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3119*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 3120*5a81a559SDavid Green; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 3121*5a81a559SDavid Green; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1 3122*5a81a559SDavid Green; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0 3123*5a81a559SDavid Green; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 3124*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) 3125*5a81a559SDavid Green; GFX11-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 3126*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 3127*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 3128*5a81a559SDavid Green; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3129*5a81a559SDavid Green; GFX11-NEXT: s_setpc_b64 s[30:31] 31300a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 31310a140c42SVikash Gupta %y = select i1 %bool, bfloat 8.000000e+00, bfloat -4.000000e+00 31320a140c42SVikash Gupta %ldexp = fmul bfloat %x, %y 31330a140c42SVikash Gupta ret bfloat %ldexp 31340a140c42SVikash Gupta} 31350a140c42SVikash Gupta 31360a140c42SVikash Guptadefine bfloat @fmul_select_bf16_test8(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) { 3137*5a81a559SDavid Green; GFX7-LABEL: fmul_select_bf16_test8: 3138*5a81a559SDavid Green; GFX7: ; %bb.0: 3139*5a81a559SDavid Green; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3140*5a81a559SDavid Green; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 3141*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0 3142*5a81a559SDavid Green; GFX7-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc 3143*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 3144*5a81a559SDavid Green; GFX7-NEXT: v_lshlrev_b32_e32 v1, 31, v1 3145*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 3146*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 3147*5a81a559SDavid Green; GFX7-NEXT: s_setpc_b64 s[30:31] 31480a140c42SVikash Gupta; 3149*5a81a559SDavid Green; GFX9-LABEL: fmul_select_bf16_test8: 3150*5a81a559SDavid Green; GFX9: ; %bb.0: 3151*5a81a559SDavid Green; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3152*5a81a559SDavid Green; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 3153*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc 3154*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v2, 15 3155*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b16_sdwa v1, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD 3156*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0 3157*5a81a559SDavid Green; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 3158*5a81a559SDavid Green; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 3159*5a81a559SDavid Green; GFX9-NEXT: s_movk_i32 s4, 0x7fff 3160*5a81a559SDavid Green; GFX9-NEXT: v_add3_u32 v1, v1, v0, s4 3161*5a81a559SDavid Green; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 3162*5a81a559SDavid Green; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 3163*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc 3164*5a81a559SDavid Green; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3165*5a81a559SDavid Green; GFX9-NEXT: s_setpc_b64 s[30:31] 31660a140c42SVikash Gupta; 3167*5a81a559SDavid Green; GFX10-LABEL: fmul_select_bf16_test8: 3168*5a81a559SDavid Green; GFX10: ; %bb.0: 3169*5a81a559SDavid Green; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3170*5a81a559SDavid Green; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 3171*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v0 3172*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo 3173*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b16 v1, 15, v1 3174*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3175*5a81a559SDavid Green; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 3176*5a81a559SDavid Green; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 1 3177*5a81a559SDavid Green; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v0 3178*5a81a559SDavid Green; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 3179*5a81a559SDavid Green; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 3180*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 3181*5a81a559SDavid Green; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3182*5a81a559SDavid Green; GFX10-NEXT: s_setpc_b64 s[30:31] 31830a140c42SVikash Gupta; 3184*5a81a559SDavid Green; GFX11-LABEL: fmul_select_bf16_test8: 3185*5a81a559SDavid Green; GFX11: ; %bb.0: 3186*5a81a559SDavid Green; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3187*5a81a559SDavid Green; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 3188*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v0, 16, v0 3189*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo 3190*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 3191*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b16 v1, 15, v1 3192*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3193*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 3194*5a81a559SDavid Green; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 3195*5a81a559SDavid Green; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1 3196*5a81a559SDavid Green; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0 3197*5a81a559SDavid Green; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 3198*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) 3199*5a81a559SDavid Green; GFX11-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 3200*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 3201*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 3202*5a81a559SDavid Green; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3203*5a81a559SDavid Green; GFX11-NEXT: s_setpc_b64 s[30:31] 32040a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 32050a140c42SVikash Gupta %y = select i1 %bool, bfloat -0.000000e+00, bfloat 0.000000e+00 32060a140c42SVikash Gupta %ldexp = fmul bfloat %x, %y 32070a140c42SVikash Gupta ret bfloat %ldexp 32080a140c42SVikash Gupta} 32090a140c42SVikash Gupta 32100a140c42SVikash Guptadefine bfloat @fmul_select_bf16_test9(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) { 3211*5a81a559SDavid Green; GFX7-LABEL: fmul_select_bf16_test9: 3212*5a81a559SDavid Green; GFX7: ; %bb.0: 3213*5a81a559SDavid Green; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3214*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0 3215*5a81a559SDavid Green; GFX7-NEXT: v_mov_b32_e32 v3, 0xc2000000 3216*5a81a559SDavid Green; GFX7-NEXT: v_mov_b32_e32 v4, 0xc1800000 3217*5a81a559SDavid Green; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 3218*5a81a559SDavid Green; GFX7-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 3219*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 3220*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 3221*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 3222*5a81a559SDavid Green; GFX7-NEXT: s_setpc_b64 s[30:31] 32230a140c42SVikash Gupta; 3224*5a81a559SDavid Green; GFX9-LABEL: fmul_select_bf16_test9: 3225*5a81a559SDavid Green; GFX9: ; %bb.0: 3226*5a81a559SDavid Green; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3227*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v3, 0xffffc200 3228*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v4, 0xffffc180 3229*5a81a559SDavid Green; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 3230*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 3231*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3232*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0 3233*5a81a559SDavid Green; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 3234*5a81a559SDavid Green; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 3235*5a81a559SDavid Green; GFX9-NEXT: s_movk_i32 s4, 0x7fff 3236*5a81a559SDavid Green; GFX9-NEXT: v_add3_u32 v1, v1, v0, s4 3237*5a81a559SDavid Green; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 3238*5a81a559SDavid Green; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 3239*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc 3240*5a81a559SDavid Green; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3241*5a81a559SDavid Green; GFX9-NEXT: s_setpc_b64 s[30:31] 32420a140c42SVikash Gupta; 3243*5a81a559SDavid Green; GFX10-LABEL: fmul_select_bf16_test9: 3244*5a81a559SDavid Green; GFX10: ; %bb.0: 3245*5a81a559SDavid Green; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3246*5a81a559SDavid Green; GFX10-NEXT: v_mov_b32_e32 v3, 0xffffc180 3247*5a81a559SDavid Green; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 3248*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v0 3249*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v1, 0xffffc200, v3, vcc_lo 3250*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3251*5a81a559SDavid Green; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 3252*5a81a559SDavid Green; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 1 3253*5a81a559SDavid Green; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v0 3254*5a81a559SDavid Green; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 3255*5a81a559SDavid Green; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 3256*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 3257*5a81a559SDavid Green; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3258*5a81a559SDavid Green; GFX10-NEXT: s_setpc_b64 s[30:31] 32590a140c42SVikash Gupta; 3260*5a81a559SDavid Green; GFX11-LABEL: fmul_select_bf16_test9: 3261*5a81a559SDavid Green; GFX11: ; %bb.0: 3262*5a81a559SDavid Green; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3263*5a81a559SDavid Green; GFX11-NEXT: v_dual_mov_b32 v3, 0xffffc180 :: v_dual_lshlrev_b32 v0, 16, v0 3264*5a81a559SDavid Green; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 3265*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 3266*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v1, 0xffffc200, v3, vcc_lo 3267*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3268*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 3269*5a81a559SDavid Green; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 3270*5a81a559SDavid Green; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1 3271*5a81a559SDavid Green; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0 3272*5a81a559SDavid Green; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 3273*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) 3274*5a81a559SDavid Green; GFX11-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 3275*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 3276*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 3277*5a81a559SDavid Green; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3278*5a81a559SDavid Green; GFX11-NEXT: s_setpc_b64 s[30:31] 32790a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 32800a140c42SVikash Gupta %y = select i1 %bool, bfloat -1.600000e+01, bfloat -3.200000e+01 32810a140c42SVikash Gupta %ldexp = fmul bfloat %x, %y 32820a140c42SVikash Gupta ret bfloat %ldexp 32830a140c42SVikash Gupta} 32840a140c42SVikash Gupta 32850a140c42SVikash Guptadefine bfloat @fmul_select_bf16_test10_sel_log2val_pos65_pos56(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) { 3286*5a81a559SDavid Green; GFX7-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56: 3287*5a81a559SDavid Green; GFX7: ; %bb.0: 3288*5a81a559SDavid Green; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3289*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0 3290*5a81a559SDavid Green; GFX7-NEXT: v_mov_b32_e32 v3, 0xdb800000 3291*5a81a559SDavid Green; GFX7-NEXT: v_bfrev_b32_e32 v4, 7 3292*5a81a559SDavid Green; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 3293*5a81a559SDavid Green; GFX7-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 3294*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 3295*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 3296*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 3297*5a81a559SDavid Green; GFX7-NEXT: s_setpc_b64 s[30:31] 32980a140c42SVikash Gupta; 3299*5a81a559SDavid Green; GFX9-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56: 3300*5a81a559SDavid Green; GFX9: ; %bb.0: 3301*5a81a559SDavid Green; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3302*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v3, 0xffffdb80 3303*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v4, 0xffffe000 3304*5a81a559SDavid Green; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 3305*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 3306*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3307*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0 3308*5a81a559SDavid Green; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 3309*5a81a559SDavid Green; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 3310*5a81a559SDavid Green; GFX9-NEXT: s_movk_i32 s4, 0x7fff 3311*5a81a559SDavid Green; GFX9-NEXT: v_add3_u32 v1, v1, v0, s4 3312*5a81a559SDavid Green; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 3313*5a81a559SDavid Green; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 3314*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc 3315*5a81a559SDavid Green; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3316*5a81a559SDavid Green; GFX9-NEXT: s_setpc_b64 s[30:31] 33170a140c42SVikash Gupta; 3318*5a81a559SDavid Green; GFX10-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56: 3319*5a81a559SDavid Green; GFX10: ; %bb.0: 3320*5a81a559SDavid Green; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3321*5a81a559SDavid Green; GFX10-NEXT: v_mov_b32_e32 v3, 0xffffe000 3322*5a81a559SDavid Green; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 3323*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v0 3324*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v1, 0xffffdb80, v3, vcc_lo 3325*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3326*5a81a559SDavid Green; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 3327*5a81a559SDavid Green; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 1 3328*5a81a559SDavid Green; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v0 3329*5a81a559SDavid Green; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 3330*5a81a559SDavid Green; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 3331*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 3332*5a81a559SDavid Green; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3333*5a81a559SDavid Green; GFX10-NEXT: s_setpc_b64 s[30:31] 33340a140c42SVikash Gupta; 3335*5a81a559SDavid Green; GFX11-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56: 3336*5a81a559SDavid Green; GFX11: ; %bb.0: 3337*5a81a559SDavid Green; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3338*5a81a559SDavid Green; GFX11-NEXT: v_dual_mov_b32 v3, 0xffffe000 :: v_dual_lshlrev_b32 v0, 16, v0 3339*5a81a559SDavid Green; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 3340*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 3341*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v1, 0xffffdb80, v3, vcc_lo 3342*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3343*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 3344*5a81a559SDavid Green; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 3345*5a81a559SDavid Green; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1 3346*5a81a559SDavid Green; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0 3347*5a81a559SDavid Green; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 3348*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) 3349*5a81a559SDavid Green; GFX11-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 3350*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 3351*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 3352*5a81a559SDavid Green; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3353*5a81a559SDavid Green; GFX11-NEXT: s_setpc_b64 s[30:31] 33540a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 33550a140c42SVikash Gupta %y = select i1 %bool, bfloat 0xRE000, bfloat 0xRDB80 33560a140c42SVikash Gupta %ldexp = fmul bfloat %x, %y 33570a140c42SVikash Gupta ret bfloat %ldexp 33580a140c42SVikash Gupta} 33590a140c42SVikash Gupta 33600a140c42SVikash Guptadefine bfloat @fmul_select_bf16_test11_sel_log2val_neg22_pos25(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) { 3361*5a81a559SDavid Green; GFX7-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25: 3362*5a81a559SDavid Green; GFX7: ; %bb.0: 3363*5a81a559SDavid Green; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3364*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v0 3365*5a81a559SDavid Green; GFX7-NEXT: v_bfrev_b32_e32 v3, 50 3366*5a81a559SDavid Green; GFX7-NEXT: v_mov_b32_e32 v4, 0x34800000 3367*5a81a559SDavid Green; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 3368*5a81a559SDavid Green; GFX7-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 3369*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 3370*5a81a559SDavid Green; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1 3371*5a81a559SDavid Green; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v0 3372*5a81a559SDavid Green; GFX7-NEXT: s_setpc_b64 s[30:31] 33730a140c42SVikash Gupta; 3374*5a81a559SDavid Green; GFX9-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25: 3375*5a81a559SDavid Green; GFX9: ; %bb.0: 3376*5a81a559SDavid Green; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3377*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v3, 0x4c00 3378*5a81a559SDavid Green; GFX9-NEXT: v_mov_b32_e32 v4, 0x3480 3379*5a81a559SDavid Green; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2 3380*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc 3381*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3382*5a81a559SDavid Green; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v0 3383*5a81a559SDavid Green; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1 3384*5a81a559SDavid Green; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 1 3385*5a81a559SDavid Green; GFX9-NEXT: s_movk_i32 s4, 0x7fff 3386*5a81a559SDavid Green; GFX9-NEXT: v_add3_u32 v1, v1, v0, s4 3387*5a81a559SDavid Green; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v0 3388*5a81a559SDavid Green; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v0 3389*5a81a559SDavid Green; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc 3390*5a81a559SDavid Green; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3391*5a81a559SDavid Green; GFX9-NEXT: s_setpc_b64 s[30:31] 33920a140c42SVikash Gupta; 3393*5a81a559SDavid Green; GFX10-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25: 3394*5a81a559SDavid Green; GFX10: ; %bb.0: 3395*5a81a559SDavid Green; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3396*5a81a559SDavid Green; GFX10-NEXT: v_mov_b32_e32 v3, 0x3480 3397*5a81a559SDavid Green; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 3398*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v0 3399*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v1, 0x4c00, v3, vcc_lo 3400*5a81a559SDavid Green; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3401*5a81a559SDavid Green; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1 3402*5a81a559SDavid Green; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 1 3403*5a81a559SDavid Green; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v0 3404*5a81a559SDavid Green; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 3405*5a81a559SDavid Green; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 3406*5a81a559SDavid Green; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 3407*5a81a559SDavid Green; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3408*5a81a559SDavid Green; GFX10-NEXT: s_setpc_b64 s[30:31] 34090a140c42SVikash Gupta; 3410*5a81a559SDavid Green; GFX11-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25: 3411*5a81a559SDavid Green; GFX11: ; %bb.0: 3412*5a81a559SDavid Green; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 3413*5a81a559SDavid Green; GFX11-NEXT: v_dual_mov_b32 v3, 0x3480 :: v_dual_lshlrev_b32 v0, 16, v0 3414*5a81a559SDavid Green; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2 3415*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1) 3416*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v1, 0x4c00, v3, vcc_lo 3417*5a81a559SDavid Green; GFX11-NEXT: v_lshlrev_b32_e32 v1, 16, v1 3418*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) 3419*5a81a559SDavid Green; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1 3420*5a81a559SDavid Green; GFX11-NEXT: v_bfe_u32 v1, v0, 16, 1 3421*5a81a559SDavid Green; GFX11-NEXT: v_or_b32_e32 v2, 0x400000, v0 3422*5a81a559SDavid Green; GFX11-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v0 3423*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1) 3424*5a81a559SDavid Green; GFX11-NEXT: v_add3_u32 v1, v1, v0, 0x7fff 3425*5a81a559SDavid Green; GFX11-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo 3426*5a81a559SDavid Green; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 3427*5a81a559SDavid Green; GFX11-NEXT: v_lshrrev_b32_e32 v0, 16, v0 3428*5a81a559SDavid Green; GFX11-NEXT: s_setpc_b64 s[30:31] 34290a140c42SVikash Gupta %bool = icmp eq i32 %bool.arg1, %bool.arg2 34300a140c42SVikash Gupta %y = select i1 %bool, bfloat 0xR3480, bfloat 0xR4C00 34310a140c42SVikash Gupta %ldexp = fmul bfloat %x, %y 34320a140c42SVikash Gupta ret bfloat %ldexp 34330a140c42SVikash Gupta} 34340a140c42SVikash Gupta 3435