1; RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 < %s | FileCheck -check-prefix=ALL %s 2; RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s | FileCheck -check-prefixes=ALL,GFX90A %s 3 4; CallGraphAnalysis, which CodeGenSCC order depends on, does not look 5; through aliases. If GlobalOpt is never run, we do not see direct 6; calls, 7 8@alias = hidden alias void (), ptr @aliasee_default 9 10; ALL-LABEL: {{^}}kernel: 11; ALL: .amdhsa_next_free_vgpr max(totalnumvgprs(kernel.num_agpr, kernel.num_vgpr), 1, 0) 12; ALL-NEXT: .amdhsa_next_free_sgpr (max(kernel.numbered_sgpr+(extrasgprs(kernel.uses_vcc, kernel.uses_flat_scratch, 1)), 1, 0))-(extrasgprs(kernel.uses_vcc, kernel.uses_flat_scratch, 1)) 13; GFX90A-NEXT: .amdhsa_accum_offset ((((((alignto(max(1, kernel.num_vgpr), 4))/4)-1)&(~65536))&63)+1)*4 14 15; ALL: .set kernel.num_vgpr, max(41, .Laliasee_default.num_vgpr) 16; ALL-NEXT: .set kernel.num_agpr, max(0, .Laliasee_default.num_agpr) 17; ALL-NEXT: .set kernel.numbered_sgpr, max(33, .Laliasee_default.numbered_sgpr) 18define amdgpu_kernel void @kernel() #0 { 19bb: 20 call void @alias() #2 21 ret void 22} 23 24define internal void @aliasee_default() #1 { 25bb: 26 call void asm sideeffect "; clobber a26 ", "~{a26}"() 27 ret void 28} 29; ALL: .set .Laliasee_default.num_vgpr, 0 30; ALL-NEXT: .set .Laliasee_default.num_agpr, 27 31; ALL-NEXT: .set .Laliasee_default.numbered_sgpr, 32 32 33attributes #0 = { noinline norecurse nounwind optnone } 34attributes #1 = { noinline norecurse nounwind readnone willreturn } 35attributes #2 = { nounwind readnone willreturn } 36 37!llvm.module.flags = !{!0} 38!0 = !{i32 1, !"amdhsa_code_object_version", i32 500} 39