xref: /llvm-project/llvm/test/CodeGen/AMDGPU/add_sub_u64_pseudos.mir (revision 9b0e1c2ca25be58ea29b318d3515e6171f25f0ea)
1babbdad1SPierre van Houtryve# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2babbdad1SPierre van Houtryve# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=finalize-isel -o - %s | FileCheck -check-prefix=GFX11 %s
3babbdad1SPierre van Houtryve# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=finalize-isel -o - %s | FileCheck -check-prefix=GFX12 %s
4*9b0e1c2cSpaperchalice# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -passes=finalize-isel -o - %s | FileCheck -check-prefix=GFX11 %s
5*9b0e1c2cSpaperchalice# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -passes=finalize-isel -o - %s | FileCheck -check-prefix=GFX12 %s
6babbdad1SPierre van Houtryve
7babbdad1SPierre van Houtryve---
8babbdad1SPierre van Houtryvename: reg_ops
9babbdad1SPierre van HoutryvetracksRegLiveness: true
10babbdad1SPierre van Houtryvebody: |
11babbdad1SPierre van Houtryve  bb.0:
12babbdad1SPierre van Houtryve    ; GFX11-LABEL: name: reg_ops
13babbdad1SPierre van Houtryve    ; GFX11: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
14babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[DEF1:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
15babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY [[DEF]].sub0
16babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[DEF]].sub1
17babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[DEF1]].sub0
18babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[DEF1]].sub1
19babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], [[COPY2]], implicit-def $scc
20babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY1]], [[COPY3]], implicit-def $scc, implicit $scc
21babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
22babbdad1SPierre van Houtryve    ;
23babbdad1SPierre van Houtryve    ; GFX12-LABEL: name: reg_ops
24babbdad1SPierre van Houtryve    ; GFX12: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
25babbdad1SPierre van Houtryve    ; GFX12-NEXT: [[DEF1:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
26babbdad1SPierre van Houtryve    ; GFX12-NEXT: [[S_ADD_U64_:%[0-9]+]]:sreg_64 = S_ADD_U64 [[DEF]], [[DEF1]]
27babbdad1SPierre van Houtryve    %0:sreg_64 = IMPLICIT_DEF
28babbdad1SPierre van Houtryve    %1:sreg_64 = IMPLICIT_DEF
29babbdad1SPierre van Houtryve    %2:sreg_64 = S_ADD_U64_PSEUDO %0, %1, implicit-def $scc
30babbdad1SPierre van Houtryve...
31babbdad1SPierre van Houtryve
32babbdad1SPierre van Houtryve---
33babbdad1SPierre van Houtryvename: lhs_imm
34babbdad1SPierre van HoutryvetracksRegLiveness: true
35babbdad1SPierre van Houtryvebody: |
36babbdad1SPierre van Houtryve  bb.0:
37babbdad1SPierre van Houtryve    ; GFX11-LABEL: name: lhs_imm
38babbdad1SPierre van Houtryve    ; GFX11: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
39babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY [[DEF]].sub0
40babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[DEF]].sub1
41babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 6565, [[COPY]], implicit-def $scc
42babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 0, [[COPY1]], implicit-def $scc, implicit $scc
43babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
44babbdad1SPierre van Houtryve    ;
45babbdad1SPierre van Houtryve    ; GFX12-LABEL: name: lhs_imm
46babbdad1SPierre van Houtryve    ; GFX12: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
47babbdad1SPierre van Houtryve    ; GFX12-NEXT: [[S_ADD_U64_:%[0-9]+]]:sreg_64 = S_ADD_U64 6565, [[DEF]]
48babbdad1SPierre van Houtryve    %0:sreg_64 = IMPLICIT_DEF
49babbdad1SPierre van Houtryve    %1:sreg_64 = S_ADD_U64_PSEUDO 6565, %0, implicit-def $scc
50babbdad1SPierre van Houtryve...
51babbdad1SPierre van Houtryve
52babbdad1SPierre van Houtryve---
53babbdad1SPierre van Houtryvename: rhs_imm
54babbdad1SPierre van HoutryvetracksRegLiveness: true
55babbdad1SPierre van Houtryvebody: |
56babbdad1SPierre van Houtryve  bb.0:
57babbdad1SPierre van Houtryve    ; GFX11-LABEL: name: rhs_imm
58babbdad1SPierre van Houtryve    ; GFX11: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
59babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY [[DEF]].sub0
60babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[DEF]].sub1
61babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[S_ADD_U32_:%[0-9]+]]:sreg_32 = S_ADD_U32 [[COPY]], 6565, implicit-def $scc
62babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[S_ADDC_U32_:%[0-9]+]]:sreg_32 = S_ADDC_U32 [[COPY1]], 0, implicit-def $scc, implicit $scc
63babbdad1SPierre van Houtryve    ; GFX11-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[S_ADD_U32_]], %subreg.sub0, [[S_ADDC_U32_]], %subreg.sub1
64babbdad1SPierre van Houtryve    ;
65babbdad1SPierre van Houtryve    ; GFX12-LABEL: name: rhs_imm
66babbdad1SPierre van Houtryve    ; GFX12: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
67babbdad1SPierre van Houtryve    ; GFX12-NEXT: [[S_ADD_U64_:%[0-9]+]]:sreg_64 = S_ADD_U64 [[DEF]], 6565
68babbdad1SPierre van Houtryve    %0:sreg_64 = IMPLICIT_DEF
69babbdad1SPierre van Houtryve    %1:sreg_64 = S_ADD_U64_PSEUDO %0, 6565, implicit-def $scc
70babbdad1SPierre van Houtryve...
71