1faa2c678SKrzysztof Drewniak; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2faa2c678SKrzysztof Drewniak; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -stop-after=instruction-select -verify-machineinstrs -o - %s | FileCheck %s 3faa2c678SKrzysztof Drewniak; FIXME: Test with SI when argument lowering not broken for f16 4faa2c678SKrzysztof Drewniak 5faa2c678SKrzysztof Drewniak; Natural mapping 6faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 7faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset 8faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 9faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 10faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 11faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 12faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 13faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 14faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 15faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 16faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 17faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 18ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 19faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 20faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 21faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 22faa2c678SKrzysztof Drewniak ret float %val 23faa2c678SKrzysztof Drewniak} 24faa2c678SKrzysztof Drewniak 25faa2c678SKrzysztof Drewniak; Copies for VGPR arguments 26faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__sgpr_voffset__sgpr_soffset(ptr addrspace(8) inreg %rsrc, i32 inreg %voffset, i32 inreg %soffset) { 27faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__sgpr_voffset__sgpr_soffset 28faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 29faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7 30faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 31faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 32faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 33faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 34faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 35faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr6 36faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr7 37faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 38faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[COPY4]] 39ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY6]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 40faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 41faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 42faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 43faa2c678SKrzysztof Drewniak ret float %val 44faa2c678SKrzysztof Drewniak} 45faa2c678SKrzysztof Drewniak 46faa2c678SKrzysztof Drewniak; Waterfall for rsrc 47faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__vgpr_rsrc__vgpr_voffset__sgpr_soffset(ptr addrspace(8) %rsrc, i32 %voffset, i32 inreg %soffset) { 48faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__vgpr_rsrc__vgpr_voffset__sgpr_soffset 49faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 50faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.2(0x80000000) 51faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4 52faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 53faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 54faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 55faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 56faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 57faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr4 58faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr2 59faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 60faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 $exec 61faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 62faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.2: 63faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.3(0x80000000) 64faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 65faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY]], implicit $exec 66faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY1]], implicit $exec 67faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY2]], implicit $exec 68faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY3]], implicit $exec 69faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[V_READFIRSTLANE_B32_]], %subreg.sub0, [[V_READFIRSTLANE_B32_1]], %subreg.sub1, [[V_READFIRSTLANE_B32_2]], %subreg.sub2, [[V_READFIRSTLANE_B32_3]], %subreg.sub3 70faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]].sub0_sub1 71faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]].sub2_sub3 72faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY8:%[0-9]+]]:sreg_64 = COPY [[REG_SEQUENCE1]].sub0_sub1 73faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY9:%[0-9]+]]:sreg_64 = COPY [[REG_SEQUENCE1]].sub2_sub3 74faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY8]], [[COPY6]], implicit $exec 75faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_CMP_EQ_U64_e64_1:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY9]], [[COPY7]], implicit $exec 76c3cfbbc4Spvanhout ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_B64 [[V_CMP_EQ_U64_e64_]], [[V_CMP_EQ_U64_e64_1]], implicit-def dead $scc 77faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_AND_SAVEEXEC_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_SAVEEXEC_B64 killed [[S_AND_B64_]], implicit-def $exec, implicit-def $scc, implicit $exec 78faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 79faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.3: 80faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) 81faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 82ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE1]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 83faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $exec = S_XOR_B64_term $exec, [[S_AND_SAVEEXEC_B64_]], implicit-def $scc 84faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_WATERFALL_LOOP %bb.2, implicit $exec 85faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 86faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.4: 87faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.5(0x80000000) 88faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 89faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $exec = S_MOV_B64_term [[S_MOV_B64_]] 90faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 91faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.5: 92faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 93faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 94faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 95faa2c678SKrzysztof Drewniak ret float %val 96faa2c678SKrzysztof Drewniak} 97faa2c678SKrzysztof Drewniak 98faa2c678SKrzysztof Drewniak; Waterfall for rsrc and soffset 99faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__vgpr_rsrc__vgpr_voffset__vgpr_soffset(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset) { 100faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__vgpr_rsrc__vgpr_voffset__vgpr_soffset 101faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 102faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.2(0x80000000) 103faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5 104faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 105faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 106faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 107faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 108faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 109faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr4 110faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr5 111faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 112faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 $exec 113faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 114faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.2: 115faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.3(0x80000000) 116faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 117faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY]], implicit $exec 118faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY1]], implicit $exec 119faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY2]], implicit $exec 120faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY3]], implicit $exec 121faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[V_READFIRSTLANE_B32_]], %subreg.sub0, [[V_READFIRSTLANE_B32_1]], %subreg.sub1, [[V_READFIRSTLANE_B32_2]], %subreg.sub2, [[V_READFIRSTLANE_B32_3]], %subreg.sub3 122faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]].sub0_sub1 123faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]].sub2_sub3 124faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY8:%[0-9]+]]:sreg_64 = COPY [[REG_SEQUENCE1]].sub0_sub1 125faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY9:%[0-9]+]]:sreg_64 = COPY [[REG_SEQUENCE1]].sub2_sub3 126faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY8]], [[COPY6]], implicit $exec 127faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_CMP_EQ_U64_e64_1:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY9]], [[COPY7]], implicit $exec 128c3cfbbc4Spvanhout ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_B64 [[V_CMP_EQ_U64_e64_]], [[V_CMP_EQ_U64_e64_1]], implicit-def dead $scc 129faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_4:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY5]], implicit $exec 130faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[V_READFIRSTLANE_B32_4]], [[COPY5]], implicit $exec 131c3cfbbc4Spvanhout ; CHECK-NEXT: [[S_AND_B64_1:%[0-9]+]]:sreg_64_xexec = S_AND_B64 [[S_AND_B64_]], [[V_CMP_EQ_U32_e64_]], implicit-def dead $scc 132faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_AND_SAVEEXEC_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_SAVEEXEC_B64 killed [[S_AND_B64_1]], implicit-def $exec, implicit-def $scc, implicit $exec 133faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 134faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.3: 135faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) 136faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 137ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE1]], [[V_READFIRSTLANE_B32_4]], 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 138faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $exec = S_XOR_B64_term $exec, [[S_AND_SAVEEXEC_B64_]], implicit-def $scc 139faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_WATERFALL_LOOP %bb.2, implicit $exec 140faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 141faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.4: 142faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.5(0x80000000) 143faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 144faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $exec = S_MOV_B64_term [[S_MOV_B64_]] 145faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 146faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.5: 147faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 148faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 149faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 150faa2c678SKrzysztof Drewniak ret float %val 151faa2c678SKrzysztof Drewniak} 152faa2c678SKrzysztof Drewniak 153faa2c678SKrzysztof Drewniak; Natural mapping + glc 154faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_glc(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 155faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_glc 156faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 157faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 158faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 159faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 160faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 161faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 162faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 163faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 164faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 165faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 166ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 1, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 167faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 168faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 169faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 1) 170faa2c678SKrzysztof Drewniak ret float %val 171faa2c678SKrzysztof Drewniak} 172faa2c678SKrzysztof Drewniak 173faa2c678SKrzysztof Drewniak; Natural mapping + slc 174faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_slc(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 175faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_slc 176faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 177faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 178faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 179faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 180faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 181faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 182faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 183faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 184faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 185faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 186ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 2, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 187faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 188faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 189faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 2) 190faa2c678SKrzysztof Drewniak ret float %val 191faa2c678SKrzysztof Drewniak} 192faa2c678SKrzysztof Drewniak 193faa2c678SKrzysztof Drewniak; Natural mapping + dlc 194faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_dlc(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 195faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_dlc 196faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 197faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 198faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 199faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 200faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 201faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 202faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 203faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 204faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 205faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 206ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 4, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 207faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 208faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 209faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 4) 210faa2c678SKrzysztof Drewniak ret float %val 211faa2c678SKrzysztof Drewniak} 212faa2c678SKrzysztof Drewniak 213faa2c678SKrzysztof Drewniak; Natural mapping + slc + dlc 214faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_slc_dlc(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 215faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_slc_dlc 216faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 217faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 218faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 219faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 220faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 221faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 222faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 223faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 224faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 225faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 226ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 6, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 227faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 228faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 229faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 6) 230faa2c678SKrzysztof Drewniak ret float %val 231faa2c678SKrzysztof Drewniak} 232faa2c678SKrzysztof Drewniak 233faa2c678SKrzysztof Drewniak; Natural mapping + glc + dlc 234faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_glc_dlc(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 235faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_glc_dlc 236faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 237faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 238faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 239faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 240faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 241faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 242faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 243faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 244faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 245faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 246ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 5, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 247faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 248faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 249faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 5) 250faa2c678SKrzysztof Drewniak ret float %val 251faa2c678SKrzysztof Drewniak} 252faa2c678SKrzysztof Drewniak 253faa2c678SKrzysztof Drewniak; Natural mapping + glc + slc + dlc 254faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_glc_slc_dlc(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 255faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_glc_slc_dlc 256faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 257faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 258faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 259faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 260faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 261faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 262faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 263faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 264faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 265faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 266ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 7, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 267faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 268faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 269faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 7) 270faa2c678SKrzysztof Drewniak ret float %val 271faa2c678SKrzysztof Drewniak} 272faa2c678SKrzysztof Drewniak 273*88871784SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_volatile(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 274*88871784SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_volatile 275*88871784SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 276*88871784SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 277*88871784SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 278*88871784SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 279*88871784SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 280*88871784SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 281*88871784SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 282*88871784SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 283*88871784SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 284*88871784SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 285*88871784SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (volatile dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 286*88871784SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 287*88871784SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 288*88871784SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 -2147483648) 289*88871784SKrzysztof Drewniak ret float %val 290*88871784SKrzysztof Drewniak} 291*88871784SKrzysztof Drewniak 292faa2c678SKrzysztof Drewniak; Natural mapping 293faa2c678SKrzysztof Drewniakdefine amdgpu_ps <2 x float> @raw_ptr_buffer_load_v2f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 294faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_v2f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset 295faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 296faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 297faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 298faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 299faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 300faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 301faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 302faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 303faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 304faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 305ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORDX2_OFFEN:%[0-9]+]]:vreg_64 = BUFFER_LOAD_DWORDX2_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (<2 x s32>) from %ir.rsrc, align 1, addrspace 8) 306faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[BUFFER_LOAD_DWORDX2_OFFEN]].sub0 307faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[BUFFER_LOAD_DWORDX2_OFFEN]].sub1 308faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[COPY6]] 309faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr1 = COPY [[COPY7]] 310faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1 311faa2c678SKrzysztof Drewniak %val = call <2 x float> @llvm.amdgcn.raw.ptr.buffer.load.v2f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 312faa2c678SKrzysztof Drewniak ret <2 x float> %val 313faa2c678SKrzysztof Drewniak} 314faa2c678SKrzysztof Drewniak 315faa2c678SKrzysztof Drewniakdefine amdgpu_ps <3 x float> @raw_ptr_buffer_load_v3f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 316faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_v3f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset 317faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 318faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 319faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 320faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 321faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 322faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 323faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 324faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 325faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 326faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 327ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORDX3_OFFEN:%[0-9]+]]:vreg_96 = BUFFER_LOAD_DWORDX3_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (<3 x s32>) from %ir.rsrc, align 1, addrspace 8) 328faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[BUFFER_LOAD_DWORDX3_OFFEN]].sub0 329faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[BUFFER_LOAD_DWORDX3_OFFEN]].sub1 330faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[BUFFER_LOAD_DWORDX3_OFFEN]].sub2 331faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[COPY6]] 332faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr1 = COPY [[COPY7]] 333faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr2 = COPY [[COPY8]] 334faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2 335faa2c678SKrzysztof Drewniak %val = call <3 x float> @llvm.amdgcn.raw.ptr.buffer.load.v3f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 336faa2c678SKrzysztof Drewniak ret <3 x float> %val 337faa2c678SKrzysztof Drewniak} 338faa2c678SKrzysztof Drewniak 339faa2c678SKrzysztof Drewniakdefine amdgpu_ps <4 x float> @raw_ptr_buffer_load_v4f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 340faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_v4f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset 341faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 342faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 343faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 344faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 345faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 346faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 347faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 348faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 349faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 350faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 351ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORDX4_OFFEN:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s32>) from %ir.rsrc, align 1, addrspace 8) 352faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[BUFFER_LOAD_DWORDX4_OFFEN]].sub0 353faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[BUFFER_LOAD_DWORDX4_OFFEN]].sub1 354faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[BUFFER_LOAD_DWORDX4_OFFEN]].sub2 355faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[BUFFER_LOAD_DWORDX4_OFFEN]].sub3 356faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[COPY6]] 357faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr1 = COPY [[COPY7]] 358faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr2 = COPY [[COPY8]] 359faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr3 = COPY [[COPY9]] 360faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3 361faa2c678SKrzysztof Drewniak %val = call <4 x float> @llvm.amdgcn.raw.ptr.buffer.load.v4f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 362faa2c678SKrzysztof Drewniak ret <4 x float> %val 363faa2c678SKrzysztof Drewniak} 364faa2c678SKrzysztof Drewniak 365faa2c678SKrzysztof Drewniakdefine amdgpu_ps half @raw_ptr_buffer_load_f16__sgpr_rsrc__vgpr_voffset__sgpr_soffset(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 366faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f16__sgpr_rsrc__vgpr_voffset__sgpr_soffset 367faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 368faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 369faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 370faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 371faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 372faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 373faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 374faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 375faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 376faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 377ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_USHORT_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_USHORT_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (s16) from %ir.rsrc, align 1, addrspace 8) 378faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_USHORT_OFFEN]] 379faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 380faa2c678SKrzysztof Drewniak %val = call half @llvm.amdgcn.raw.ptr.buffer.load.f16(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 381faa2c678SKrzysztof Drewniak ret half %val 382faa2c678SKrzysztof Drewniak} 383faa2c678SKrzysztof Drewniak 384faa2c678SKrzysztof Drewniakdefine amdgpu_ps <2 x half> @raw_ptr_buffer_load_v2f16__sgpr_rsrc__vgpr_voffset__sgpr_soffset(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 385faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_v2f16__sgpr_rsrc__vgpr_voffset__sgpr_soffset 386faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 387faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 388faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 389faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 390faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 391faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 392faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 393faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 394faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 395faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 396ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (<2 x s16>) from %ir.rsrc, align 1, addrspace 8) 397faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 398faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 399faa2c678SKrzysztof Drewniak %val = call <2 x half> @llvm.amdgcn.raw.ptr.buffer.load.v2f16(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 400faa2c678SKrzysztof Drewniak ret <2 x half> %val 401faa2c678SKrzysztof Drewniak} 402faa2c678SKrzysztof Drewniak 403faa2c678SKrzysztof Drewniak; FIXME: Crashes 404faa2c678SKrzysztof Drewniak; define amdgpu_ps <3 x half> @raw_ptr_buffer_load_v3f16__sgpr_rsrc__vgpr_voffset__sgpr_soffset(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 405faa2c678SKrzysztof Drewniak; %val = call <3 x half> @llvm.amdgcn.raw.ptr.buffer.load.v3f16(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 406faa2c678SKrzysztof Drewniak; ret <3 x half> %val 407faa2c678SKrzysztof Drewniak; } 408faa2c678SKrzysztof Drewniak 409faa2c678SKrzysztof Drewniakdefine amdgpu_ps <4 x half> @raw_ptr_buffer_load_v4f16__sgpr_rsrc__vgpr_voffset__sgpr_soffset(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 410faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_v4f16__sgpr_rsrc__vgpr_voffset__sgpr_soffset 411faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 412faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 413faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 414faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 415faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 416faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 417faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 418faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 419faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 420faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 421ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORDX2_OFFEN:%[0-9]+]]:vreg_64 = BUFFER_LOAD_DWORDX2_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (<4 x s16>) from %ir.rsrc, align 1, addrspace 8) 422faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[BUFFER_LOAD_DWORDX2_OFFEN]].sub0 423faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[BUFFER_LOAD_DWORDX2_OFFEN]].sub1 424faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[COPY6]] 425faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr1 = COPY [[COPY7]] 426faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0, implicit $vgpr1 427faa2c678SKrzysztof Drewniak %val = call <4 x half> @llvm.amdgcn.raw.ptr.buffer.load.v4f16(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 428faa2c678SKrzysztof Drewniak ret <4 x half> %val 429faa2c678SKrzysztof Drewniak} 430faa2c678SKrzysztof Drewniak 431faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_i8__sgpr_rsrc__vgpr_voffset__sgpr_soffset_zext(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 432faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_i8__sgpr_rsrc__vgpr_voffset__sgpr_soffset_zext 433faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 434faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 435faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 436faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 437faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 438faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 439faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 440faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 441faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 442faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 443ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_UBYTE_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_UBYTE_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (s8) from %ir.rsrc, addrspace 8) 444faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_UBYTE_OFFEN]] 445faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 446faa2c678SKrzysztof Drewniak %val = call i8 @llvm.amdgcn.raw.ptr.buffer.load.i8(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 447faa2c678SKrzysztof Drewniak %zext = zext i8 %val to i32 448faa2c678SKrzysztof Drewniak %cast = bitcast i32 %zext to float 449faa2c678SKrzysztof Drewniak ret float %cast 450faa2c678SKrzysztof Drewniak} 451faa2c678SKrzysztof Drewniak 452faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_i8__sgpr_rsrc__vgpr_voffset__sgpr_soffset_sext(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 453faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_i8__sgpr_rsrc__vgpr_voffset__sgpr_soffset_sext 454faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 455faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 456faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 457faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 458faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 459faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 460faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 461faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 462faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 463faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 464ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_SBYTE_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_SBYTE_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (s8) from %ir.rsrc, addrspace 8) 465faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_SBYTE_OFFEN]] 466faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 467faa2c678SKrzysztof Drewniak %val = call i8 @llvm.amdgcn.raw.ptr.buffer.load.i8(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 468faa2c678SKrzysztof Drewniak %zext = sext i8 %val to i32 469faa2c678SKrzysztof Drewniak %cast = bitcast i32 %zext to float 470faa2c678SKrzysztof Drewniak ret float %cast 471faa2c678SKrzysztof Drewniak} 472faa2c678SKrzysztof Drewniak 473faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_i16__sgpr_rsrc__vgpr_voffset__sgpr_soffset_zext(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 474faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_i16__sgpr_rsrc__vgpr_voffset__sgpr_soffset_zext 475faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 476faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 477faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 478faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 479faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 480faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 481faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 482faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 483faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 484faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 485ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_USHORT_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_USHORT_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (s16) from %ir.rsrc, align 1, addrspace 8) 486faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_USHORT_OFFEN]] 487faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 488faa2c678SKrzysztof Drewniak %val = call i16 @llvm.amdgcn.raw.ptr.buffer.load.i16(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 489faa2c678SKrzysztof Drewniak %zext = zext i16 %val to i32 490faa2c678SKrzysztof Drewniak %cast = bitcast i32 %zext to float 491faa2c678SKrzysztof Drewniak ret float %cast 492faa2c678SKrzysztof Drewniak} 493faa2c678SKrzysztof Drewniak 494faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_i16__sgpr_rsrc__vgpr_voffset__sgpr_soffset_sext(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset) { 495faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_i16__sgpr_rsrc__vgpr_voffset__sgpr_soffset_sext 496faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 497faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 498faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 499faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 500faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 501faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 502faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 503faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 504faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 505faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 506ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_SSHORT_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_SSHORT_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (s16) from %ir.rsrc, align 1, addrspace 8) 507faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_SSHORT_OFFEN]] 508faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 509faa2c678SKrzysztof Drewniak %val = call i16 @llvm.amdgcn.raw.ptr.buffer.load.i16(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 510faa2c678SKrzysztof Drewniak %sext = sext i16 %val to i32 511faa2c678SKrzysztof Drewniak %cast = bitcast i32 %sext to float 512faa2c678SKrzysztof Drewniak ret float %cast 513faa2c678SKrzysztof Drewniak} 514faa2c678SKrzysztof Drewniak 515faa2c678SKrzysztof Drewniak; Waterfall for rsrc 516faa2c678SKrzysztof Drewniakdefine amdgpu_ps half @raw_ptr_buffer_load_f16__vgpr_rsrc__vgpr_voffset__sgpr_soffset(ptr addrspace(8) %rsrc, i32 %voffset, i32 inreg %soffset) { 517faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f16__vgpr_rsrc__vgpr_voffset__sgpr_soffset 518faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 519faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.2(0x80000000) 520faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4 521faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 522faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 523faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 524faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 525faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 526faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr4 527faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr2 528faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 529faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 $exec 530faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 531faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.2: 532faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.3(0x80000000) 533faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 534faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY]], implicit $exec 535faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY1]], implicit $exec 536faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY2]], implicit $exec 537faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY3]], implicit $exec 538faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[V_READFIRSTLANE_B32_]], %subreg.sub0, [[V_READFIRSTLANE_B32_1]], %subreg.sub1, [[V_READFIRSTLANE_B32_2]], %subreg.sub2, [[V_READFIRSTLANE_B32_3]], %subreg.sub3 539faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]].sub0_sub1 540faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]].sub2_sub3 541faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY8:%[0-9]+]]:sreg_64 = COPY [[REG_SEQUENCE1]].sub0_sub1 542faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY9:%[0-9]+]]:sreg_64 = COPY [[REG_SEQUENCE1]].sub2_sub3 543faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY8]], [[COPY6]], implicit $exec 544faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_CMP_EQ_U64_e64_1:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY9]], [[COPY7]], implicit $exec 545c3cfbbc4Spvanhout ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_B64 [[V_CMP_EQ_U64_e64_]], [[V_CMP_EQ_U64_e64_1]], implicit-def dead $scc 546faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_AND_SAVEEXEC_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_SAVEEXEC_B64 killed [[S_AND_B64_]], implicit-def $exec, implicit-def $scc, implicit $exec 547faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 548faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.3: 549faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) 550faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 551ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_USHORT_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_USHORT_OFFEN [[COPY4]], [[REG_SEQUENCE1]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (s16) from %ir.rsrc, align 1, addrspace 8) 552faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $exec = S_XOR_B64_term $exec, [[S_AND_SAVEEXEC_B64_]], implicit-def $scc 553faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_WATERFALL_LOOP %bb.2, implicit $exec 554faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 555faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.4: 556faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.5(0x80000000) 557faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 558faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $exec = S_MOV_B64_term [[S_MOV_B64_]] 559faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 560faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.5: 561faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_USHORT_OFFEN]] 562faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 563faa2c678SKrzysztof Drewniak %val = call half @llvm.amdgcn.raw.ptr.buffer.load.f16(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 564faa2c678SKrzysztof Drewniak ret half %val 565faa2c678SKrzysztof Drewniak} 566faa2c678SKrzysztof Drewniak 567faa2c678SKrzysztof Drewniak; Waterfall for rsrc 568faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_i8__vgpr_rsrc__vgpr_voffset__sgpr_soffset(ptr addrspace(8) %rsrc, i32 %voffset, i32 inreg %soffset) { 569faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_i8__vgpr_rsrc__vgpr_voffset__sgpr_soffset 570faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 571faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.2(0x80000000) 572faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4 573faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 574faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 575faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 576faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 577faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 578faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr4 579faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr2 580faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 581faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 $exec 582faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 583faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.2: 584faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.3(0x80000000) 585faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 586faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY]], implicit $exec 587faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY1]], implicit $exec 588faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY2]], implicit $exec 589faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY3]], implicit $exec 590faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[V_READFIRSTLANE_B32_]], %subreg.sub0, [[V_READFIRSTLANE_B32_1]], %subreg.sub1, [[V_READFIRSTLANE_B32_2]], %subreg.sub2, [[V_READFIRSTLANE_B32_3]], %subreg.sub3 591faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]].sub0_sub1 592faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]].sub2_sub3 593faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY8:%[0-9]+]]:sreg_64 = COPY [[REG_SEQUENCE1]].sub0_sub1 594faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY9:%[0-9]+]]:sreg_64 = COPY [[REG_SEQUENCE1]].sub2_sub3 595faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY8]], [[COPY6]], implicit $exec 596faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_CMP_EQ_U64_e64_1:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY9]], [[COPY7]], implicit $exec 597c3cfbbc4Spvanhout ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_B64 [[V_CMP_EQ_U64_e64_]], [[V_CMP_EQ_U64_e64_1]], implicit-def dead $scc 598faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_AND_SAVEEXEC_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_SAVEEXEC_B64 killed [[S_AND_B64_]], implicit-def $exec, implicit-def $scc, implicit $exec 599faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 600faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.3: 601faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) 602faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 603ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_UBYTE_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_UBYTE_OFFEN [[COPY4]], [[REG_SEQUENCE1]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (s8) from %ir.rsrc, addrspace 8) 604faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $exec = S_XOR_B64_term $exec, [[S_AND_SAVEEXEC_B64_]], implicit-def $scc 605faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_WATERFALL_LOOP %bb.2, implicit $exec 606faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 607faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.4: 608faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.5(0x80000000) 609faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 610faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $exec = S_MOV_B64_term [[S_MOV_B64_]] 611faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 612faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.5: 613faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_UBYTE_OFFEN]] 614faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 615faa2c678SKrzysztof Drewniak %val = call i8 @llvm.amdgcn.raw.ptr.buffer.load.i8(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 616faa2c678SKrzysztof Drewniak %zext = zext i8 %val to i32 617faa2c678SKrzysztof Drewniak %cast = bitcast i32 %zext to float 618faa2c678SKrzysztof Drewniak ret float %cast 619faa2c678SKrzysztof Drewniak} 620faa2c678SKrzysztof Drewniak 621faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vdpr_voffset__sgpr_soffset__voffset0(ptr addrspace(8) inreg %rsrc, i32 inreg %soffset) { 622faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vdpr_voffset__sgpr_soffset__voffset0 623faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 624faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6 625faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 626faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 627faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 628faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 629faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 630faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr6 631faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 632ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFSET:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFSET [[REG_SEQUENCE]], [[COPY4]], 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 633faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFSET]] 634faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 635faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 0, i32 %soffset, i32 0) 636faa2c678SKrzysztof Drewniak ret float %val 637faa2c678SKrzysztof Drewniak} 638faa2c678SKrzysztof Drewniak 639faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset__voffset4095(ptr addrspace(8) inreg %rsrc, i32 inreg %soffset) { 640faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset__voffset4095 641faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 642faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6 643faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 644faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 645faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 646faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 647faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 648faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr6 649faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 650ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFSET:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFSET [[REG_SEQUENCE]], [[COPY4]], 4095, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 651faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFSET]] 652faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 653faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 4095, i32 %soffset, i32 0) 654faa2c678SKrzysztof Drewniak ret float %val 655faa2c678SKrzysztof Drewniak} 656faa2c678SKrzysztof Drewniak 657faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset__voffset4096(ptr addrspace(8) inreg %rsrc, i32 inreg %soffset) { 658faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset__voffset4096 659faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 660faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6 661faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 662faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 663faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 664faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 665faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 666faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY $sgpr6 667faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4096 668faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 669faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]] 670ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY5]], [[REG_SEQUENCE]], [[COPY4]], 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 671faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 672faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 673faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 4096, i32 %soffset, i32 0) 674faa2c678SKrzysztof Drewniak ret float %val 675faa2c678SKrzysztof Drewniak} 676faa2c678SKrzysztof Drewniak 677faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_voffset_add16(ptr addrspace(8) inreg %rsrc, i32 %voffset.base, i32 inreg %soffset) { 678faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_voffset_add16 679faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 680faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 681faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 682faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 683faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 684faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 685faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 686faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 687faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 688faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 689ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 16, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 690faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 691faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 692faa2c678SKrzysztof Drewniak %voffset = add i32 %voffset.base, 16 693faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 694faa2c678SKrzysztof Drewniak ret float %val 695faa2c678SKrzysztof Drewniak} 696faa2c678SKrzysztof Drewniak 697faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset__voffset_add4095(ptr addrspace(8) inreg %rsrc, i32 %voffset.base, i32 inreg %soffset) { 698faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset__voffset_add4095 699faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 700faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 701faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 702faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 703faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 704faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 705faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 706faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 707faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 708faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 709ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[COPY5]], 4095, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 710faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 711faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 712faa2c678SKrzysztof Drewniak %voffset = add i32 %voffset.base, 4095 713faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 714faa2c678SKrzysztof Drewniak ret float %val 715faa2c678SKrzysztof Drewniak} 716faa2c678SKrzysztof Drewniak 717faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset__voffset_add4096(ptr addrspace(8) inreg %rsrc, i32 %voffset.base, i32 inreg %soffset) { 718faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset__voffset_add4096 719faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 720faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 721faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 722faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 723faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 724faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 725faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 726faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 727faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 728faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4096 729faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]] 730faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_CO_U32_e64 [[COPY4]], [[COPY6]], 0, implicit $exec 731faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 732ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[V_ADD_CO_U32_e64_]], [[REG_SEQUENCE]], [[COPY5]], 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 733faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 734faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 735faa2c678SKrzysztof Drewniak %voffset = add i32 %voffset.base, 4096 736faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 737faa2c678SKrzysztof Drewniak ret float %val 738faa2c678SKrzysztof Drewniak} 739faa2c678SKrzysztof Drewniak 740faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_soffset4095(ptr addrspace(8) inreg %rsrc, i32 %voffset) { 741faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_soffset4095 742faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 743faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $vgpr0 744faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 745faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 746faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 747faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 748faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 749faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 750faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4095 751faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 752ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[S_MOV_B32_]], 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 753faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 754faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 755faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 4095, i32 0) 756faa2c678SKrzysztof Drewniak ret float %val 757faa2c678SKrzysztof Drewniak} 758faa2c678SKrzysztof Drewniak 759faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_soffset4096(ptr addrspace(8) inreg %rsrc, i32 %voffset) { 760faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_soffset4096 761faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 762faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $vgpr0 763faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 764faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 765faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 766faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 767faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 768faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 769faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4096 770faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 771ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[S_MOV_B32_]], 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 772faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 773faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 774faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 4096, i32 0) 775faa2c678SKrzysztof Drewniak ret float %val 776faa2c678SKrzysztof Drewniak} 777faa2c678SKrzysztof Drewniak 778faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_soffset_add16(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset.base) { 779faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_soffset_add16 780faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 781faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 782faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 783faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 784faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 785faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 786faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 787faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 788faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 789faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 16 790c3cfbbc4Spvanhout ; CHECK-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY5]], [[S_MOV_B32_]], implicit-def dead $scc 791faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 792ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[S_ADD_I32_]], 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 793faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 794faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 795faa2c678SKrzysztof Drewniak %soffset = add i32 %soffset.base, 16 796faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 797faa2c678SKrzysztof Drewniak ret float %val 798faa2c678SKrzysztof Drewniak} 799faa2c678SKrzysztof Drewniak 800faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_soffset_add4095(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset.base) { 801faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_soffset_add4095 802faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 803faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 804faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 805faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 806faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 807faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 808faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 809faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 810faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 811faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4095 812c3cfbbc4Spvanhout ; CHECK-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY5]], [[S_MOV_B32_]], implicit-def dead $scc 813faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 814ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[S_ADD_I32_]], 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 815faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 816faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 817faa2c678SKrzysztof Drewniak %soffset = add i32 %soffset.base, 4095 818faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 819faa2c678SKrzysztof Drewniak ret float %val 820faa2c678SKrzysztof Drewniak} 821faa2c678SKrzysztof Drewniak 822faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_soffset_add4096(ptr addrspace(8) inreg %rsrc, i32 %voffset, i32 inreg %soffset.base) { 823faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_soffset_add4096 824faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 825faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $vgpr0 826faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 827faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr2 828faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr3 829faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr4 830faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr5 831faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr0 832faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr6 833faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4096 834c3cfbbc4Spvanhout ; CHECK-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY5]], [[S_MOV_B32_]], implicit-def dead $scc 835faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 836ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE]], [[S_ADD_I32_]], 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 837faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 838faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 839faa2c678SKrzysztof Drewniak %soffset = add i32 %soffset.base, 4096 840faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 841faa2c678SKrzysztof Drewniak ret float %val 842faa2c678SKrzysztof Drewniak} 843faa2c678SKrzysztof Drewniak 844faa2c678SKrzysztof Drewniak; An add of the offset is necessary, with a waterfall loop. Make sure the add is done outside of the waterfall loop. 845faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_soffset_add5000(ptr addrspace(8) %rsrc, i32 %voffset, i32 inreg %soffset.base) { 846faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_soffset_add5000 847faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 848faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.2(0x80000000) 849faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4 850faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 851faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 852faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 853faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 854faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 855faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr4 856faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr2 857faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 5000 858c3cfbbc4Spvanhout ; CHECK-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY5]], [[S_MOV_B32_]], implicit-def dead $scc 859faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 860faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 $exec 861faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 862faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.2: 863faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.3(0x80000000) 864faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 865faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY]], implicit $exec 866faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY1]], implicit $exec 867faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY2]], implicit $exec 868faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY3]], implicit $exec 869faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[V_READFIRSTLANE_B32_]], %subreg.sub0, [[V_READFIRSTLANE_B32_1]], %subreg.sub1, [[V_READFIRSTLANE_B32_2]], %subreg.sub2, [[V_READFIRSTLANE_B32_3]], %subreg.sub3 870faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]].sub0_sub1 871faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]].sub2_sub3 872faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY8:%[0-9]+]]:sreg_64 = COPY [[REG_SEQUENCE1]].sub0_sub1 873faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY9:%[0-9]+]]:sreg_64 = COPY [[REG_SEQUENCE1]].sub2_sub3 874faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY8]], [[COPY6]], implicit $exec 875faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_CMP_EQ_U64_e64_1:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY9]], [[COPY7]], implicit $exec 876c3cfbbc4Spvanhout ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_B64 [[V_CMP_EQ_U64_e64_]], [[V_CMP_EQ_U64_e64_1]], implicit-def dead $scc 877faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_AND_SAVEEXEC_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_SAVEEXEC_B64 killed [[S_AND_B64_]], implicit-def $exec, implicit-def $scc, implicit $exec 878faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 879faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.3: 880faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) 881faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 882ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[COPY4]], [[REG_SEQUENCE1]], [[S_ADD_I32_]], 0, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 883faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $exec = S_XOR_B64_term $exec, [[S_AND_SAVEEXEC_B64_]], implicit-def $scc 884faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_WATERFALL_LOOP %bb.2, implicit $exec 885faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 886faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.4: 887faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.5(0x80000000) 888faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 889faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $exec = S_MOV_B64_term [[S_MOV_B64_]] 890faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 891faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.5: 892faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 893faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 894faa2c678SKrzysztof Drewniak %soffset = add i32 %soffset.base, 5000 895faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 896faa2c678SKrzysztof Drewniak ret float %val 897faa2c678SKrzysztof Drewniak} 898faa2c678SKrzysztof Drewniak 899faa2c678SKrzysztof Drewniak; An add of the offset is necessary, with a waterfall loop. Make sure the add is done outside of the waterfall loop. 900faa2c678SKrzysztof Drewniakdefine amdgpu_ps float @raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_voffset_add5000(ptr addrspace(8) %rsrc, i32 %voffset.base, i32 inreg %soffset) { 901faa2c678SKrzysztof Drewniak ; CHECK-LABEL: name: raw_ptr_buffer_load_f32__sgpr_rsrc__vgpr_voffset__sgpr_soffset_voffset_add5000 902faa2c678SKrzysztof Drewniak ; CHECK: bb.1 (%ir-block.0): 903faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.2(0x80000000) 904faa2c678SKrzysztof Drewniak ; CHECK-NEXT: liveins: $sgpr2, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4 905faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 906faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 907faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 908faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 909faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3 910faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr4 911faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $sgpr2 912faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3 913faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 4096 914faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]] 915faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_CO_U32_e64 [[COPY4]], [[COPY6]], 0, implicit $exec 916faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_MOV_B64_:%[0-9]+]]:sreg_64_xexec = S_MOV_B64 $exec 917faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 918faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.2: 919faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.3(0x80000000) 920faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 921faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY]], implicit $exec 922faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_1:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY1]], implicit $exec 923faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_2:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY2]], implicit $exec 924faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_READFIRSTLANE_B32_3:%[0-9]+]]:sreg_32 = V_READFIRSTLANE_B32 [[COPY3]], implicit $exec 925faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[V_READFIRSTLANE_B32_]], %subreg.sub0, [[V_READFIRSTLANE_B32_1]], %subreg.sub1, [[V_READFIRSTLANE_B32_2]], %subreg.sub2, [[V_READFIRSTLANE_B32_3]], %subreg.sub3 926faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]].sub0_sub1 927faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY8:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]].sub2_sub3 928faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY9:%[0-9]+]]:sreg_64 = COPY [[REG_SEQUENCE1]].sub0_sub1 929faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[COPY10:%[0-9]+]]:sreg_64 = COPY [[REG_SEQUENCE1]].sub2_sub3 930faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_CMP_EQ_U64_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY9]], [[COPY7]], implicit $exec 931faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[V_CMP_EQ_U64_e64_1:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U64_e64 [[COPY10]], [[COPY8]], implicit $exec 932c3cfbbc4Spvanhout ; CHECK-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_B64 [[V_CMP_EQ_U64_e64_]], [[V_CMP_EQ_U64_e64_1]], implicit-def dead $scc 933faa2c678SKrzysztof Drewniak ; CHECK-NEXT: [[S_AND_SAVEEXEC_B64_:%[0-9]+]]:sreg_64_xexec = S_AND_SAVEEXEC_B64 killed [[S_AND_B64_]], implicit-def $exec, implicit-def $scc, implicit $exec 934faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 935faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.3: 936faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.2(0x40000000) 937faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 938ab379378SKrzysztof Drewniak ; CHECK-NEXT: [[BUFFER_LOAD_DWORD_OFFEN:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFEN [[V_ADD_CO_U32_e64_]], [[REG_SEQUENCE1]], [[COPY5]], 904, 0, 0, implicit $exec :: (dereferenceable load (s32) from %ir.rsrc, align 1, addrspace 8) 939faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $exec = S_XOR_B64_term $exec, [[S_AND_SAVEEXEC_B64_]], implicit-def $scc 940faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_WATERFALL_LOOP %bb.2, implicit $exec 941faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 942faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.4: 943faa2c678SKrzysztof Drewniak ; CHECK-NEXT: successors: %bb.5(0x80000000) 944faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 945faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $exec = S_MOV_B64_term [[S_MOV_B64_]] 946faa2c678SKrzysztof Drewniak ; CHECK-NEXT: {{ $}} 947faa2c678SKrzysztof Drewniak ; CHECK-NEXT: bb.5: 948faa2c678SKrzysztof Drewniak ; CHECK-NEXT: $vgpr0 = COPY [[BUFFER_LOAD_DWORD_OFFEN]] 949faa2c678SKrzysztof Drewniak ; CHECK-NEXT: SI_RETURN_TO_EPILOG implicit $vgpr0 950faa2c678SKrzysztof Drewniak %voffset = add i32 %voffset.base, 5000 951faa2c678SKrzysztof Drewniak %val = call float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8) %rsrc, i32 %voffset, i32 %soffset, i32 0) 952faa2c678SKrzysztof Drewniak ret float %val 953faa2c678SKrzysztof Drewniak} 954faa2c678SKrzysztof Drewniak 955faa2c678SKrzysztof Drewniakdeclare float @llvm.amdgcn.raw.ptr.buffer.load.f32(ptr addrspace(8), i32, i32, i32 immarg) 956faa2c678SKrzysztof Drewniakdeclare <2 x float> @llvm.amdgcn.raw.ptr.buffer.load.v2f32(ptr addrspace(8), i32, i32, i32 immarg) 957faa2c678SKrzysztof Drewniakdeclare <3 x float> @llvm.amdgcn.raw.ptr.buffer.load.v3f32(ptr addrspace(8), i32, i32, i32 immarg) 958faa2c678SKrzysztof Drewniakdeclare <4 x float> @llvm.amdgcn.raw.ptr.buffer.load.v4f32(ptr addrspace(8), i32, i32, i32 immarg) 959faa2c678SKrzysztof Drewniak 960faa2c678SKrzysztof Drewniakdeclare half @llvm.amdgcn.raw.ptr.buffer.load.f16(ptr addrspace(8), i32, i32, i32 immarg) 961faa2c678SKrzysztof Drewniakdeclare <2 x half> @llvm.amdgcn.raw.ptr.buffer.load.v2f16(ptr addrspace(8), i32, i32, i32 immarg) 962faa2c678SKrzysztof Drewniakdeclare <3 x half> @llvm.amdgcn.raw.ptr.buffer.load.v3f16(ptr addrspace(8), i32, i32, i32 immarg) 963faa2c678SKrzysztof Drewniakdeclare <4 x half> @llvm.amdgcn.raw.ptr.buffer.load.v4f16(ptr addrspace(8), i32, i32, i32 immarg) 964faa2c678SKrzysztof Drewniak 965faa2c678SKrzysztof Drewniakdeclare i8 @llvm.amdgcn.raw.ptr.buffer.load.i8(ptr addrspace(8), i32, i32, i32 immarg) 966faa2c678SKrzysztof Drewniakdeclare i16 @llvm.amdgcn.raw.ptr.buffer.load.i16(ptr addrspace(8), i32, i32, i32 immarg) 967