1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=aarch64 -verify-machineinstrs -global-isel=0 | FileCheck %s --check-prefixes=CHECK,CHECK-SD 3; RUN: llc < %s -mtriple=aarch64 -verify-machineinstrs -global-isel=1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI 4 5define ptr @scalar_gep_i32(ptr %b, i32 %off) { 6; CHECK-LABEL: scalar_gep_i32: 7; CHECK: // %bb.0: // %entry 8; CHECK-NEXT: add x0, x0, w1, sxtw 9; CHECK-NEXT: ret 10entry: 11 %g = getelementptr i8, ptr %b, i32 %off 12 ret ptr %g 13} 14 15define ptr @scalar_gep_i64(ptr %b, i64 %off) { 16; CHECK-LABEL: scalar_gep_i64: 17; CHECK: // %bb.0: // %entry 18; CHECK-NEXT: add x0, x0, x1 19; CHECK-NEXT: ret 20entry: 21 %g = getelementptr i8, ptr %b, i64 %off 22 ret ptr %g 23} 24 25define ptr @scalar_gep_c10(ptr %b) { 26; CHECK-LABEL: scalar_gep_c10: 27; CHECK: // %bb.0: // %entry 28; CHECK-NEXT: add x0, x0, #10 29; CHECK-NEXT: ret 30entry: 31 %g = getelementptr i8, ptr %b, i64 10 32 ret ptr %g 33} 34 35define ptr @scalar_gep_cm10(ptr %b) { 36; CHECK-LABEL: scalar_gep_cm10: 37; CHECK: // %bb.0: // %entry 38; CHECK-NEXT: sub x0, x0, #10 39; CHECK-NEXT: ret 40entry: 41 %g = getelementptr i8, ptr %b, i64 -10 42 ret ptr %g 43} 44 45define <1 x ptr> @vector_gep_v1i32(<1 x ptr> %b, <1 x i32> %off) { 46; CHECK-SD-LABEL: vector_gep_v1i32: 47; CHECK-SD: // %bb.0: // %entry 48; CHECK-SD-NEXT: shl d1, d1, #32 49; CHECK-SD-NEXT: ssra d0, d1, #32 50; CHECK-SD-NEXT: ret 51; 52; CHECK-GI-LABEL: vector_gep_v1i32: 53; CHECK-GI: // %bb.0: // %entry 54; CHECK-GI-NEXT: fmov w8, s1 55; CHECK-GI-NEXT: fmov x9, d0 56; CHECK-GI-NEXT: add x8, x9, w8, sxtw 57; CHECK-GI-NEXT: fmov d0, x8 58; CHECK-GI-NEXT: ret 59entry: 60 %g = getelementptr i8, <1 x ptr> %b, <1 x i32> %off 61 ret <1 x ptr> %g 62} 63 64define <2 x ptr> @vector_gep_v2i32(<2 x ptr> %b, <2 x i32> %off) { 65; CHECK-LABEL: vector_gep_v2i32: 66; CHECK: // %bb.0: // %entry 67; CHECK-NEXT: saddw v0.2d, v0.2d, v1.2s 68; CHECK-NEXT: ret 69entry: 70 %g = getelementptr i8, <2 x ptr> %b, <2 x i32> %off 71 ret <2 x ptr> %g 72} 73 74define <3 x ptr> @vector_gep_v3i32(<3 x ptr> %b, <3 x i32> %off) { 75; CHECK-SD-LABEL: vector_gep_v3i32: 76; CHECK-SD: // %bb.0: // %entry 77; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 78; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 79; CHECK-SD-NEXT: ext v4.16b, v3.16b, v3.16b, #8 80; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2 81; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] 82; CHECK-SD-NEXT: saddw v2.2d, v2.2d, v4.2s 83; CHECK-SD-NEXT: saddw v0.2d, v0.2d, v3.2s 84; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2 85; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8 86; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 87; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1 88; CHECK-SD-NEXT: ret 89; 90; CHECK-GI-LABEL: vector_gep_v3i32: 91; CHECK-GI: // %bb.0: // %entry 92; CHECK-GI-NEXT: smov x9, v3.s[0] 93; CHECK-GI-NEXT: fmov x8, d0 94; CHECK-GI-NEXT: mov v0.d[0], x8 95; CHECK-GI-NEXT: smov x8, v3.s[1] 96; CHECK-GI-NEXT: mov v4.d[0], x9 97; CHECK-GI-NEXT: fmov x9, d1 98; CHECK-GI-NEXT: mov v0.d[1], x9 99; CHECK-GI-NEXT: fmov x9, d2 100; CHECK-GI-NEXT: mov v4.d[1], x8 101; CHECK-GI-NEXT: mov w8, v3.s[2] 102; CHECK-GI-NEXT: add v0.2d, v0.2d, v4.2d 103; CHECK-GI-NEXT: add x8, x9, w8, sxtw 104; CHECK-GI-NEXT: fmov d2, x8 105; CHECK-GI-NEXT: mov d1, v0.d[1] 106; CHECK-GI-NEXT: ret 107entry: 108 %g = getelementptr i8, <3 x ptr> %b, <3 x i32> %off 109 ret <3 x ptr> %g 110} 111 112define <4 x ptr> @vector_gep_v4i32(<4 x ptr> %b, <4 x i32> %off) { 113; CHECK-SD-LABEL: vector_gep_v4i32: 114; CHECK-SD: // %bb.0: // %entry 115; CHECK-SD-NEXT: saddw2 v1.2d, v1.2d, v2.4s 116; CHECK-SD-NEXT: saddw v0.2d, v0.2d, v2.2s 117; CHECK-SD-NEXT: ret 118; 119; CHECK-GI-LABEL: vector_gep_v4i32: 120; CHECK-GI: // %bb.0: // %entry 121; CHECK-GI-NEXT: saddw v0.2d, v0.2d, v2.2s 122; CHECK-GI-NEXT: saddw2 v1.2d, v1.2d, v2.4s 123; CHECK-GI-NEXT: ret 124entry: 125 %g = getelementptr i8, <4 x ptr> %b, <4 x i32> %off 126 ret <4 x ptr> %g 127} 128 129define <1 x ptr> @vector_gep_v1i64(<1 x ptr> %b, <1 x i64> %off) { 130; CHECK-SD-LABEL: vector_gep_v1i64: 131; CHECK-SD: // %bb.0: // %entry 132; CHECK-SD-NEXT: add d0, d0, d1 133; CHECK-SD-NEXT: ret 134; 135; CHECK-GI-LABEL: vector_gep_v1i64: 136; CHECK-GI: // %bb.0: // %entry 137; CHECK-GI-NEXT: fmov x8, d0 138; CHECK-GI-NEXT: fmov x9, d1 139; CHECK-GI-NEXT: add x8, x8, x9 140; CHECK-GI-NEXT: fmov d0, x8 141; CHECK-GI-NEXT: ret 142entry: 143 %g = getelementptr i8, <1 x ptr> %b, <1 x i64> %off 144 ret <1 x ptr> %g 145} 146 147define <2 x ptr> @vector_gep_v2i64(<2 x ptr> %b, <2 x i64> %off) { 148; CHECK-LABEL: vector_gep_v2i64: 149; CHECK: // %bb.0: // %entry 150; CHECK-NEXT: add v0.2d, v0.2d, v1.2d 151; CHECK-NEXT: ret 152entry: 153 %g = getelementptr i8, <2 x ptr> %b, <2 x i64> %off 154 ret <2 x ptr> %g 155} 156 157define <3 x ptr> @vector_gep_v3i64(<3 x ptr> %b, <3 x i64> %off) { 158; CHECK-SD-LABEL: vector_gep_v3i64: 159; CHECK-SD: // %bb.0: // %entry 160; CHECK-SD-NEXT: add d0, d0, d3 161; CHECK-SD-NEXT: add d1, d1, d4 162; CHECK-SD-NEXT: add d2, d2, d5 163; CHECK-SD-NEXT: ret 164; 165; CHECK-GI-LABEL: vector_gep_v3i64: 166; CHECK-GI: // %bb.0: // %entry 167; CHECK-GI-NEXT: fmov x8, d0 168; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q3 169; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q4 170; CHECK-GI-NEXT: fmov x9, d5 171; CHECK-GI-NEXT: mov v3.d[1], v4.d[0] 172; CHECK-GI-NEXT: mov v0.d[0], x8 173; CHECK-GI-NEXT: fmov x8, d1 174; CHECK-GI-NEXT: mov v0.d[1], x8 175; CHECK-GI-NEXT: fmov x8, d2 176; CHECK-GI-NEXT: add x8, x8, x9 177; CHECK-GI-NEXT: add v0.2d, v0.2d, v3.2d 178; CHECK-GI-NEXT: fmov d2, x8 179; CHECK-GI-NEXT: mov d1, v0.d[1] 180; CHECK-GI-NEXT: ret 181entry: 182 %g = getelementptr i8, <3 x ptr> %b, <3 x i64> %off 183 ret <3 x ptr> %g 184} 185 186define <4 x ptr> @vector_gep_v4i64(<4 x ptr> %b, <4 x i64> %off) { 187; CHECK-SD-LABEL: vector_gep_v4i64: 188; CHECK-SD: // %bb.0: // %entry 189; CHECK-SD-NEXT: add v1.2d, v1.2d, v3.2d 190; CHECK-SD-NEXT: add v0.2d, v0.2d, v2.2d 191; CHECK-SD-NEXT: ret 192; 193; CHECK-GI-LABEL: vector_gep_v4i64: 194; CHECK-GI: // %bb.0: // %entry 195; CHECK-GI-NEXT: add v0.2d, v0.2d, v2.2d 196; CHECK-GI-NEXT: add v1.2d, v1.2d, v3.2d 197; CHECK-GI-NEXT: ret 198entry: 199 %g = getelementptr i8, <4 x ptr> %b, <4 x i64> %off 200 ret <4 x ptr> %g 201} 202 203define <2 x ptr> @vector_gep_v4i128(<2 x ptr> %b, <2 x i128> %off) { 204; CHECK-SD-LABEL: vector_gep_v4i128: 205; CHECK-SD: // %bb.0: // %entry 206; CHECK-SD-NEXT: fmov d1, x0 207; CHECK-SD-NEXT: mov v1.d[1], x2 208; CHECK-SD-NEXT: add v0.2d, v0.2d, v1.2d 209; CHECK-SD-NEXT: ret 210; 211; CHECK-GI-LABEL: vector_gep_v4i128: 212; CHECK-GI: // %bb.0: // %entry 213; CHECK-GI-NEXT: mov v1.d[0], x0 214; CHECK-GI-NEXT: mov v1.d[1], x2 215; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d 216; CHECK-GI-NEXT: ret 217entry: 218 %g = getelementptr i8, <2 x ptr> %b, <2 x i128> %off 219 ret <2 x ptr> %g 220} 221 222 223define <1 x ptr> @vector_gep_v1i64_base(ptr %b, <1 x i64> %off) { 224; CHECK-SD-LABEL: vector_gep_v1i64_base: 225; CHECK-SD: // %bb.0: // %entry 226; CHECK-SD-NEXT: fmov d1, x0 227; CHECK-SD-NEXT: add d0, d1, d0 228; CHECK-SD-NEXT: ret 229; 230; CHECK-GI-LABEL: vector_gep_v1i64_base: 231; CHECK-GI: // %bb.0: // %entry 232; CHECK-GI-NEXT: fmov x8, d0 233; CHECK-GI-NEXT: add x8, x0, x8 234; CHECK-GI-NEXT: fmov d0, x8 235; CHECK-GI-NEXT: ret 236entry: 237 %g = getelementptr i8, ptr %b, <1 x i64> %off 238 ret <1 x ptr> %g 239} 240 241define <2 x ptr> @vector_gep_v2i64_base(ptr %b, <2 x i64> %off) { 242; CHECK-LABEL: vector_gep_v2i64_base: 243; CHECK: // %bb.0: // %entry 244; CHECK-NEXT: dup v1.2d, x0 245; CHECK-NEXT: add v0.2d, v1.2d, v0.2d 246; CHECK-NEXT: ret 247entry: 248 %g = getelementptr i8, ptr %b, <2 x i64> %off 249 ret <2 x ptr> %g 250} 251 252define <3 x ptr> @vector_gep_v3i64_base(ptr %b, <3 x i64> %off) { 253; CHECK-SD-LABEL: vector_gep_v3i64_base: 254; CHECK-SD: // %bb.0: // %entry 255; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 256; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 257; CHECK-SD-NEXT: fmov d3, x0 258; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] 259; CHECK-SD-NEXT: dup v1.2d, x0 260; CHECK-SD-NEXT: add d2, d3, d2 261; CHECK-SD-NEXT: add v0.2d, v1.2d, v0.2d 262; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8 263; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 264; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1 265; CHECK-SD-NEXT: ret 266; 267; CHECK-GI-LABEL: vector_gep_v3i64_base: 268; CHECK-GI: // %bb.0: // %entry 269; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 270; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 271; CHECK-GI-NEXT: fmov x8, d2 272; CHECK-GI-NEXT: mov v0.d[1], v1.d[0] 273; CHECK-GI-NEXT: dup v1.2d, x0 274; CHECK-GI-NEXT: add x8, x0, x8 275; CHECK-GI-NEXT: fmov d2, x8 276; CHECK-GI-NEXT: add v0.2d, v1.2d, v0.2d 277; CHECK-GI-NEXT: mov d1, v0.d[1] 278; CHECK-GI-NEXT: ret 279entry: 280 %g = getelementptr i8, ptr %b, <3 x i64> %off 281 ret <3 x ptr> %g 282} 283 284define <4 x ptr> @vector_gep_v4i64_base(ptr %b, <4 x i64> %off) { 285; CHECK-LABEL: vector_gep_v4i64_base: 286; CHECK: // %bb.0: // %entry 287; CHECK-NEXT: dup v2.2d, x0 288; CHECK-NEXT: add v0.2d, v2.2d, v0.2d 289; CHECK-NEXT: add v1.2d, v2.2d, v1.2d 290; CHECK-NEXT: ret 291entry: 292 %g = getelementptr i8, ptr %b, <4 x i64> %off 293 ret <4 x ptr> %g 294} 295 296define <1 x ptr> @vector_gep_v1i64_c10(ptr %b) { 297; CHECK-SD-LABEL: vector_gep_v1i64_c10: 298; CHECK-SD: // %bb.0: // %entry 299; CHECK-SD-NEXT: mov w8, #10 // =0xa 300; CHECK-SD-NEXT: fmov d0, x0 301; CHECK-SD-NEXT: fmov d1, x8 302; CHECK-SD-NEXT: add d0, d0, d1 303; CHECK-SD-NEXT: ret 304; 305; CHECK-GI-LABEL: vector_gep_v1i64_c10: 306; CHECK-GI: // %bb.0: // %entry 307; CHECK-GI-NEXT: add x8, x0, #10 308; CHECK-GI-NEXT: fmov d0, x8 309; CHECK-GI-NEXT: ret 310entry: 311 %g = getelementptr i8, ptr %b, <1 x i64> <i64 10> 312 ret <1 x ptr> %g 313} 314 315define <2 x ptr> @vector_gep_v2i64_c10(ptr %b) { 316; CHECK-SD-LABEL: vector_gep_v2i64_c10: 317; CHECK-SD: // %bb.0: // %entry 318; CHECK-SD-NEXT: mov w8, #10 // =0xa 319; CHECK-SD-NEXT: dup v0.2d, x0 320; CHECK-SD-NEXT: dup v1.2d, x8 321; CHECK-SD-NEXT: add v0.2d, v0.2d, v1.2d 322; CHECK-SD-NEXT: ret 323; 324; CHECK-GI-LABEL: vector_gep_v2i64_c10: 325; CHECK-GI: // %bb.0: // %entry 326; CHECK-GI-NEXT: adrp x8, .LCPI18_0 327; CHECK-GI-NEXT: dup v0.2d, x0 328; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI18_0] 329; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d 330; CHECK-GI-NEXT: ret 331entry: 332 %g = getelementptr i8, ptr %b, <2 x i64> <i64 10, i64 10> 333 ret <2 x ptr> %g 334} 335 336define <3 x ptr> @vector_gep_v3i64_c10(ptr %b) { 337; CHECK-SD-LABEL: vector_gep_v3i64_c10: 338; CHECK-SD: // %bb.0: // %entry 339; CHECK-SD-NEXT: mov w8, #10 // =0xa 340; CHECK-SD-NEXT: dup v0.2d, x0 341; CHECK-SD-NEXT: fmov d3, x0 342; CHECK-SD-NEXT: dup v2.2d, x8 343; CHECK-SD-NEXT: add v0.2d, v0.2d, v2.2d 344; CHECK-SD-NEXT: add d2, d3, d2 345; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8 346; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 347; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1 348; CHECK-SD-NEXT: ret 349; 350; CHECK-GI-LABEL: vector_gep_v3i64_c10: 351; CHECK-GI: // %bb.0: // %entry 352; CHECK-GI-NEXT: adrp x8, .LCPI19_0 353; CHECK-GI-NEXT: dup v0.2d, x0 354; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI19_0] 355; CHECK-GI-NEXT: add x8, x0, #10 356; CHECK-GI-NEXT: fmov d2, x8 357; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d 358; CHECK-GI-NEXT: mov d1, v0.d[1] 359; CHECK-GI-NEXT: ret 360entry: 361 %g = getelementptr i8, ptr %b, <3 x i64> <i64 10, i64 10, i64 10> 362 ret <3 x ptr> %g 363} 364 365define <4 x ptr> @vector_gep_v4i64_c10(ptr %b) { 366; CHECK-SD-LABEL: vector_gep_v4i64_c10: 367; CHECK-SD: // %bb.0: // %entry 368; CHECK-SD-NEXT: mov w8, #10 // =0xa 369; CHECK-SD-NEXT: dup v0.2d, x0 370; CHECK-SD-NEXT: dup v1.2d, x8 371; CHECK-SD-NEXT: add v0.2d, v0.2d, v1.2d 372; CHECK-SD-NEXT: mov v1.16b, v0.16b 373; CHECK-SD-NEXT: ret 374; 375; CHECK-GI-LABEL: vector_gep_v4i64_c10: 376; CHECK-GI: // %bb.0: // %entry 377; CHECK-GI-NEXT: adrp x8, .LCPI20_0 378; CHECK-GI-NEXT: dup v0.2d, x0 379; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI20_0] 380; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d 381; CHECK-GI-NEXT: mov v1.16b, v0.16b 382; CHECK-GI-NEXT: ret 383entry: 384 %g = getelementptr i8, ptr %b, <4 x i64> <i64 10, i64 10, i64 10, i64 10> 385 ret <4 x ptr> %g 386} 387 388define <1 x ptr> @vector_gep_v1i64_cm10(ptr %b) { 389; CHECK-SD-LABEL: vector_gep_v1i64_cm10: 390; CHECK-SD: // %bb.0: // %entry 391; CHECK-SD-NEXT: mov x8, #-10 // =0xfffffffffffffff6 392; CHECK-SD-NEXT: fmov d1, x0 393; CHECK-SD-NEXT: fmov d0, x8 394; CHECK-SD-NEXT: add d0, d1, d0 395; CHECK-SD-NEXT: ret 396; 397; CHECK-GI-LABEL: vector_gep_v1i64_cm10: 398; CHECK-GI: // %bb.0: // %entry 399; CHECK-GI-NEXT: sub x8, x0, #10 400; CHECK-GI-NEXT: fmov d0, x8 401; CHECK-GI-NEXT: ret 402entry: 403 %g = getelementptr i8, ptr %b, <1 x i64> <i64 -10> 404 ret <1 x ptr> %g 405} 406 407define <2 x ptr> @vector_gep_v2i64_cm10(ptr %b) { 408; CHECK-SD-LABEL: vector_gep_v2i64_cm10: 409; CHECK-SD: // %bb.0: // %entry 410; CHECK-SD-NEXT: mov x8, #-10 // =0xfffffffffffffff6 411; CHECK-SD-NEXT: dup v1.2d, x0 412; CHECK-SD-NEXT: dup v0.2d, x8 413; CHECK-SD-NEXT: add v0.2d, v1.2d, v0.2d 414; CHECK-SD-NEXT: ret 415; 416; CHECK-GI-LABEL: vector_gep_v2i64_cm10: 417; CHECK-GI: // %bb.0: // %entry 418; CHECK-GI-NEXT: adrp x8, .LCPI22_0 419; CHECK-GI-NEXT: dup v0.2d, x0 420; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI22_0] 421; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d 422; CHECK-GI-NEXT: ret 423entry: 424 %g = getelementptr i8, ptr %b, <2 x i64> <i64 -10, i64 -10> 425 ret <2 x ptr> %g 426} 427 428define <3 x ptr> @vector_gep_v3i64_cm10(ptr %b) { 429; CHECK-SD-LABEL: vector_gep_v3i64_cm10: 430; CHECK-SD: // %bb.0: // %entry 431; CHECK-SD-NEXT: mov x8, #-10 // =0xfffffffffffffff6 432; CHECK-SD-NEXT: dup v0.2d, x0 433; CHECK-SD-NEXT: fmov d3, x0 434; CHECK-SD-NEXT: dup v2.2d, x8 435; CHECK-SD-NEXT: add v0.2d, v0.2d, v2.2d 436; CHECK-SD-NEXT: add d2, d3, d2 437; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8 438; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 439; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1 440; CHECK-SD-NEXT: ret 441; 442; CHECK-GI-LABEL: vector_gep_v3i64_cm10: 443; CHECK-GI: // %bb.0: // %entry 444; CHECK-GI-NEXT: adrp x8, .LCPI23_0 445; CHECK-GI-NEXT: dup v0.2d, x0 446; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI23_0] 447; CHECK-GI-NEXT: sub x8, x0, #10 448; CHECK-GI-NEXT: fmov d2, x8 449; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d 450; CHECK-GI-NEXT: mov d1, v0.d[1] 451; CHECK-GI-NEXT: ret 452entry: 453 %g = getelementptr i8, ptr %b, <3 x i64> <i64 -10, i64 -10, i64 -10> 454 ret <3 x ptr> %g 455} 456 457define <4 x ptr> @vector_gep_v4i64_cm10(ptr %b) { 458; CHECK-SD-LABEL: vector_gep_v4i64_cm10: 459; CHECK-SD: // %bb.0: // %entry 460; CHECK-SD-NEXT: mov x8, #-10 // =0xfffffffffffffff6 461; CHECK-SD-NEXT: dup v1.2d, x0 462; CHECK-SD-NEXT: dup v0.2d, x8 463; CHECK-SD-NEXT: add v0.2d, v1.2d, v0.2d 464; CHECK-SD-NEXT: mov v1.16b, v0.16b 465; CHECK-SD-NEXT: ret 466; 467; CHECK-GI-LABEL: vector_gep_v4i64_cm10: 468; CHECK-GI: // %bb.0: // %entry 469; CHECK-GI-NEXT: adrp x8, .LCPI24_0 470; CHECK-GI-NEXT: dup v0.2d, x0 471; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI24_0] 472; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d 473; CHECK-GI-NEXT: mov v1.16b, v0.16b 474; CHECK-GI-NEXT: ret 475entry: 476 %g = getelementptr i8, ptr %b, <4 x i64> <i64 -10, i64 -10, i64 -10, i64 -10> 477 ret <4 x ptr> %g 478} 479