xref: /llvm-project/llvm/test/Bitcode/vector-pcs.ll (revision 4dbc5126767c9c49ae584ec2f403271177b954c2)
1*4dbc5126SSander de Smalen; RUN: llvm-as %s -o - -f | llvm-dis | FileCheck %s
2*4dbc5126SSander de Smalen; RUN: llvm-as %s -o - -f | verify-uselistorder
3*4dbc5126SSander de Smalen
4*4dbc5126SSander de Smalendeclare aarch64_vector_pcs void @aarch64_vector_pcs()
5*4dbc5126SSander de Smalen; CHECK: declare aarch64_vector_pcs void @aarch64_vector_pcs
6*4dbc5126SSander de Smalen
7*4dbc5126SSander de Smalendefine void @call_aarch64_vector_pcs() {
8*4dbc5126SSander de Smalen; CHECK: call aarch64_vector_pcs void @aarch64_vector_pcs
9*4dbc5126SSander de Smalen  call aarch64_vector_pcs void @aarch64_vector_pcs()
10*4dbc5126SSander de Smalen  ret void
11*4dbc5126SSander de Smalen}
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