1; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>,verify<memoryssa>' -S < %s 2>&1 | FileCheck %s 2; 3; We weren't properly considering the args in callsites in equality or hashing. 4 5target triple = "armv7-dcg-linux-gnueabi" 6 7; CHECK-LABEL: define <8 x i16> @vpx_idct32_32_neon 8define <8 x i16> @vpx_idct32_32_neon(ptr %p, <8 x i16> %v) { 9entry: 10; CHECK: MemoryUse(liveOnEntry) 11 %load1 = call <8 x i16> @llvm.arm.neon.vld1.v8i16.p0(ptr %p, i32 2) #4 ; load CSE replacement 12 13; CHECK: 1 = MemoryDef(liveOnEntry) 14 call void @llvm.arm.neon.vst1.p0.v8i16(ptr %p, <8 x i16> %v, i32 2) #4 ; clobber 15 16 %p_next = getelementptr inbounds i8, ptr %p, i32 16 17; CHECK: MemoryUse(liveOnEntry) 18 %load2 = call <8 x i16> @llvm.arm.neon.vld1.v8i16.p0(ptr %p_next, i32 2) #4 ; non-aliasing load needed to trigger bug 19 20; CHECK: MemoryUse(1) 21 %load3 = call <8 x i16> @llvm.arm.neon.vld1.v8i16.p0(ptr %p, i32 2) #4 ; load CSE removed 22 23 %add = add <8 x i16> %load1, %load2 24 %ret = add <8 x i16> %add, %load3 25 ret <8 x i16> %ret 26} 27 28; Function Attrs: argmemonly nounwind readonly 29declare <8 x i16> @llvm.arm.neon.vld1.v8i16.p0(ptr, i32) #2 30 31; Function Attrs: argmemonly nounwind 32declare void @llvm.arm.neon.vst1.p0.v8i16(ptr, <8 x i16>, i32) #1 33 34attributes #1 = { argmemonly nounwind } 35attributes #2 = { argmemonly nounwind readonly } 36attributes #3 = { nounwind readnone } 37attributes #4 = { nounwind } 38