xref: /llvm-project/llvm/lib/Transforms/Vectorize/VPlanTransforms.h (revision 97687b7aea17cfc6e9c42d89b6f22ac5b9c7ddc1)
1 //===- VPlanTransforms.h - Utility VPlan to VPlan transforms --------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file provides utility VPlan to VPlan transformations.
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H
14 #define LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H
15 
16 #include "VPlan.h"
17 #include "llvm/ADT/STLFunctionalExtras.h"
18 
19 namespace llvm {
20 
21 class InductionDescriptor;
22 class Instruction;
23 class PHINode;
24 class ScalarEvolution;
25 class Loop;
26 class PredicatedScalarEvolution;
27 class TargetLibraryInfo;
28 class VPBuilder;
29 class VPRecipeBuilder;
30 
31 struct VPlanTransforms {
32   /// Replaces the VPInstructions in \p Plan with corresponding
33   /// widen recipes.
34   static void
35   VPInstructionsToVPRecipes(VPlanPtr &Plan,
36                             function_ref<const InductionDescriptor *(PHINode *)>
37                                 GetIntOrFpInductionDescriptor,
38                             ScalarEvolution &SE, const TargetLibraryInfo &TLI);
39 
40   /// Sink users of fixed-order recurrences after the recipe defining their
41   /// previous value. Then introduce FirstOrderRecurrenceSplice VPInstructions
42   /// to combine the value from the recurrence phis and previous values. The
43   /// current implementation assumes all users can be sunk after the previous
44   /// value, which is enforced by earlier legality checks.
45   /// \returns true if all users of fixed-order recurrences could be re-arranged
46   /// as needed or false if it is not possible. In the latter case, \p Plan is
47   /// not valid.
48   static bool adjustFixedOrderRecurrences(VPlan &Plan, VPBuilder &Builder);
49 
50   /// Clear NSW/NUW flags from reduction instructions if necessary.
51   static void clearReductionWrapFlags(VPlan &Plan);
52 
53   /// Optimize \p Plan based on \p BestVF and \p BestUF. This may restrict the
54   /// resulting plan to \p BestVF and \p BestUF.
55   static void optimizeForVFAndUF(VPlan &Plan, ElementCount BestVF,
56                                  unsigned BestUF,
57                                  PredicatedScalarEvolution &PSE);
58 
59   /// Apply VPlan-to-VPlan optimizations to \p Plan, including induction recipe
60   /// optimizations, dead recipe removal, replicate region optimizations and
61   /// block merging.
62   static void optimize(VPlan &Plan, ScalarEvolution &SE);
63 
64   /// Wrap predicated VPReplicateRecipes with a mask operand in an if-then
65   /// region block and remove the mask operand. Optimize the created regions by
66   /// iteratively sinking scalar operands into the region, followed by merging
67   /// regions until no improvements are remaining.
68   static void createAndOptimizeReplicateRegions(VPlan &Plan);
69 
70   /// Replace (ICMP_ULE, wide canonical IV, backedge-taken-count) checks with an
71   /// (active-lane-mask recipe, wide canonical IV, trip-count). If \p
72   /// UseActiveLaneMaskForControlFlow is true, introduce an
73   /// VPActiveLaneMaskPHIRecipe. If \p DataAndControlFlowWithoutRuntimeCheck is
74   /// true, no minimum-iteration runtime check will be created (during skeleton
75   /// creation) and instead it is handled using active-lane-mask. \p
76   /// DataAndControlFlowWithoutRuntimeCheck implies \p
77   /// UseActiveLaneMaskForControlFlow.
78   static void addActiveLaneMask(VPlan &Plan,
79                                 bool UseActiveLaneMaskForControlFlow,
80                                 bool DataAndControlFlowWithoutRuntimeCheck);
81 
82 private:
83   /// Remove redundant VPBasicBlocks by merging them into their predecessor if
84   /// the predecessor has a single successor.
85   static bool mergeBlocksIntoPredecessors(VPlan &Plan);
86 
87   /// Remove redundant casts of inductions.
88   ///
89   /// Such redundant casts are casts of induction variables that can be ignored,
90   /// because we already proved that the casted phi is equal to the uncasted phi
91   /// in the vectorized loop. There is no need to vectorize the cast - the same
92   /// value can be used for both the phi and casts in the vector loop.
93   static void removeRedundantInductionCasts(VPlan &Plan);
94 
95   /// Try to replace VPWidenCanonicalIVRecipes with a widened canonical IV
96   /// recipe, if it exists.
97   static void removeRedundantCanonicalIVs(VPlan &Plan);
98 
99   static void removeDeadRecipes(VPlan &Plan);
100 
101   /// If any user of a VPWidenIntOrFpInductionRecipe needs scalar values,
102   /// provide them by building scalar steps off of the canonical scalar IV and
103   /// update the original IV's users. This is an optional optimization to reduce
104   /// the needs of vector extracts.
105   static void optimizeInductions(VPlan &Plan, ScalarEvolution &SE);
106 
107   /// Remove redundant EpxandSCEVRecipes in \p Plan's entry block by replacing
108   /// them with already existing recipes expanding the same SCEV expression.
109   static void removeRedundantExpandSCEVRecipes(VPlan &Plan);
110 
111 };
112 
113 } // namespace llvm
114 
115 #endif // LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H
116