xref: /llvm-project/llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp (revision 45a892d0124ad430faebd96bc46f8abb0bf4f0dd)
1 //===-- ThreadSanitizer.cpp - race detector -------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file is a part of ThreadSanitizer, a race detector.
10 //
11 // The tool is under development, for the details about previous versions see
12 // http://code.google.com/p/data-race-test
13 //
14 // The instrumentation phase is quite simple:
15 //   - Insert calls to run-time library before every memory access.
16 //      - Optimizations may apply to avoid instrumenting some of the accesses.
17 //   - Insert calls at function entry/exit.
18 // The rest is handled by the run-time library.
19 //===----------------------------------------------------------------------===//
20 
21 #include "llvm/Transforms/Instrumentation/ThreadSanitizer.h"
22 #include "llvm/ADT/DenseMap.h"
23 #include "llvm/ADT/SmallString.h"
24 #include "llvm/ADT/SmallVector.h"
25 #include "llvm/ADT/Statistic.h"
26 #include "llvm/ADT/StringExtras.h"
27 #include "llvm/Analysis/CaptureTracking.h"
28 #include "llvm/Analysis/TargetLibraryInfo.h"
29 #include "llvm/Analysis/ValueTracking.h"
30 #include "llvm/IR/DataLayout.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/IRBuilder.h"
33 #include "llvm/IR/Instructions.h"
34 #include "llvm/IR/IntrinsicInst.h"
35 #include "llvm/IR/Intrinsics.h"
36 #include "llvm/IR/LLVMContext.h"
37 #include "llvm/IR/Metadata.h"
38 #include "llvm/IR/Module.h"
39 #include "llvm/IR/Type.h"
40 #include "llvm/ProfileData/InstrProf.h"
41 #include "llvm/Support/CommandLine.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Transforms/Instrumentation.h"
46 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
47 #include "llvm/Transforms/Utils/EscapeEnumerator.h"
48 #include "llvm/Transforms/Utils/Local.h"
49 #include "llvm/Transforms/Utils/ModuleUtils.h"
50 
51 using namespace llvm;
52 
53 #define DEBUG_TYPE "tsan"
54 
55 static cl::opt<bool> ClInstrumentMemoryAccesses(
56     "tsan-instrument-memory-accesses", cl::init(true),
57     cl::desc("Instrument memory accesses"), cl::Hidden);
58 static cl::opt<bool>
59     ClInstrumentFuncEntryExit("tsan-instrument-func-entry-exit", cl::init(true),
60                               cl::desc("Instrument function entry and exit"),
61                               cl::Hidden);
62 static cl::opt<bool> ClHandleCxxExceptions(
63     "tsan-handle-cxx-exceptions", cl::init(true),
64     cl::desc("Handle C++ exceptions (insert cleanup blocks for unwinding)"),
65     cl::Hidden);
66 static cl::opt<bool> ClInstrumentAtomics("tsan-instrument-atomics",
67                                          cl::init(true),
68                                          cl::desc("Instrument atomics"),
69                                          cl::Hidden);
70 static cl::opt<bool> ClInstrumentMemIntrinsics(
71     "tsan-instrument-memintrinsics", cl::init(true),
72     cl::desc("Instrument memintrinsics (memset/memcpy/memmove)"), cl::Hidden);
73 static cl::opt<bool> ClDistinguishVolatile(
74     "tsan-distinguish-volatile", cl::init(false),
75     cl::desc("Emit special instrumentation for accesses to volatiles"),
76     cl::Hidden);
77 static cl::opt<bool> ClInstrumentReadBeforeWrite(
78     "tsan-instrument-read-before-write", cl::init(false),
79     cl::desc("Do not eliminate read instrumentation for read-before-writes"),
80     cl::Hidden);
81 static cl::opt<bool> ClCompoundReadBeforeWrite(
82     "tsan-compound-read-before-write", cl::init(false),
83     cl::desc("Emit special compound instrumentation for reads-before-writes"),
84     cl::Hidden);
85 
86 STATISTIC(NumInstrumentedReads, "Number of instrumented reads");
87 STATISTIC(NumInstrumentedWrites, "Number of instrumented writes");
88 STATISTIC(NumOmittedReadsBeforeWrite,
89           "Number of reads ignored due to following writes");
90 STATISTIC(NumAccessesWithBadSize, "Number of accesses with bad size");
91 STATISTIC(NumInstrumentedVtableWrites, "Number of vtable ptr writes");
92 STATISTIC(NumInstrumentedVtableReads, "Number of vtable ptr reads");
93 STATISTIC(NumOmittedReadsFromConstantGlobals,
94           "Number of reads from constant globals");
95 STATISTIC(NumOmittedReadsFromVtable, "Number of vtable reads");
96 STATISTIC(NumOmittedNonCaptured, "Number of accesses ignored due to capturing");
97 
98 const char kTsanModuleCtorName[] = "tsan.module_ctor";
99 const char kTsanInitName[] = "__tsan_init";
100 
101 namespace {
102 
103 /// ThreadSanitizer: instrument the code in module to find races.
104 ///
105 /// Instantiating ThreadSanitizer inserts the tsan runtime library API function
106 /// declarations into the module if they don't exist already. Instantiating
107 /// ensures the __tsan_init function is in the list of global constructors for
108 /// the module.
109 struct ThreadSanitizer {
110   ThreadSanitizer() {
111     // Check options and warn user.
112     if (ClInstrumentReadBeforeWrite && ClCompoundReadBeforeWrite) {
113       errs()
114           << "warning: Option -tsan-compound-read-before-write has no effect "
115              "when -tsan-instrument-read-before-write is set.\n";
116     }
117   }
118 
119   bool sanitizeFunction(Function &F, const TargetLibraryInfo &TLI);
120 
121 private:
122   // Internal Instruction wrapper that contains more information about the
123   // Instruction from prior analysis.
124   struct InstructionInfo {
125     // Instrumentation emitted for this instruction is for a compounded set of
126     // read and write operations in the same basic block.
127     static constexpr unsigned kCompoundRW = (1U << 0);
128 
129     explicit InstructionInfo(Instruction *Inst) : Inst(Inst) {}
130 
131     Instruction *Inst;
132     unsigned Flags = 0;
133   };
134 
135   void initialize(Module &M);
136   bool instrumentLoadOrStore(const InstructionInfo &II, const DataLayout &DL);
137   bool instrumentAtomic(Instruction *I, const DataLayout &DL);
138   bool instrumentMemIntrinsic(Instruction *I);
139   void chooseInstructionsToInstrument(SmallVectorImpl<Instruction *> &Local,
140                                       SmallVectorImpl<InstructionInfo> &All,
141                                       const DataLayout &DL);
142   bool addrPointsToConstantData(Value *Addr);
143   int getMemoryAccessFuncIndex(Type *OrigTy, Value *Addr, const DataLayout &DL);
144   void InsertRuntimeIgnores(Function &F);
145 
146   Type *IntptrTy;
147   FunctionCallee TsanFuncEntry;
148   FunctionCallee TsanFuncExit;
149   FunctionCallee TsanIgnoreBegin;
150   FunctionCallee TsanIgnoreEnd;
151   // Accesses sizes are powers of two: 1, 2, 4, 8, 16.
152   static const size_t kNumberOfAccessSizes = 5;
153   FunctionCallee TsanRead[kNumberOfAccessSizes];
154   FunctionCallee TsanWrite[kNumberOfAccessSizes];
155   FunctionCallee TsanUnalignedRead[kNumberOfAccessSizes];
156   FunctionCallee TsanUnalignedWrite[kNumberOfAccessSizes];
157   FunctionCallee TsanVolatileRead[kNumberOfAccessSizes];
158   FunctionCallee TsanVolatileWrite[kNumberOfAccessSizes];
159   FunctionCallee TsanUnalignedVolatileRead[kNumberOfAccessSizes];
160   FunctionCallee TsanUnalignedVolatileWrite[kNumberOfAccessSizes];
161   FunctionCallee TsanCompoundRW[kNumberOfAccessSizes];
162   FunctionCallee TsanUnalignedCompoundRW[kNumberOfAccessSizes];
163   FunctionCallee TsanAtomicLoad[kNumberOfAccessSizes];
164   FunctionCallee TsanAtomicStore[kNumberOfAccessSizes];
165   FunctionCallee TsanAtomicRMW[AtomicRMWInst::LAST_BINOP + 1]
166                               [kNumberOfAccessSizes];
167   FunctionCallee TsanAtomicCAS[kNumberOfAccessSizes];
168   FunctionCallee TsanAtomicThreadFence;
169   FunctionCallee TsanAtomicSignalFence;
170   FunctionCallee TsanVptrUpdate;
171   FunctionCallee TsanVptrLoad;
172   FunctionCallee MemmoveFn, MemcpyFn, MemsetFn;
173 };
174 
175 void insertModuleCtor(Module &M) {
176   getOrCreateSanitizerCtorAndInitFunctions(
177       M, kTsanModuleCtorName, kTsanInitName, /*InitArgTypes=*/{},
178       /*InitArgs=*/{},
179       // This callback is invoked when the functions are created the first
180       // time. Hook them into the global ctors list in that case:
181       [&](Function *Ctor, FunctionCallee) { appendToGlobalCtors(M, Ctor, 0); });
182 }
183 }  // namespace
184 
185 PreservedAnalyses ThreadSanitizerPass::run(Function &F,
186                                            FunctionAnalysisManager &FAM) {
187   ThreadSanitizer TSan;
188   if (TSan.sanitizeFunction(F, FAM.getResult<TargetLibraryAnalysis>(F)))
189     return PreservedAnalyses::none();
190   return PreservedAnalyses::all();
191 }
192 
193 PreservedAnalyses ModuleThreadSanitizerPass::run(Module &M,
194                                                  ModuleAnalysisManager &MAM) {
195   insertModuleCtor(M);
196   return PreservedAnalyses::none();
197 }
198 void ThreadSanitizer::initialize(Module &M) {
199   const DataLayout &DL = M.getDataLayout();
200   IntptrTy = DL.getIntPtrType(M.getContext());
201 
202   IRBuilder<> IRB(M.getContext());
203   AttributeList Attr;
204   Attr = Attr.addFnAttribute(M.getContext(), Attribute::NoUnwind);
205   // Initialize the callbacks.
206   TsanFuncEntry = M.getOrInsertFunction("__tsan_func_entry", Attr,
207                                         IRB.getVoidTy(), IRB.getInt8PtrTy());
208   TsanFuncExit =
209       M.getOrInsertFunction("__tsan_func_exit", Attr, IRB.getVoidTy());
210   TsanIgnoreBegin = M.getOrInsertFunction("__tsan_ignore_thread_begin", Attr,
211                                           IRB.getVoidTy());
212   TsanIgnoreEnd =
213       M.getOrInsertFunction("__tsan_ignore_thread_end", Attr, IRB.getVoidTy());
214   IntegerType *OrdTy = IRB.getInt32Ty();
215   for (size_t i = 0; i < kNumberOfAccessSizes; ++i) {
216     const unsigned ByteSize = 1U << i;
217     const unsigned BitSize = ByteSize * 8;
218     std::string ByteSizeStr = utostr(ByteSize);
219     std::string BitSizeStr = utostr(BitSize);
220     SmallString<32> ReadName("__tsan_read" + ByteSizeStr);
221     TsanRead[i] = M.getOrInsertFunction(ReadName, Attr, IRB.getVoidTy(),
222                                         IRB.getInt8PtrTy());
223 
224     SmallString<32> WriteName("__tsan_write" + ByteSizeStr);
225     TsanWrite[i] = M.getOrInsertFunction(WriteName, Attr, IRB.getVoidTy(),
226                                          IRB.getInt8PtrTy());
227 
228     SmallString<64> UnalignedReadName("__tsan_unaligned_read" + ByteSizeStr);
229     TsanUnalignedRead[i] = M.getOrInsertFunction(
230         UnalignedReadName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
231 
232     SmallString<64> UnalignedWriteName("__tsan_unaligned_write" + ByteSizeStr);
233     TsanUnalignedWrite[i] = M.getOrInsertFunction(
234         UnalignedWriteName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
235 
236     SmallString<64> VolatileReadName("__tsan_volatile_read" + ByteSizeStr);
237     TsanVolatileRead[i] = M.getOrInsertFunction(
238         VolatileReadName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
239 
240     SmallString<64> VolatileWriteName("__tsan_volatile_write" + ByteSizeStr);
241     TsanVolatileWrite[i] = M.getOrInsertFunction(
242         VolatileWriteName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
243 
244     SmallString<64> UnalignedVolatileReadName("__tsan_unaligned_volatile_read" +
245                                               ByteSizeStr);
246     TsanUnalignedVolatileRead[i] = M.getOrInsertFunction(
247         UnalignedVolatileReadName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
248 
249     SmallString<64> UnalignedVolatileWriteName(
250         "__tsan_unaligned_volatile_write" + ByteSizeStr);
251     TsanUnalignedVolatileWrite[i] = M.getOrInsertFunction(
252         UnalignedVolatileWriteName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
253 
254     SmallString<64> CompoundRWName("__tsan_read_write" + ByteSizeStr);
255     TsanCompoundRW[i] = M.getOrInsertFunction(
256         CompoundRWName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
257 
258     SmallString<64> UnalignedCompoundRWName("__tsan_unaligned_read_write" +
259                                             ByteSizeStr);
260     TsanUnalignedCompoundRW[i] = M.getOrInsertFunction(
261         UnalignedCompoundRWName, Attr, IRB.getVoidTy(), IRB.getInt8PtrTy());
262 
263     Type *Ty = Type::getIntNTy(M.getContext(), BitSize);
264     Type *PtrTy = Ty->getPointerTo();
265     SmallString<32> AtomicLoadName("__tsan_atomic" + BitSizeStr + "_load");
266     {
267       AttributeList AL = Attr;
268       AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
269       TsanAtomicLoad[i] =
270           M.getOrInsertFunction(AtomicLoadName, AL, Ty, PtrTy, OrdTy);
271     }
272 
273     SmallString<32> AtomicStoreName("__tsan_atomic" + BitSizeStr + "_store");
274     {
275       AttributeList AL = Attr;
276       AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
277       AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
278       TsanAtomicStore[i] = M.getOrInsertFunction(
279           AtomicStoreName, AL, IRB.getVoidTy(), PtrTy, Ty, OrdTy);
280     }
281 
282     for (unsigned Op = AtomicRMWInst::FIRST_BINOP;
283          Op <= AtomicRMWInst::LAST_BINOP; ++Op) {
284       TsanAtomicRMW[Op][i] = nullptr;
285       const char *NamePart = nullptr;
286       if (Op == AtomicRMWInst::Xchg)
287         NamePart = "_exchange";
288       else if (Op == AtomicRMWInst::Add)
289         NamePart = "_fetch_add";
290       else if (Op == AtomicRMWInst::Sub)
291         NamePart = "_fetch_sub";
292       else if (Op == AtomicRMWInst::And)
293         NamePart = "_fetch_and";
294       else if (Op == AtomicRMWInst::Or)
295         NamePart = "_fetch_or";
296       else if (Op == AtomicRMWInst::Xor)
297         NamePart = "_fetch_xor";
298       else if (Op == AtomicRMWInst::Nand)
299         NamePart = "_fetch_nand";
300       else
301         continue;
302       SmallString<32> RMWName("__tsan_atomic" + itostr(BitSize) + NamePart);
303       {
304         AttributeList AL = Attr;
305         AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
306         AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
307         TsanAtomicRMW[Op][i] =
308             M.getOrInsertFunction(RMWName, AL, Ty, PtrTy, Ty, OrdTy);
309       }
310     }
311 
312     SmallString<32> AtomicCASName("__tsan_atomic" + BitSizeStr +
313                                   "_compare_exchange_val");
314     {
315       AttributeList AL = Attr;
316       AL = AL.addParamAttribute(M.getContext(), 1, Attribute::ZExt);
317       AL = AL.addParamAttribute(M.getContext(), 2, Attribute::ZExt);
318       AL = AL.addParamAttribute(M.getContext(), 3, Attribute::ZExt);
319       AL = AL.addParamAttribute(M.getContext(), 4, Attribute::ZExt);
320       TsanAtomicCAS[i] = M.getOrInsertFunction(AtomicCASName, AL, Ty, PtrTy, Ty,
321                                                Ty, OrdTy, OrdTy);
322     }
323   }
324   TsanVptrUpdate =
325       M.getOrInsertFunction("__tsan_vptr_update", Attr, IRB.getVoidTy(),
326                             IRB.getInt8PtrTy(), IRB.getInt8PtrTy());
327   TsanVptrLoad = M.getOrInsertFunction("__tsan_vptr_read", Attr,
328                                        IRB.getVoidTy(), IRB.getInt8PtrTy());
329   {
330     AttributeList AL = Attr;
331     AL = AL.addParamAttribute(M.getContext(), 0, Attribute::ZExt);
332     TsanAtomicThreadFence = M.getOrInsertFunction("__tsan_atomic_thread_fence",
333                                                   AL, IRB.getVoidTy(), OrdTy);
334   }
335   {
336     AttributeList AL = Attr;
337     AL = AL.addParamAttribute(M.getContext(), 0, Attribute::ZExt);
338     TsanAtomicSignalFence = M.getOrInsertFunction("__tsan_atomic_signal_fence",
339                                                   AL, IRB.getVoidTy(), OrdTy);
340   }
341 
342   MemmoveFn =
343       M.getOrInsertFunction("__tsan_memmove", Attr, IRB.getInt8PtrTy(),
344                             IRB.getInt8PtrTy(), IRB.getInt8PtrTy(), IntptrTy);
345   MemcpyFn =
346       M.getOrInsertFunction("__tsan_memcpy", Attr, IRB.getInt8PtrTy(),
347                             IRB.getInt8PtrTy(), IRB.getInt8PtrTy(), IntptrTy);
348   MemsetFn =
349       M.getOrInsertFunction("__tsan_memset", Attr, IRB.getInt8PtrTy(),
350                             IRB.getInt8PtrTy(), IRB.getInt32Ty(), IntptrTy);
351 }
352 
353 static bool isVtableAccess(Instruction *I) {
354   if (MDNode *Tag = I->getMetadata(LLVMContext::MD_tbaa))
355     return Tag->isTBAAVtableAccess();
356   return false;
357 }
358 
359 // Do not instrument known races/"benign races" that come from compiler
360 // instrumentatin. The user has no way of suppressing them.
361 static bool shouldInstrumentReadWriteFromAddress(const Module *M, Value *Addr) {
362   // Peel off GEPs and BitCasts.
363   Addr = Addr->stripInBoundsOffsets();
364 
365   if (GlobalVariable *GV = dyn_cast<GlobalVariable>(Addr)) {
366     if (GV->hasSection()) {
367       StringRef SectionName = GV->getSection();
368       // Check if the global is in the PGO counters section.
369       auto OF = Triple(M->getTargetTriple()).getObjectFormat();
370       if (SectionName.endswith(
371               getInstrProfSectionName(IPSK_cnts, OF, /*AddSegmentInfo=*/false)))
372         return false;
373     }
374 
375     // Check if the global is private gcov data.
376     if (GV->getName().startswith("__llvm_gcov") ||
377         GV->getName().startswith("__llvm_gcda"))
378       return false;
379   }
380 
381   // Do not instrument accesses from different address spaces; we cannot deal
382   // with them.
383   if (Addr) {
384     Type *PtrTy = cast<PointerType>(Addr->getType()->getScalarType());
385     if (PtrTy->getPointerAddressSpace() != 0)
386       return false;
387   }
388 
389   return true;
390 }
391 
392 bool ThreadSanitizer::addrPointsToConstantData(Value *Addr) {
393   // If this is a GEP, just analyze its pointer operand.
394   if (GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(Addr))
395     Addr = GEP->getPointerOperand();
396 
397   if (GlobalVariable *GV = dyn_cast<GlobalVariable>(Addr)) {
398     if (GV->isConstant()) {
399       // Reads from constant globals can not race with any writes.
400       NumOmittedReadsFromConstantGlobals++;
401       return true;
402     }
403   } else if (LoadInst *L = dyn_cast<LoadInst>(Addr)) {
404     if (isVtableAccess(L)) {
405       // Reads from a vtable pointer can not race with any writes.
406       NumOmittedReadsFromVtable++;
407       return true;
408     }
409   }
410   return false;
411 }
412 
413 // Instrumenting some of the accesses may be proven redundant.
414 // Currently handled:
415 //  - read-before-write (within same BB, no calls between)
416 //  - not captured variables
417 //
418 // We do not handle some of the patterns that should not survive
419 // after the classic compiler optimizations.
420 // E.g. two reads from the same temp should be eliminated by CSE,
421 // two writes should be eliminated by DSE, etc.
422 //
423 // 'Local' is a vector of insns within the same BB (no calls between).
424 // 'All' is a vector of insns that will be instrumented.
425 void ThreadSanitizer::chooseInstructionsToInstrument(
426     SmallVectorImpl<Instruction *> &Local,
427     SmallVectorImpl<InstructionInfo> &All, const DataLayout &DL) {
428   DenseMap<Value *, size_t> WriteTargets; // Map of addresses to index in All
429   // Iterate from the end.
430   for (Instruction *I : reverse(Local)) {
431     const bool IsWrite = isa<StoreInst>(*I);
432     Value *Addr = IsWrite ? cast<StoreInst>(I)->getPointerOperand()
433                           : cast<LoadInst>(I)->getPointerOperand();
434 
435     if (!shouldInstrumentReadWriteFromAddress(I->getModule(), Addr))
436       continue;
437 
438     if (!IsWrite) {
439       const auto WriteEntry = WriteTargets.find(Addr);
440       if (!ClInstrumentReadBeforeWrite && WriteEntry != WriteTargets.end()) {
441         auto &WI = All[WriteEntry->second];
442         // If we distinguish volatile accesses and if either the read or write
443         // is volatile, do not omit any instrumentation.
444         const bool AnyVolatile =
445             ClDistinguishVolatile && (cast<LoadInst>(I)->isVolatile() ||
446                                       cast<StoreInst>(WI.Inst)->isVolatile());
447         if (!AnyVolatile) {
448           // We will write to this temp, so no reason to analyze the read.
449           // Mark the write instruction as compound.
450           WI.Flags |= InstructionInfo::kCompoundRW;
451           NumOmittedReadsBeforeWrite++;
452           continue;
453         }
454       }
455 
456       if (addrPointsToConstantData(Addr)) {
457         // Addr points to some constant data -- it can not race with any writes.
458         continue;
459       }
460     }
461 
462     if (isa<AllocaInst>(getUnderlyingObject(Addr)) &&
463         !PointerMayBeCaptured(Addr, true, true)) {
464       // The variable is addressable but not captured, so it cannot be
465       // referenced from a different thread and participate in a data race
466       // (see llvm/Analysis/CaptureTracking.h for details).
467       NumOmittedNonCaptured++;
468       continue;
469     }
470 
471     // Instrument this instruction.
472     All.emplace_back(I);
473     if (IsWrite) {
474       // For read-before-write and compound instrumentation we only need one
475       // write target, and we can override any previous entry if it exists.
476       WriteTargets[Addr] = All.size() - 1;
477     }
478   }
479   Local.clear();
480 }
481 
482 static bool isTsanAtomic(const Instruction *I) {
483   // TODO: Ask TTI whether synchronization scope is between threads.
484   auto SSID = getAtomicSyncScopeID(I);
485   if (!SSID)
486     return false;
487   if (isa<LoadInst>(I) || isa<StoreInst>(I))
488     return SSID.value() != SyncScope::SingleThread;
489   return true;
490 }
491 
492 void ThreadSanitizer::InsertRuntimeIgnores(Function &F) {
493   InstrumentationIRBuilder IRB(F.getEntryBlock().getFirstNonPHI());
494   IRB.CreateCall(TsanIgnoreBegin);
495   EscapeEnumerator EE(F, "tsan_ignore_cleanup", ClHandleCxxExceptions);
496   while (IRBuilder<> *AtExit = EE.Next()) {
497     InstrumentationIRBuilder::ensureDebugInfo(*AtExit, F);
498     AtExit->CreateCall(TsanIgnoreEnd);
499   }
500 }
501 
502 bool ThreadSanitizer::sanitizeFunction(Function &F,
503                                        const TargetLibraryInfo &TLI) {
504   // This is required to prevent instrumenting call to __tsan_init from within
505   // the module constructor.
506   if (F.getName() == kTsanModuleCtorName)
507     return false;
508   // Naked functions can not have prologue/epilogue
509   // (__tsan_func_entry/__tsan_func_exit) generated, so don't instrument them at
510   // all.
511   if (F.hasFnAttribute(Attribute::Naked))
512     return false;
513 
514   // __attribute__(disable_sanitizer_instrumentation) prevents all kinds of
515   // instrumentation.
516   if (F.hasFnAttribute(Attribute::DisableSanitizerInstrumentation))
517     return false;
518 
519   initialize(*F.getParent());
520   SmallVector<InstructionInfo, 8> AllLoadsAndStores;
521   SmallVector<Instruction*, 8> LocalLoadsAndStores;
522   SmallVector<Instruction*, 8> AtomicAccesses;
523   SmallVector<Instruction*, 8> MemIntrinCalls;
524   bool Res = false;
525   bool HasCalls = false;
526   bool SanitizeFunction = F.hasFnAttribute(Attribute::SanitizeThread);
527   const DataLayout &DL = F.getParent()->getDataLayout();
528 
529   // Traverse all instructions, collect loads/stores/returns, check for calls.
530   for (auto &BB : F) {
531     for (auto &Inst : BB) {
532       if (isTsanAtomic(&Inst))
533         AtomicAccesses.push_back(&Inst);
534       else if (isa<LoadInst>(Inst) || isa<StoreInst>(Inst))
535         LocalLoadsAndStores.push_back(&Inst);
536       else if ((isa<CallInst>(Inst) && !isa<DbgInfoIntrinsic>(Inst)) ||
537                isa<InvokeInst>(Inst)) {
538         if (CallInst *CI = dyn_cast<CallInst>(&Inst))
539           maybeMarkSanitizerLibraryCallNoBuiltin(CI, &TLI);
540         if (isa<MemIntrinsic>(Inst))
541           MemIntrinCalls.push_back(&Inst);
542         HasCalls = true;
543         chooseInstructionsToInstrument(LocalLoadsAndStores, AllLoadsAndStores,
544                                        DL);
545       }
546     }
547     chooseInstructionsToInstrument(LocalLoadsAndStores, AllLoadsAndStores, DL);
548   }
549 
550   // We have collected all loads and stores.
551   // FIXME: many of these accesses do not need to be checked for races
552   // (e.g. variables that do not escape, etc).
553 
554   // Instrument memory accesses only if we want to report bugs in the function.
555   if (ClInstrumentMemoryAccesses && SanitizeFunction)
556     for (const auto &II : AllLoadsAndStores) {
557       Res |= instrumentLoadOrStore(II, DL);
558     }
559 
560   // Instrument atomic memory accesses in any case (they can be used to
561   // implement synchronization).
562   if (ClInstrumentAtomics)
563     for (auto *Inst : AtomicAccesses) {
564       Res |= instrumentAtomic(Inst, DL);
565     }
566 
567   if (ClInstrumentMemIntrinsics && SanitizeFunction)
568     for (auto *Inst : MemIntrinCalls) {
569       Res |= instrumentMemIntrinsic(Inst);
570     }
571 
572   if (F.hasFnAttribute("sanitize_thread_no_checking_at_run_time")) {
573     assert(!F.hasFnAttribute(Attribute::SanitizeThread));
574     if (HasCalls)
575       InsertRuntimeIgnores(F);
576   }
577 
578   // Instrument function entry/exit points if there were instrumented accesses.
579   if ((Res || HasCalls) && ClInstrumentFuncEntryExit) {
580     InstrumentationIRBuilder IRB(F.getEntryBlock().getFirstNonPHI());
581     Value *ReturnAddress = IRB.CreateCall(
582         Intrinsic::getDeclaration(F.getParent(), Intrinsic::returnaddress),
583         IRB.getInt32(0));
584     IRB.CreateCall(TsanFuncEntry, ReturnAddress);
585 
586     EscapeEnumerator EE(F, "tsan_cleanup", ClHandleCxxExceptions);
587     while (IRBuilder<> *AtExit = EE.Next()) {
588       InstrumentationIRBuilder::ensureDebugInfo(*AtExit, F);
589       AtExit->CreateCall(TsanFuncExit, {});
590     }
591     Res = true;
592   }
593   return Res;
594 }
595 
596 bool ThreadSanitizer::instrumentLoadOrStore(const InstructionInfo &II,
597                                             const DataLayout &DL) {
598   InstrumentationIRBuilder IRB(II.Inst);
599   const bool IsWrite = isa<StoreInst>(*II.Inst);
600   Value *Addr = IsWrite ? cast<StoreInst>(II.Inst)->getPointerOperand()
601                         : cast<LoadInst>(II.Inst)->getPointerOperand();
602   Type *OrigTy = getLoadStoreType(II.Inst);
603 
604   // swifterror memory addresses are mem2reg promoted by instruction selection.
605   // As such they cannot have regular uses like an instrumentation function and
606   // it makes no sense to track them as memory.
607   if (Addr->isSwiftError())
608     return false;
609 
610   int Idx = getMemoryAccessFuncIndex(OrigTy, Addr, DL);
611   if (Idx < 0)
612     return false;
613   if (IsWrite && isVtableAccess(II.Inst)) {
614     LLVM_DEBUG(dbgs() << "  VPTR : " << *II.Inst << "\n");
615     Value *StoredValue = cast<StoreInst>(II.Inst)->getValueOperand();
616     // StoredValue may be a vector type if we are storing several vptrs at once.
617     // In this case, just take the first element of the vector since this is
618     // enough to find vptr races.
619     if (isa<VectorType>(StoredValue->getType()))
620       StoredValue = IRB.CreateExtractElement(
621           StoredValue, ConstantInt::get(IRB.getInt32Ty(), 0));
622     if (StoredValue->getType()->isIntegerTy())
623       StoredValue = IRB.CreateIntToPtr(StoredValue, IRB.getInt8PtrTy());
624     // Call TsanVptrUpdate.
625     IRB.CreateCall(TsanVptrUpdate,
626                    {IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()),
627                     IRB.CreatePointerCast(StoredValue, IRB.getInt8PtrTy())});
628     NumInstrumentedVtableWrites++;
629     return true;
630   }
631   if (!IsWrite && isVtableAccess(II.Inst)) {
632     IRB.CreateCall(TsanVptrLoad,
633                    IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()));
634     NumInstrumentedVtableReads++;
635     return true;
636   }
637 
638   const Align Alignment = IsWrite ? cast<StoreInst>(II.Inst)->getAlign()
639                                   : cast<LoadInst>(II.Inst)->getAlign();
640   const bool IsCompoundRW =
641       ClCompoundReadBeforeWrite && (II.Flags & InstructionInfo::kCompoundRW);
642   const bool IsVolatile = ClDistinguishVolatile &&
643                           (IsWrite ? cast<StoreInst>(II.Inst)->isVolatile()
644                                    : cast<LoadInst>(II.Inst)->isVolatile());
645   assert((!IsVolatile || !IsCompoundRW) && "Compound volatile invalid!");
646 
647   const uint32_t TypeSize = DL.getTypeStoreSizeInBits(OrigTy);
648   FunctionCallee OnAccessFunc = nullptr;
649   if (Alignment >= Align(8) || (Alignment.value() % (TypeSize / 8)) == 0) {
650     if (IsCompoundRW)
651       OnAccessFunc = TsanCompoundRW[Idx];
652     else if (IsVolatile)
653       OnAccessFunc = IsWrite ? TsanVolatileWrite[Idx] : TsanVolatileRead[Idx];
654     else
655       OnAccessFunc = IsWrite ? TsanWrite[Idx] : TsanRead[Idx];
656   } else {
657     if (IsCompoundRW)
658       OnAccessFunc = TsanUnalignedCompoundRW[Idx];
659     else if (IsVolatile)
660       OnAccessFunc = IsWrite ? TsanUnalignedVolatileWrite[Idx]
661                              : TsanUnalignedVolatileRead[Idx];
662     else
663       OnAccessFunc = IsWrite ? TsanUnalignedWrite[Idx] : TsanUnalignedRead[Idx];
664   }
665   IRB.CreateCall(OnAccessFunc, IRB.CreatePointerCast(Addr, IRB.getInt8PtrTy()));
666   if (IsCompoundRW || IsWrite)
667     NumInstrumentedWrites++;
668   if (IsCompoundRW || !IsWrite)
669     NumInstrumentedReads++;
670   return true;
671 }
672 
673 static ConstantInt *createOrdering(IRBuilder<> *IRB, AtomicOrdering ord) {
674   uint32_t v = 0;
675   switch (ord) {
676     case AtomicOrdering::NotAtomic:
677       llvm_unreachable("unexpected atomic ordering!");
678     case AtomicOrdering::Unordered:              [[fallthrough]];
679     case AtomicOrdering::Monotonic:              v = 0; break;
680     // Not specified yet:
681     // case AtomicOrdering::Consume:                v = 1; break;
682     case AtomicOrdering::Acquire:                v = 2; break;
683     case AtomicOrdering::Release:                v = 3; break;
684     case AtomicOrdering::AcquireRelease:         v = 4; break;
685     case AtomicOrdering::SequentiallyConsistent: v = 5; break;
686   }
687   return IRB->getInt32(v);
688 }
689 
690 // If a memset intrinsic gets inlined by the code gen, we will miss races on it.
691 // So, we either need to ensure the intrinsic is not inlined, or instrument it.
692 // We do not instrument memset/memmove/memcpy intrinsics (too complicated),
693 // instead we simply replace them with regular function calls, which are then
694 // intercepted by the run-time.
695 // Since tsan is running after everyone else, the calls should not be
696 // replaced back with intrinsics. If that becomes wrong at some point,
697 // we will need to call e.g. __tsan_memset to avoid the intrinsics.
698 bool ThreadSanitizer::instrumentMemIntrinsic(Instruction *I) {
699   IRBuilder<> IRB(I);
700   if (MemSetInst *M = dyn_cast<MemSetInst>(I)) {
701     IRB.CreateCall(
702         MemsetFn,
703         {IRB.CreatePointerCast(M->getArgOperand(0), IRB.getInt8PtrTy()),
704          IRB.CreateIntCast(M->getArgOperand(1), IRB.getInt32Ty(), false),
705          IRB.CreateIntCast(M->getArgOperand(2), IntptrTy, false)});
706     I->eraseFromParent();
707   } else if (MemTransferInst *M = dyn_cast<MemTransferInst>(I)) {
708     IRB.CreateCall(
709         isa<MemCpyInst>(M) ? MemcpyFn : MemmoveFn,
710         {IRB.CreatePointerCast(M->getArgOperand(0), IRB.getInt8PtrTy()),
711          IRB.CreatePointerCast(M->getArgOperand(1), IRB.getInt8PtrTy()),
712          IRB.CreateIntCast(M->getArgOperand(2), IntptrTy, false)});
713     I->eraseFromParent();
714   }
715   return false;
716 }
717 
718 // Both llvm and ThreadSanitizer atomic operations are based on C++11/C1x
719 // standards.  For background see C++11 standard.  A slightly older, publicly
720 // available draft of the standard (not entirely up-to-date, but close enough
721 // for casual browsing) is available here:
722 // http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2011/n3242.pdf
723 // The following page contains more background information:
724 // http://www.hpl.hp.com/personal/Hans_Boehm/c++mm/
725 
726 bool ThreadSanitizer::instrumentAtomic(Instruction *I, const DataLayout &DL) {
727   InstrumentationIRBuilder IRB(I);
728   if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
729     Value *Addr = LI->getPointerOperand();
730     Type *OrigTy = LI->getType();
731     int Idx = getMemoryAccessFuncIndex(OrigTy, Addr, DL);
732     if (Idx < 0)
733       return false;
734     const unsigned ByteSize = 1U << Idx;
735     const unsigned BitSize = ByteSize * 8;
736     Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
737     Type *PtrTy = Ty->getPointerTo();
738     Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
739                      createOrdering(&IRB, LI->getOrdering())};
740     Value *C = IRB.CreateCall(TsanAtomicLoad[Idx], Args);
741     Value *Cast = IRB.CreateBitOrPointerCast(C, OrigTy);
742     I->replaceAllUsesWith(Cast);
743   } else if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
744     Value *Addr = SI->getPointerOperand();
745     int Idx =
746         getMemoryAccessFuncIndex(SI->getValueOperand()->getType(), Addr, DL);
747     if (Idx < 0)
748       return false;
749     const unsigned ByteSize = 1U << Idx;
750     const unsigned BitSize = ByteSize * 8;
751     Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
752     Type *PtrTy = Ty->getPointerTo();
753     Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
754                      IRB.CreateBitOrPointerCast(SI->getValueOperand(), Ty),
755                      createOrdering(&IRB, SI->getOrdering())};
756     CallInst *C = CallInst::Create(TsanAtomicStore[Idx], Args);
757     ReplaceInstWithInst(I, C);
758   } else if (AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(I)) {
759     Value *Addr = RMWI->getPointerOperand();
760     int Idx =
761         getMemoryAccessFuncIndex(RMWI->getValOperand()->getType(), Addr, DL);
762     if (Idx < 0)
763       return false;
764     FunctionCallee F = TsanAtomicRMW[RMWI->getOperation()][Idx];
765     if (!F)
766       return false;
767     const unsigned ByteSize = 1U << Idx;
768     const unsigned BitSize = ByteSize * 8;
769     Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
770     Type *PtrTy = Ty->getPointerTo();
771     Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
772                      IRB.CreateIntCast(RMWI->getValOperand(), Ty, false),
773                      createOrdering(&IRB, RMWI->getOrdering())};
774     CallInst *C = CallInst::Create(F, Args);
775     ReplaceInstWithInst(I, C);
776   } else if (AtomicCmpXchgInst *CASI = dyn_cast<AtomicCmpXchgInst>(I)) {
777     Value *Addr = CASI->getPointerOperand();
778     Type *OrigOldValTy = CASI->getNewValOperand()->getType();
779     int Idx = getMemoryAccessFuncIndex(OrigOldValTy, Addr, DL);
780     if (Idx < 0)
781       return false;
782     const unsigned ByteSize = 1U << Idx;
783     const unsigned BitSize = ByteSize * 8;
784     Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
785     Type *PtrTy = Ty->getPointerTo();
786     Value *CmpOperand =
787       IRB.CreateBitOrPointerCast(CASI->getCompareOperand(), Ty);
788     Value *NewOperand =
789       IRB.CreateBitOrPointerCast(CASI->getNewValOperand(), Ty);
790     Value *Args[] = {IRB.CreatePointerCast(Addr, PtrTy),
791                      CmpOperand,
792                      NewOperand,
793                      createOrdering(&IRB, CASI->getSuccessOrdering()),
794                      createOrdering(&IRB, CASI->getFailureOrdering())};
795     CallInst *C = IRB.CreateCall(TsanAtomicCAS[Idx], Args);
796     Value *Success = IRB.CreateICmpEQ(C, CmpOperand);
797     Value *OldVal = C;
798     if (Ty != OrigOldValTy) {
799       // The value is a pointer, so we need to cast the return value.
800       OldVal = IRB.CreateIntToPtr(C, OrigOldValTy);
801     }
802 
803     Value *Res =
804       IRB.CreateInsertValue(PoisonValue::get(CASI->getType()), OldVal, 0);
805     Res = IRB.CreateInsertValue(Res, Success, 1);
806 
807     I->replaceAllUsesWith(Res);
808     I->eraseFromParent();
809   } else if (FenceInst *FI = dyn_cast<FenceInst>(I)) {
810     Value *Args[] = {createOrdering(&IRB, FI->getOrdering())};
811     FunctionCallee F = FI->getSyncScopeID() == SyncScope::SingleThread
812                            ? TsanAtomicSignalFence
813                            : TsanAtomicThreadFence;
814     CallInst *C = CallInst::Create(F, Args);
815     ReplaceInstWithInst(I, C);
816   }
817   return true;
818 }
819 
820 int ThreadSanitizer::getMemoryAccessFuncIndex(Type *OrigTy, Value *Addr,
821                                               const DataLayout &DL) {
822   assert(OrigTy->isSized());
823   assert(
824       cast<PointerType>(Addr->getType())->isOpaqueOrPointeeTypeMatches(OrigTy));
825   uint32_t TypeSize = DL.getTypeStoreSizeInBits(OrigTy);
826   if (TypeSize != 8  && TypeSize != 16 &&
827       TypeSize != 32 && TypeSize != 64 && TypeSize != 128) {
828     NumAccessesWithBadSize++;
829     // Ignore all unusual sizes.
830     return -1;
831   }
832   size_t Idx = countTrailingZeros(TypeSize / 8);
833   assert(Idx < kNumberOfAccessSizes);
834   return Idx;
835 }
836