1 //===-- WebAssemblyPeephole.cpp - WebAssembly Peephole Optimiztions -------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// 10 /// \file 11 /// \brief Late peephole optimizations for WebAssembly. 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" 16 #include "WebAssembly.h" 17 #include "WebAssemblyMachineFunctionInfo.h" 18 #include "WebAssemblySubtarget.h" 19 #include "llvm/Analysis/TargetLibraryInfo.h" 20 #include "llvm/CodeGen/MachineFunctionPass.h" 21 #include "llvm/CodeGen/MachineInstrBuilder.h" 22 #include "llvm/CodeGen/MachineRegisterInfo.h" 23 using namespace llvm; 24 25 #define DEBUG_TYPE "wasm-peephole" 26 27 static cl::opt<bool> DisableWebAssemblyFallthroughReturnOpt( 28 "disable-wasm-fallthrough-return-opt", cl::Hidden, 29 cl::desc("WebAssembly: Disable fallthrough-return optimizations."), 30 cl::init(false)); 31 32 namespace { 33 class WebAssemblyPeephole final : public MachineFunctionPass { 34 const char *getPassName() const override { 35 return "WebAssembly late peephole optimizer"; 36 } 37 38 void getAnalysisUsage(AnalysisUsage &AU) const override { 39 AU.setPreservesCFG(); 40 AU.addRequired<TargetLibraryInfoWrapperPass>(); 41 MachineFunctionPass::getAnalysisUsage(AU); 42 } 43 44 bool runOnMachineFunction(MachineFunction &MF) override; 45 46 public: 47 static char ID; 48 WebAssemblyPeephole() : MachineFunctionPass(ID) {} 49 }; 50 } // end anonymous namespace 51 52 char WebAssemblyPeephole::ID = 0; 53 FunctionPass *llvm::createWebAssemblyPeephole() { 54 return new WebAssemblyPeephole(); 55 } 56 57 /// If desirable, rewrite NewReg to a drop register. 58 static bool MaybeRewriteToDrop(unsigned OldReg, unsigned NewReg, 59 MachineOperand &MO, WebAssemblyFunctionInfo &MFI, 60 MachineRegisterInfo &MRI) { 61 bool Changed = false; 62 if (OldReg == NewReg) { 63 Changed = true; 64 unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); 65 MO.setReg(NewReg); 66 MO.setIsDead(); 67 MFI.stackifyVReg(NewReg); 68 } 69 return Changed; 70 } 71 72 static bool MaybeRewriteToFallthrough(MachineInstr &MI, MachineBasicBlock &MBB, 73 const MachineFunction &MF, 74 WebAssemblyFunctionInfo &MFI, 75 MachineRegisterInfo &MRI, 76 const WebAssemblyInstrInfo &TII, 77 unsigned FallthroughOpc, 78 unsigned CopyLocalOpc) { 79 if (DisableWebAssemblyFallthroughReturnOpt) 80 return false; 81 if (&MBB != &MF.back()) 82 return false; 83 if (&MI != &MBB.back()) 84 return false; 85 86 // If the operand isn't stackified, insert a COPY_LOCAL to read the operand 87 // and stackify it. 88 MachineOperand &MO = MI.getOperand(0); 89 unsigned Reg = MO.getReg(); 90 if (!MFI.isVRegStackified(Reg)) { 91 unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg)); 92 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(CopyLocalOpc), NewReg) 93 .addReg(Reg); 94 MO.setReg(NewReg); 95 MFI.stackifyVReg(NewReg); 96 } 97 98 // Rewrite the return. 99 MI.setDesc(TII.get(FallthroughOpc)); 100 return true; 101 } 102 103 bool WebAssemblyPeephole::runOnMachineFunction(MachineFunction &MF) { 104 DEBUG({ 105 dbgs() << "********** Peephole **********\n" 106 << "********** Function: " << MF.getName() << '\n'; 107 }); 108 109 MachineRegisterInfo &MRI = MF.getRegInfo(); 110 WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>(); 111 const auto &Subtarget = MF.getSubtarget<WebAssemblySubtarget>(); 112 const auto &TII = *Subtarget.getInstrInfo(); 113 const WebAssemblyTargetLowering &TLI = 114 *MF.getSubtarget<WebAssemblySubtarget>().getTargetLowering(); 115 auto &LibInfo = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI(); 116 bool Changed = false; 117 118 for (auto &MBB : MF) 119 for (auto &MI : MBB) 120 switch (MI.getOpcode()) { 121 default: 122 break; 123 case WebAssembly::STORE8_I32: 124 case WebAssembly::STORE16_I32: 125 case WebAssembly::STORE8_I64: 126 case WebAssembly::STORE16_I64: 127 case WebAssembly::STORE32_I64: 128 case WebAssembly::STORE_F32: 129 case WebAssembly::STORE_F64: 130 case WebAssembly::STORE_I32: 131 case WebAssembly::STORE_I64: { 132 // Store instructions return their value operand. If we ended up using 133 // the same register for both, replace it with a dead def so that it 134 // can use $drop instead. 135 MachineOperand &MO = MI.getOperand(0); 136 unsigned OldReg = MO.getReg(); 137 unsigned NewReg = 138 MI.getOperand(WebAssembly::StoreValueOperandNo).getReg(); 139 Changed |= MaybeRewriteToDrop(OldReg, NewReg, MO, MFI, MRI); 140 break; 141 } 142 case WebAssembly::CALL_I32: 143 case WebAssembly::CALL_I64: { 144 MachineOperand &Op1 = MI.getOperand(1); 145 if (Op1.isSymbol()) { 146 StringRef Name(Op1.getSymbolName()); 147 if (Name == TLI.getLibcallName(RTLIB::MEMCPY) || 148 Name == TLI.getLibcallName(RTLIB::MEMMOVE) || 149 Name == TLI.getLibcallName(RTLIB::MEMSET)) { 150 LibFunc::Func Func; 151 if (LibInfo.getLibFunc(Name, Func)) { 152 const auto &Op2 = MI.getOperand(2); 153 if (!Op2.isReg()) 154 report_fatal_error("Peephole: call to builtin function with " 155 "wrong signature, not consuming reg"); 156 MachineOperand &MO = MI.getOperand(0); 157 unsigned OldReg = MO.getReg(); 158 unsigned NewReg = Op2.getReg(); 159 160 if (MRI.getRegClass(NewReg) != MRI.getRegClass(OldReg)) 161 report_fatal_error("Peephole: call to builtin function with " 162 "wrong signature, from/to mismatch"); 163 Changed |= MaybeRewriteToDrop(OldReg, NewReg, MO, MFI, MRI); 164 } 165 } 166 } 167 break; 168 } 169 // Optimize away an explicit void return at the end of the function. 170 case WebAssembly::RETURN_I32: 171 Changed |= MaybeRewriteToFallthrough( 172 MI, MBB, MF, MFI, MRI, TII, WebAssembly::FALLTHROUGH_RETURN_I32, 173 WebAssembly::COPY_LOCAL_I32); 174 break; 175 case WebAssembly::RETURN_I64: 176 Changed |= MaybeRewriteToFallthrough( 177 MI, MBB, MF, MFI, MRI, TII, WebAssembly::FALLTHROUGH_RETURN_I64, 178 WebAssembly::COPY_LOCAL_I64); 179 break; 180 case WebAssembly::RETURN_F32: 181 Changed |= MaybeRewriteToFallthrough( 182 MI, MBB, MF, MFI, MRI, TII, WebAssembly::FALLTHROUGH_RETURN_F32, 183 WebAssembly::COPY_LOCAL_F32); 184 break; 185 case WebAssembly::RETURN_F64: 186 Changed |= MaybeRewriteToFallthrough( 187 MI, MBB, MF, MFI, MRI, TII, WebAssembly::FALLTHROUGH_RETURN_F64, 188 WebAssembly::COPY_LOCAL_F64); 189 break; 190 case WebAssembly::RETURN_v16i8: 191 Changed |= 192 Subtarget.hasSIMD128() && 193 MaybeRewriteToFallthrough(MI, MBB, MF, MFI, MRI, TII, 194 WebAssembly::FALLTHROUGH_RETURN_v16i8, 195 WebAssembly::COPY_LOCAL_V128); 196 break; 197 case WebAssembly::RETURN_v8i16: 198 Changed |= 199 Subtarget.hasSIMD128() && 200 MaybeRewriteToFallthrough(MI, MBB, MF, MFI, MRI, TII, 201 WebAssembly::FALLTHROUGH_RETURN_v8i16, 202 WebAssembly::COPY_LOCAL_V128); 203 break; 204 case WebAssembly::RETURN_v4i32: 205 Changed |= 206 Subtarget.hasSIMD128() && 207 MaybeRewriteToFallthrough(MI, MBB, MF, MFI, MRI, TII, 208 WebAssembly::FALLTHROUGH_RETURN_v4i32, 209 WebAssembly::COPY_LOCAL_V128); 210 break; 211 case WebAssembly::RETURN_v4f32: 212 Changed |= 213 Subtarget.hasSIMD128() && 214 MaybeRewriteToFallthrough(MI, MBB, MF, MFI, MRI, TII, 215 WebAssembly::FALLTHROUGH_RETURN_v4f32, 216 WebAssembly::COPY_LOCAL_V128); 217 break; 218 case WebAssembly::RETURN_VOID: 219 if (!DisableWebAssemblyFallthroughReturnOpt && 220 &MBB == &MF.back() && &MI == &MBB.back()) 221 MI.setDesc(TII.get(WebAssembly::FALLTHROUGH_RETURN_VOID)); 222 break; 223 } 224 225 return Changed; 226 } 227