xref: /llvm-project/llvm/lib/Target/TargetMachine.cpp (revision e94db67c4f68eb210fa2738fbcbd8cae9ac1216c)
1 //===-- TargetMachine.cpp - General Target Information ---------------------==//
2 //
3 // This file describes the general parts of a Target machine.
4 // This file also implements MachineInstrInfo and MachineCacheInfo.
5 //
6 //===----------------------------------------------------------------------===//
7 
8 #include "llvm/Target/TargetMachine.h"
9 #include "llvm/Target/MachineInstrInfo.h"
10 #include "llvm/Target/MachineCacheInfo.h"
11 #include "llvm/Function.h"
12 
13 //---------------------------------------------------------------------------
14 // class TargetMachine
15 //
16 // Purpose:
17 //   Machine description.
18 //
19 //---------------------------------------------------------------------------
20 
21 
22 // function TargetMachine::findOptimalStorageSize
23 //
24 // Purpose:
25 //   This default implementation assumes that all sub-word data items use
26 //   space equal to optSizeForSubWordData, and all other primitive data
27 //   items use space according to the type.
28 //
29 unsigned int
30 TargetMachine::findOptimalStorageSize(const Type* ty) const
31 {
32   switch(ty->getPrimitiveID())
33     {
34     case Type::BoolTyID:
35     case Type::UByteTyID:
36     case Type::SByteTyID:
37     case Type::UShortTyID:
38     case Type::ShortTyID:
39       return optSizeForSubWordData;
40 
41     default:
42       return DataLayout.getTypeSize(ty);
43     }
44 }
45 
46 
47 //---------------------------------------------------------------------------
48 // class MachineInstructionInfo
49 //	Interface to description of machine instructions
50 //---------------------------------------------------------------------------
51 
52 
53 /*ctor*/
54 MachineInstrInfo::MachineInstrInfo(const TargetMachine& tgt,
55                                    const MachineInstrDescriptor* _desc,
56 				   unsigned int _descSize,
57 				   unsigned int _numRealOpCodes)
58   : target(tgt),
59     desc(_desc), descSize(_descSize), numRealOpCodes(_numRealOpCodes)
60 {
61   // FIXME: TargetInstrDescriptors should not be global
62   assert(TargetInstrDescriptors == NULL && desc != NULL);
63   TargetInstrDescriptors = desc;	// initialize global variable
64 }
65 
66 
67 MachineInstrInfo::~MachineInstrInfo()
68 {
69   TargetInstrDescriptors = NULL;	// reset global variable
70 }
71 
72 
73 bool
74 MachineInstrInfo::constantFitsInImmedField(MachineOpCode opCode,
75 					   int64_t intValue) const
76 {
77   // First, check if opCode has an immed field.
78   bool isSignExtended;
79   uint64_t maxImmedValue = maxImmedConstant(opCode, isSignExtended);
80   if (maxImmedValue != 0)
81     {
82       // NEED TO HANDLE UNSIGNED VALUES SINCE THEY MAY BECOME MUCH
83       // SMALLER AFTER CASTING TO SIGN-EXTENDED int, short, or char.
84       // See CreateUIntSetInstruction in SparcInstrInfo.cpp.
85 
86       // Now check if the constant fits
87       if (intValue <= (int64_t) maxImmedValue &&
88 	  intValue >= -((int64_t) maxImmedValue+1))
89 	return true;
90     }
91 
92   return false;
93 }
94 
95 
96 //---------------------------------------------------------------------------
97 // class MachineCacheInfo
98 //
99 // Purpose:
100 //   Describes properties of the target cache architecture.
101 //---------------------------------------------------------------------------
102 
103 /*ctor*/
104 MachineCacheInfo::MachineCacheInfo(const TargetMachine& tgt)
105   : target(tgt)
106 {
107   Initialize();
108 }
109 
110 void
111 MachineCacheInfo::Initialize()
112 {
113   numLevels = 2;
114   cacheLineSizes.push_back(16);  cacheLineSizes.push_back(32);
115   cacheSizes.push_back(1 << 15); cacheSizes.push_back(1 << 20);
116   cacheAssoc.push_back(1);       cacheAssoc.push_back(4);
117 }
118