xref: /llvm-project/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp (revision 4a37799a489d80e505e3e20722570c47673476be) 
1 //===-- SystemZAsmPrinter.cpp - SystemZ LLVM assembly printer -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Streams SystemZ assembly language and associated data, in the form of
10 // MCInsts and MCExprs respectively.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "SystemZAsmPrinter.h"
15 #include "MCTargetDesc/SystemZGNUInstPrinter.h"
16 #include "MCTargetDesc/SystemZHLASMInstPrinter.h"
17 #include "MCTargetDesc/SystemZMCExpr.h"
18 #include "MCTargetDesc/SystemZMCTargetDesc.h"
19 #include "SystemZConstantPoolValue.h"
20 #include "SystemZMCInstLower.h"
21 #include "TargetInfo/SystemZTargetInfo.h"
22 #include "llvm/ADT/StringExtras.h"
23 #include "llvm/BinaryFormat/ELF.h"
24 #include "llvm/CodeGen/MachineModuleInfoImpls.h"
25 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
26 #include "llvm/IR/Mangler.h"
27 #include "llvm/IR/Module.h"
28 #include "llvm/MC/MCExpr.h"
29 #include "llvm/MC/MCInstBuilder.h"
30 #include "llvm/MC/MCSectionELF.h"
31 #include "llvm/MC/MCStreamer.h"
32 #include "llvm/MC/TargetRegistry.h"
33 #include "llvm/Support/Chrono.h"
34 #include "llvm/Support/ConvertEBCDIC.h"
35 #include "llvm/Support/FormatProviders.h"
36 #include "llvm/Support/FormatVariadic.h"
37 
38 using namespace llvm;
39 
40 // Return an RI instruction like MI with opcode Opcode, but with the
41 // GR64 register operands turned into GR32s.
42 static MCInst lowerRILow(const MachineInstr *MI, unsigned Opcode) {
43   if (MI->isCompare())
44     return MCInstBuilder(Opcode)
45       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))
46       .addImm(MI->getOperand(1).getImm());
47   else
48     return MCInstBuilder(Opcode)
49       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))
50       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(1).getReg()))
51       .addImm(MI->getOperand(2).getImm());
52 }
53 
54 // Return an RI instruction like MI with opcode Opcode, but with the
55 // GR64 register operands turned into GRH32s.
56 static MCInst lowerRIHigh(const MachineInstr *MI, unsigned Opcode) {
57   if (MI->isCompare())
58     return MCInstBuilder(Opcode)
59       .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))
60       .addImm(MI->getOperand(1).getImm());
61   else
62     return MCInstBuilder(Opcode)
63       .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))
64       .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(1).getReg()))
65       .addImm(MI->getOperand(2).getImm());
66 }
67 
68 // Return an RI instruction like MI with opcode Opcode, but with the
69 // R2 register turned into a GR64.
70 static MCInst lowerRIEfLow(const MachineInstr *MI, unsigned Opcode) {
71   return MCInstBuilder(Opcode)
72     .addReg(MI->getOperand(0).getReg())
73     .addReg(MI->getOperand(1).getReg())
74     .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg()))
75     .addImm(MI->getOperand(3).getImm())
76     .addImm(MI->getOperand(4).getImm())
77     .addImm(MI->getOperand(5).getImm());
78 }
79 
80 static const MCSymbolRefExpr *getTLSGetOffset(MCContext &Context) {
81   StringRef Name = "__tls_get_offset";
82   return MCSymbolRefExpr::create(Context.getOrCreateSymbol(Name),
83                                  MCSymbolRefExpr::VK_PLT,
84                                  Context);
85 }
86 
87 static const MCSymbolRefExpr *getGlobalOffsetTable(MCContext &Context) {
88   StringRef Name = "_GLOBAL_OFFSET_TABLE_";
89   return MCSymbolRefExpr::create(Context.getOrCreateSymbol(Name),
90                                  MCSymbolRefExpr::VK_None,
91                                  Context);
92 }
93 
94 // MI is an instruction that accepts an optional alignment hint,
95 // and which was already lowered to LoweredMI.  If the alignment
96 // of the original memory operand is known, update LoweredMI to
97 // an instruction with the corresponding hint set.
98 static void lowerAlignmentHint(const MachineInstr *MI, MCInst &LoweredMI,
99                                unsigned Opcode) {
100   if (MI->memoperands_empty())
101     return;
102 
103   Align Alignment = Align(16);
104   for (MachineInstr::mmo_iterator MMOI = MI->memoperands_begin(),
105          EE = MI->memoperands_end(); MMOI != EE; ++MMOI)
106     if ((*MMOI)->getAlign() < Alignment)
107       Alignment = (*MMOI)->getAlign();
108 
109   unsigned AlignmentHint = 0;
110   if (Alignment >= Align(16))
111     AlignmentHint = 4;
112   else if (Alignment >= Align(8))
113     AlignmentHint = 3;
114   if (AlignmentHint == 0)
115     return;
116 
117   LoweredMI.setOpcode(Opcode);
118   LoweredMI.addOperand(MCOperand::createImm(AlignmentHint));
119 }
120 
121 // MI loads the high part of a vector from memory.  Return an instruction
122 // that uses replicating vector load Opcode to do the same thing.
123 static MCInst lowerSubvectorLoad(const MachineInstr *MI, unsigned Opcode) {
124   return MCInstBuilder(Opcode)
125     .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
126     .addReg(MI->getOperand(1).getReg())
127     .addImm(MI->getOperand(2).getImm())
128     .addReg(MI->getOperand(3).getReg());
129 }
130 
131 // MI stores the high part of a vector to memory.  Return an instruction
132 // that uses elemental vector store Opcode to do the same thing.
133 static MCInst lowerSubvectorStore(const MachineInstr *MI, unsigned Opcode) {
134   return MCInstBuilder(Opcode)
135     .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
136     .addReg(MI->getOperand(1).getReg())
137     .addImm(MI->getOperand(2).getImm())
138     .addReg(MI->getOperand(3).getReg())
139     .addImm(0);
140 }
141 
142 // The XPLINK ABI requires that a no-op encoding the call type is emitted after
143 // each call to a subroutine. This information can be used by the called
144 // function to determine its entry point, e.g. for generating a backtrace. The
145 // call type is encoded as a register number in the bcr instruction. See
146 // enumeration CallType for the possible values.
147 void SystemZAsmPrinter::emitCallInformation(CallType CT) {
148   EmitToStreamer(*OutStreamer,
149                  MCInstBuilder(SystemZ::BCRAsm)
150                      .addImm(0)
151                      .addReg(SystemZMC::GR64Regs[static_cast<unsigned>(CT)]));
152 }
153 
154 uint32_t SystemZAsmPrinter::AssociatedDataAreaTable::insert(const MCSymbol *Sym,
155                                                             unsigned SlotKind) {
156   auto Key = std::make_pair(Sym, SlotKind);
157   auto It = Displacements.find(Key);
158 
159   if (It != Displacements.end())
160     return (*It).second;
161 
162   // Determine length of descriptor.
163   uint32_t Length;
164   switch (SlotKind) {
165   case SystemZII::MO_ADA_DIRECT_FUNC_DESC:
166     Length = 2 * PointerSize;
167     break;
168   default:
169     Length = PointerSize;
170     break;
171   }
172 
173   uint32_t Displacement = NextDisplacement;
174   Displacements[std::make_pair(Sym, SlotKind)] = NextDisplacement;
175   NextDisplacement += Length;
176 
177   return Displacement;
178 }
179 
180 uint32_t
181 SystemZAsmPrinter::AssociatedDataAreaTable::insert(const MachineOperand MO) {
182   MCSymbol *Sym;
183   if (MO.getType() == MachineOperand::MO_GlobalAddress) {
184     const GlobalValue *GV = MO.getGlobal();
185     Sym = MO.getParent()->getMF()->getTarget().getSymbol(GV);
186     assert(Sym && "No symbol");
187   } else if (MO.getType() == MachineOperand::MO_ExternalSymbol) {
188     const char *SymName = MO.getSymbolName();
189     Sym = MO.getParent()->getMF()->getContext().getOrCreateSymbol(SymName);
190     assert(Sym && "No symbol");
191   } else
192     llvm_unreachable("Unexpected operand type");
193 
194   unsigned ADAslotType = MO.getTargetFlags();
195   return insert(Sym, ADAslotType);
196 }
197 
198 void SystemZAsmPrinter::emitInstruction(const MachineInstr *MI) {
199   SystemZ_MC::verifyInstructionPredicates(MI->getOpcode(),
200                                           getSubtargetInfo().getFeatureBits());
201 
202   SystemZMCInstLower Lower(MF->getContext(), *this);
203   MCInst LoweredMI;
204   switch (MI->getOpcode()) {
205   case SystemZ::Return:
206     LoweredMI = MCInstBuilder(SystemZ::BR)
207       .addReg(SystemZ::R14D);
208     break;
209 
210   case SystemZ::Return_XPLINK:
211     LoweredMI = MCInstBuilder(SystemZ::B)
212       .addReg(SystemZ::R7D)
213       .addImm(2)
214       .addReg(0);
215     break;
216 
217   case SystemZ::CondReturn:
218     LoweredMI = MCInstBuilder(SystemZ::BCR)
219       .addImm(MI->getOperand(0).getImm())
220       .addImm(MI->getOperand(1).getImm())
221       .addReg(SystemZ::R14D);
222     break;
223 
224   case SystemZ::CondReturn_XPLINK:
225     LoweredMI = MCInstBuilder(SystemZ::BC)
226       .addImm(MI->getOperand(0).getImm())
227       .addImm(MI->getOperand(1).getImm())
228       .addReg(SystemZ::R7D)
229       .addImm(2)
230       .addReg(0);
231     break;
232 
233   case SystemZ::CRBReturn:
234     LoweredMI = MCInstBuilder(SystemZ::CRB)
235       .addReg(MI->getOperand(0).getReg())
236       .addReg(MI->getOperand(1).getReg())
237       .addImm(MI->getOperand(2).getImm())
238       .addReg(SystemZ::R14D)
239       .addImm(0);
240     break;
241 
242   case SystemZ::CGRBReturn:
243     LoweredMI = MCInstBuilder(SystemZ::CGRB)
244       .addReg(MI->getOperand(0).getReg())
245       .addReg(MI->getOperand(1).getReg())
246       .addImm(MI->getOperand(2).getImm())
247       .addReg(SystemZ::R14D)
248       .addImm(0);
249     break;
250 
251   case SystemZ::CIBReturn:
252     LoweredMI = MCInstBuilder(SystemZ::CIB)
253       .addReg(MI->getOperand(0).getReg())
254       .addImm(MI->getOperand(1).getImm())
255       .addImm(MI->getOperand(2).getImm())
256       .addReg(SystemZ::R14D)
257       .addImm(0);
258     break;
259 
260   case SystemZ::CGIBReturn:
261     LoweredMI = MCInstBuilder(SystemZ::CGIB)
262       .addReg(MI->getOperand(0).getReg())
263       .addImm(MI->getOperand(1).getImm())
264       .addImm(MI->getOperand(2).getImm())
265       .addReg(SystemZ::R14D)
266       .addImm(0);
267     break;
268 
269   case SystemZ::CLRBReturn:
270     LoweredMI = MCInstBuilder(SystemZ::CLRB)
271       .addReg(MI->getOperand(0).getReg())
272       .addReg(MI->getOperand(1).getReg())
273       .addImm(MI->getOperand(2).getImm())
274       .addReg(SystemZ::R14D)
275       .addImm(0);
276     break;
277 
278   case SystemZ::CLGRBReturn:
279     LoweredMI = MCInstBuilder(SystemZ::CLGRB)
280       .addReg(MI->getOperand(0).getReg())
281       .addReg(MI->getOperand(1).getReg())
282       .addImm(MI->getOperand(2).getImm())
283       .addReg(SystemZ::R14D)
284       .addImm(0);
285     break;
286 
287   case SystemZ::CLIBReturn:
288     LoweredMI = MCInstBuilder(SystemZ::CLIB)
289       .addReg(MI->getOperand(0).getReg())
290       .addImm(MI->getOperand(1).getImm())
291       .addImm(MI->getOperand(2).getImm())
292       .addReg(SystemZ::R14D)
293       .addImm(0);
294     break;
295 
296   case SystemZ::CLGIBReturn:
297     LoweredMI = MCInstBuilder(SystemZ::CLGIB)
298       .addReg(MI->getOperand(0).getReg())
299       .addImm(MI->getOperand(1).getImm())
300       .addImm(MI->getOperand(2).getImm())
301       .addReg(SystemZ::R14D)
302       .addImm(0);
303     break;
304 
305   case SystemZ::CallBRASL_XPLINK64:
306     EmitToStreamer(*OutStreamer,
307                    MCInstBuilder(SystemZ::BRASL)
308                        .addReg(SystemZ::R7D)
309                        .addExpr(Lower.getExpr(MI->getOperand(0),
310                                               MCSymbolRefExpr::VK_PLT)));
311     emitCallInformation(CallType::BRASL7);
312     return;
313 
314   case SystemZ::CallBASR_XPLINK64:
315     EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::BASR)
316                                      .addReg(SystemZ::R7D)
317                                      .addReg(MI->getOperand(0).getReg()));
318     emitCallInformation(CallType::BASR76);
319     return;
320 
321   case SystemZ::CallBASR_STACKEXT:
322     EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::BASR)
323                                      .addReg(SystemZ::R3D)
324                                      .addReg(MI->getOperand(0).getReg()));
325     emitCallInformation(CallType::BASR33);
326     return;
327 
328   case SystemZ::ADA_ENTRY_VALUE:
329   case SystemZ::ADA_ENTRY: {
330     const SystemZSubtarget &Subtarget = MF->getSubtarget<SystemZSubtarget>();
331     const SystemZInstrInfo *TII = Subtarget.getInstrInfo();
332     uint32_t Disp = ADATable.insert(MI->getOperand(1));
333     Register TargetReg = MI->getOperand(0).getReg();
334 
335     Register ADAReg = MI->getOperand(2).getReg();
336     Disp += MI->getOperand(3).getImm();
337     bool LoadAddr = MI->getOpcode() == SystemZ::ADA_ENTRY;
338 
339     unsigned Op0 = LoadAddr ? SystemZ::LA : SystemZ::LG;
340     unsigned Op = TII->getOpcodeForOffset(Op0, Disp);
341 
342     Register IndexReg = 0;
343     if (!Op) {
344       if (TargetReg != ADAReg) {
345         IndexReg = TargetReg;
346         // Use TargetReg to store displacement.
347         EmitToStreamer(
348             *OutStreamer,
349             MCInstBuilder(SystemZ::LLILF).addReg(TargetReg).addImm(Disp));
350       } else
351         EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::ALGFI)
352                                          .addReg(TargetReg)
353                                          .addReg(TargetReg)
354                                          .addImm(Disp));
355       Disp = 0;
356       Op = Op0;
357     }
358     EmitToStreamer(*OutStreamer, MCInstBuilder(Op)
359                                      .addReg(TargetReg)
360                                      .addReg(ADAReg)
361                                      .addImm(Disp)
362                                      .addReg(IndexReg));
363 
364     return;
365   }
366   case SystemZ::CallBRASL:
367     LoweredMI = MCInstBuilder(SystemZ::BRASL)
368       .addReg(SystemZ::R14D)
369       .addExpr(Lower.getExpr(MI->getOperand(0), MCSymbolRefExpr::VK_PLT));
370     break;
371 
372   case SystemZ::CallBASR:
373     LoweredMI = MCInstBuilder(SystemZ::BASR)
374       .addReg(SystemZ::R14D)
375       .addReg(MI->getOperand(0).getReg());
376     break;
377 
378   case SystemZ::CallJG:
379     LoweredMI = MCInstBuilder(SystemZ::JG)
380       .addExpr(Lower.getExpr(MI->getOperand(0), MCSymbolRefExpr::VK_PLT));
381     break;
382 
383   case SystemZ::CallBRCL:
384     LoweredMI = MCInstBuilder(SystemZ::BRCL)
385       .addImm(MI->getOperand(0).getImm())
386       .addImm(MI->getOperand(1).getImm())
387       .addExpr(Lower.getExpr(MI->getOperand(2), MCSymbolRefExpr::VK_PLT));
388     break;
389 
390   case SystemZ::CallBR:
391     LoweredMI = MCInstBuilder(SystemZ::BR)
392       .addReg(MI->getOperand(0).getReg());
393     break;
394 
395   case SystemZ::CallBCR:
396     LoweredMI = MCInstBuilder(SystemZ::BCR)
397       .addImm(MI->getOperand(0).getImm())
398       .addImm(MI->getOperand(1).getImm())
399       .addReg(MI->getOperand(2).getReg());
400     break;
401 
402   case SystemZ::CRBCall:
403     LoweredMI = MCInstBuilder(SystemZ::CRB)
404       .addReg(MI->getOperand(0).getReg())
405       .addReg(MI->getOperand(1).getReg())
406       .addImm(MI->getOperand(2).getImm())
407       .addReg(MI->getOperand(3).getReg())
408       .addImm(0);
409     break;
410 
411   case SystemZ::CGRBCall:
412     LoweredMI = MCInstBuilder(SystemZ::CGRB)
413       .addReg(MI->getOperand(0).getReg())
414       .addReg(MI->getOperand(1).getReg())
415       .addImm(MI->getOperand(2).getImm())
416       .addReg(MI->getOperand(3).getReg())
417       .addImm(0);
418     break;
419 
420   case SystemZ::CIBCall:
421     LoweredMI = MCInstBuilder(SystemZ::CIB)
422       .addReg(MI->getOperand(0).getReg())
423       .addImm(MI->getOperand(1).getImm())
424       .addImm(MI->getOperand(2).getImm())
425       .addReg(MI->getOperand(3).getReg())
426       .addImm(0);
427     break;
428 
429   case SystemZ::CGIBCall:
430     LoweredMI = MCInstBuilder(SystemZ::CGIB)
431       .addReg(MI->getOperand(0).getReg())
432       .addImm(MI->getOperand(1).getImm())
433       .addImm(MI->getOperand(2).getImm())
434       .addReg(MI->getOperand(3).getReg())
435       .addImm(0);
436     break;
437 
438   case SystemZ::CLRBCall:
439     LoweredMI = MCInstBuilder(SystemZ::CLRB)
440       .addReg(MI->getOperand(0).getReg())
441       .addReg(MI->getOperand(1).getReg())
442       .addImm(MI->getOperand(2).getImm())
443       .addReg(MI->getOperand(3).getReg())
444       .addImm(0);
445     break;
446 
447   case SystemZ::CLGRBCall:
448     LoweredMI = MCInstBuilder(SystemZ::CLGRB)
449       .addReg(MI->getOperand(0).getReg())
450       .addReg(MI->getOperand(1).getReg())
451       .addImm(MI->getOperand(2).getImm())
452       .addReg(MI->getOperand(3).getReg())
453       .addImm(0);
454     break;
455 
456   case SystemZ::CLIBCall:
457     LoweredMI = MCInstBuilder(SystemZ::CLIB)
458       .addReg(MI->getOperand(0).getReg())
459       .addImm(MI->getOperand(1).getImm())
460       .addImm(MI->getOperand(2).getImm())
461       .addReg(MI->getOperand(3).getReg())
462       .addImm(0);
463     break;
464 
465   case SystemZ::CLGIBCall:
466     LoweredMI = MCInstBuilder(SystemZ::CLGIB)
467       .addReg(MI->getOperand(0).getReg())
468       .addImm(MI->getOperand(1).getImm())
469       .addImm(MI->getOperand(2).getImm())
470       .addReg(MI->getOperand(3).getReg())
471       .addImm(0);
472     break;
473 
474   case SystemZ::TLS_GDCALL:
475     LoweredMI = MCInstBuilder(SystemZ::BRASL)
476       .addReg(SystemZ::R14D)
477       .addExpr(getTLSGetOffset(MF->getContext()))
478       .addExpr(Lower.getExpr(MI->getOperand(0), MCSymbolRefExpr::VK_TLSGD));
479     break;
480 
481   case SystemZ::TLS_LDCALL:
482     LoweredMI = MCInstBuilder(SystemZ::BRASL)
483       .addReg(SystemZ::R14D)
484       .addExpr(getTLSGetOffset(MF->getContext()))
485       .addExpr(Lower.getExpr(MI->getOperand(0), MCSymbolRefExpr::VK_TLSLDM));
486     break;
487 
488   case SystemZ::GOT:
489     LoweredMI = MCInstBuilder(SystemZ::LARL)
490       .addReg(MI->getOperand(0).getReg())
491       .addExpr(getGlobalOffsetTable(MF->getContext()));
492     break;
493 
494   case SystemZ::IILF64:
495     LoweredMI = MCInstBuilder(SystemZ::IILF)
496       .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))
497       .addImm(MI->getOperand(2).getImm());
498     break;
499 
500   case SystemZ::IIHF64:
501     LoweredMI = MCInstBuilder(SystemZ::IIHF)
502       .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))
503       .addImm(MI->getOperand(2).getImm());
504     break;
505 
506   case SystemZ::RISBHH:
507   case SystemZ::RISBHL:
508     LoweredMI = lowerRIEfLow(MI, SystemZ::RISBHG);
509     break;
510 
511   case SystemZ::RISBLH:
512   case SystemZ::RISBLL:
513     LoweredMI = lowerRIEfLow(MI, SystemZ::RISBLG);
514     break;
515 
516   case SystemZ::VLVGP32:
517     LoweredMI = MCInstBuilder(SystemZ::VLVGP)
518       .addReg(MI->getOperand(0).getReg())
519       .addReg(SystemZMC::getRegAsGR64(MI->getOperand(1).getReg()))
520       .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg()));
521     break;
522 
523   case SystemZ::VLR32:
524   case SystemZ::VLR64:
525     LoweredMI = MCInstBuilder(SystemZ::VLR)
526       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
527       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(1).getReg()));
528     break;
529 
530   case SystemZ::VL:
531     Lower.lower(MI, LoweredMI);
532     lowerAlignmentHint(MI, LoweredMI, SystemZ::VLAlign);
533     break;
534 
535   case SystemZ::VST:
536     Lower.lower(MI, LoweredMI);
537     lowerAlignmentHint(MI, LoweredMI, SystemZ::VSTAlign);
538     break;
539 
540   case SystemZ::VLM:
541     Lower.lower(MI, LoweredMI);
542     lowerAlignmentHint(MI, LoweredMI, SystemZ::VLMAlign);
543     break;
544 
545   case SystemZ::VSTM:
546     Lower.lower(MI, LoweredMI);
547     lowerAlignmentHint(MI, LoweredMI, SystemZ::VSTMAlign);
548     break;
549 
550   case SystemZ::VL32:
551     LoweredMI = lowerSubvectorLoad(MI, SystemZ::VLREPF);
552     break;
553 
554   case SystemZ::VL64:
555     LoweredMI = lowerSubvectorLoad(MI, SystemZ::VLREPG);
556     break;
557 
558   case SystemZ::VST32:
559     LoweredMI = lowerSubvectorStore(MI, SystemZ::VSTEF);
560     break;
561 
562   case SystemZ::VST64:
563     LoweredMI = lowerSubvectorStore(MI, SystemZ::VSTEG);
564     break;
565 
566   case SystemZ::LFER:
567     LoweredMI = MCInstBuilder(SystemZ::VLGVF)
568       .addReg(SystemZMC::getRegAsGR64(MI->getOperand(0).getReg()))
569       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(1).getReg()))
570       .addReg(0).addImm(0);
571     break;
572 
573   case SystemZ::LEFR:
574     LoweredMI = MCInstBuilder(SystemZ::VLVGF)
575       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
576       .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
577       .addReg(MI->getOperand(1).getReg())
578       .addReg(0).addImm(0);
579     break;
580 
581 #define LOWER_LOW(NAME)                                                 \
582   case SystemZ::NAME##64: LoweredMI = lowerRILow(MI, SystemZ::NAME); break
583 
584   LOWER_LOW(IILL);
585   LOWER_LOW(IILH);
586   LOWER_LOW(TMLL);
587   LOWER_LOW(TMLH);
588   LOWER_LOW(NILL);
589   LOWER_LOW(NILH);
590   LOWER_LOW(NILF);
591   LOWER_LOW(OILL);
592   LOWER_LOW(OILH);
593   LOWER_LOW(OILF);
594   LOWER_LOW(XILF);
595 
596 #undef LOWER_LOW
597 
598 #define LOWER_HIGH(NAME) \
599   case SystemZ::NAME##64: LoweredMI = lowerRIHigh(MI, SystemZ::NAME); break
600 
601   LOWER_HIGH(IIHL);
602   LOWER_HIGH(IIHH);
603   LOWER_HIGH(TMHL);
604   LOWER_HIGH(TMHH);
605   LOWER_HIGH(NIHL);
606   LOWER_HIGH(NIHH);
607   LOWER_HIGH(NIHF);
608   LOWER_HIGH(OIHL);
609   LOWER_HIGH(OIHH);
610   LOWER_HIGH(OIHF);
611   LOWER_HIGH(XIHF);
612 
613 #undef LOWER_HIGH
614 
615   case SystemZ::Serialize:
616     if (MF->getSubtarget<SystemZSubtarget>().hasFastSerialization())
617       LoweredMI = MCInstBuilder(SystemZ::BCRAsm)
618         .addImm(14).addReg(SystemZ::R0D);
619     else
620       LoweredMI = MCInstBuilder(SystemZ::BCRAsm)
621         .addImm(15).addReg(SystemZ::R0D);
622     break;
623 
624   // We want to emit "j .+2" for traps, jumping to the relative immediate field
625   // of the jump instruction, which is an illegal instruction. We cannot emit a
626   // "." symbol, so create and emit a temp label before the instruction and use
627   // that instead.
628   case SystemZ::Trap: {
629     MCSymbol *DotSym = OutContext.createTempSymbol();
630     OutStreamer->emitLabel(DotSym);
631 
632     const MCSymbolRefExpr *Expr = MCSymbolRefExpr::create(DotSym, OutContext);
633     const MCConstantExpr *ConstExpr = MCConstantExpr::create(2, OutContext);
634     LoweredMI = MCInstBuilder(SystemZ::J)
635       .addExpr(MCBinaryExpr::createAdd(Expr, ConstExpr, OutContext));
636     }
637     break;
638 
639   // Conditional traps will create a branch on condition instruction that jumps
640   // to the relative immediate field of the jump instruction. (eg. "jo .+2")
641   case SystemZ::CondTrap: {
642     MCSymbol *DotSym = OutContext.createTempSymbol();
643     OutStreamer->emitLabel(DotSym);
644 
645     const MCSymbolRefExpr *Expr = MCSymbolRefExpr::create(DotSym, OutContext);
646     const MCConstantExpr *ConstExpr = MCConstantExpr::create(2, OutContext);
647     LoweredMI = MCInstBuilder(SystemZ::BRC)
648       .addImm(MI->getOperand(0).getImm())
649       .addImm(MI->getOperand(1).getImm())
650       .addExpr(MCBinaryExpr::createAdd(Expr, ConstExpr, OutContext));
651     }
652     break;
653 
654   case TargetOpcode::FENTRY_CALL:
655     LowerFENTRY_CALL(*MI, Lower);
656     return;
657 
658   case TargetOpcode::STACKMAP:
659     LowerSTACKMAP(*MI);
660     return;
661 
662   case TargetOpcode::PATCHPOINT:
663     LowerPATCHPOINT(*MI, Lower);
664     return;
665 
666   case TargetOpcode::PATCHABLE_FUNCTION_ENTER:
667     LowerPATCHABLE_FUNCTION_ENTER(*MI, Lower);
668     return;
669 
670   case TargetOpcode::PATCHABLE_RET:
671     LowerPATCHABLE_RET(*MI, Lower);
672     return;
673 
674   case TargetOpcode::PATCHABLE_FUNCTION_EXIT:
675     llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted");
676 
677   case TargetOpcode::PATCHABLE_TAIL_CALL:
678     // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a
679     // normal function exit from a tail exit.
680     llvm_unreachable("Tail call is handled in the normal case. See comments "
681                      "around this assert.");
682 
683   case SystemZ::EXRL_Pseudo: {
684     unsigned TargetInsOpc = MI->getOperand(0).getImm();
685     Register LenMinus1Reg = MI->getOperand(1).getReg();
686     Register DestReg = MI->getOperand(2).getReg();
687     int64_t DestDisp = MI->getOperand(3).getImm();
688     Register SrcReg = MI->getOperand(4).getReg();
689     int64_t SrcDisp = MI->getOperand(5).getImm();
690 
691     SystemZTargetStreamer *TS = getTargetStreamer();
692     MCSymbol *DotSym = nullptr;
693     MCInst ET = MCInstBuilder(TargetInsOpc).addReg(DestReg)
694       .addImm(DestDisp).addImm(1).addReg(SrcReg).addImm(SrcDisp);
695     SystemZTargetStreamer::MCInstSTIPair ET_STI(ET, &MF->getSubtarget());
696     SystemZTargetStreamer::EXRLT2SymMap::iterator I =
697         TS->EXRLTargets2Sym.find(ET_STI);
698     if (I != TS->EXRLTargets2Sym.end())
699       DotSym = I->second;
700     else
701       TS->EXRLTargets2Sym[ET_STI] = DotSym = OutContext.createTempSymbol();
702     const MCSymbolRefExpr *Dot = MCSymbolRefExpr::create(DotSym, OutContext);
703     EmitToStreamer(
704         *OutStreamer,
705         MCInstBuilder(SystemZ::EXRL).addReg(LenMinus1Reg).addExpr(Dot));
706     return;
707   }
708 
709   default:
710     Lower.lower(MI, LoweredMI);
711     break;
712   }
713   EmitToStreamer(*OutStreamer, LoweredMI);
714 }
715 
716 // Emit the largest nop instruction smaller than or equal to NumBytes
717 // bytes.  Return the size of nop emitted.
718 static unsigned EmitNop(MCContext &OutContext, MCStreamer &OutStreamer,
719                         unsigned NumBytes, const MCSubtargetInfo &STI) {
720   if (NumBytes < 2) {
721     llvm_unreachable("Zero nops?");
722     return 0;
723   }
724   else if (NumBytes < 4) {
725     OutStreamer.emitInstruction(
726         MCInstBuilder(SystemZ::BCRAsm).addImm(0).addReg(SystemZ::R0D), STI);
727     return 2;
728   }
729   else if (NumBytes < 6) {
730     OutStreamer.emitInstruction(
731         MCInstBuilder(SystemZ::BCAsm).addImm(0).addReg(0).addImm(0).addReg(0),
732         STI);
733     return 4;
734   }
735   else {
736     MCSymbol *DotSym = OutContext.createTempSymbol();
737     const MCSymbolRefExpr *Dot = MCSymbolRefExpr::create(DotSym, OutContext);
738     OutStreamer.emitLabel(DotSym);
739     OutStreamer.emitInstruction(
740         MCInstBuilder(SystemZ::BRCLAsm).addImm(0).addExpr(Dot), STI);
741     return 6;
742   }
743 }
744 
745 void SystemZAsmPrinter::LowerFENTRY_CALL(const MachineInstr &MI,
746                                          SystemZMCInstLower &Lower) {
747   MCContext &Ctx = MF->getContext();
748   if (MF->getFunction().hasFnAttribute("mrecord-mcount")) {
749     MCSymbol *DotSym = OutContext.createTempSymbol();
750     OutStreamer->pushSection();
751     OutStreamer->switchSection(
752         Ctx.getELFSection("__mcount_loc", ELF::SHT_PROGBITS, ELF::SHF_ALLOC));
753     OutStreamer->emitSymbolValue(DotSym, 8);
754     OutStreamer->popSection();
755     OutStreamer->emitLabel(DotSym);
756   }
757 
758   if (MF->getFunction().hasFnAttribute("mnop-mcount")) {
759     EmitNop(Ctx, *OutStreamer, 6, getSubtargetInfo());
760     return;
761   }
762 
763   MCSymbol *fentry = Ctx.getOrCreateSymbol("__fentry__");
764   const MCSymbolRefExpr *Op =
765       MCSymbolRefExpr::create(fentry, MCSymbolRefExpr::VK_PLT, Ctx);
766   OutStreamer->emitInstruction(
767       MCInstBuilder(SystemZ::BRASL).addReg(SystemZ::R0D).addExpr(Op),
768       getSubtargetInfo());
769 }
770 
771 void SystemZAsmPrinter::LowerSTACKMAP(const MachineInstr &MI) {
772   auto *TII = MF->getSubtarget<SystemZSubtarget>().getInstrInfo();
773 
774   unsigned NumNOPBytes = MI.getOperand(1).getImm();
775 
776   auto &Ctx = OutStreamer->getContext();
777   MCSymbol *MILabel = Ctx.createTempSymbol();
778   OutStreamer->emitLabel(MILabel);
779 
780   SM.recordStackMap(*MILabel, MI);
781   assert(NumNOPBytes % 2 == 0 && "Invalid number of NOP bytes requested!");
782 
783   // Scan ahead to trim the shadow.
784   unsigned ShadowBytes = 0;
785   const MachineBasicBlock &MBB = *MI.getParent();
786   MachineBasicBlock::const_iterator MII(MI);
787   ++MII;
788   while (ShadowBytes < NumNOPBytes) {
789     if (MII == MBB.end() ||
790         MII->getOpcode() == TargetOpcode::PATCHPOINT ||
791         MII->getOpcode() == TargetOpcode::STACKMAP)
792       break;
793     ShadowBytes += TII->getInstSizeInBytes(*MII);
794     if (MII->isCall())
795       break;
796     ++MII;
797   }
798 
799   // Emit nops.
800   while (ShadowBytes < NumNOPBytes)
801     ShadowBytes += EmitNop(OutContext, *OutStreamer, NumNOPBytes - ShadowBytes,
802                            getSubtargetInfo());
803 }
804 
805 // Lower a patchpoint of the form:
806 // [<def>], <id>, <numBytes>, <target>, <numArgs>
807 void SystemZAsmPrinter::LowerPATCHPOINT(const MachineInstr &MI,
808                                         SystemZMCInstLower &Lower) {
809   auto &Ctx = OutStreamer->getContext();
810   MCSymbol *MILabel = Ctx.createTempSymbol();
811   OutStreamer->emitLabel(MILabel);
812 
813   SM.recordPatchPoint(*MILabel, MI);
814   PatchPointOpers Opers(&MI);
815 
816   unsigned EncodedBytes = 0;
817   const MachineOperand &CalleeMO = Opers.getCallTarget();
818 
819   if (CalleeMO.isImm()) {
820     uint64_t CallTarget = CalleeMO.getImm();
821     if (CallTarget) {
822       unsigned ScratchIdx = -1;
823       unsigned ScratchReg = 0;
824       do {
825         ScratchIdx = Opers.getNextScratchIdx(ScratchIdx + 1);
826         ScratchReg = MI.getOperand(ScratchIdx).getReg();
827       } while (ScratchReg == SystemZ::R0D);
828 
829       // Materialize the call target address
830       EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::LLILF)
831                                       .addReg(ScratchReg)
832                                       .addImm(CallTarget & 0xFFFFFFFF));
833       EncodedBytes += 6;
834       if (CallTarget >> 32) {
835         EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::IIHF)
836                                         .addReg(ScratchReg)
837                                         .addImm(CallTarget >> 32));
838         EncodedBytes += 6;
839       }
840 
841       EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::BASR)
842                                      .addReg(SystemZ::R14D)
843                                      .addReg(ScratchReg));
844       EncodedBytes += 2;
845     }
846   } else if (CalleeMO.isGlobal()) {
847     const MCExpr *Expr = Lower.getExpr(CalleeMO, MCSymbolRefExpr::VK_PLT);
848     EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::BRASL)
849                                    .addReg(SystemZ::R14D)
850                                    .addExpr(Expr));
851     EncodedBytes += 6;
852   }
853 
854   // Emit padding.
855   unsigned NumBytes = Opers.getNumPatchBytes();
856   assert(NumBytes >= EncodedBytes &&
857          "Patchpoint can't request size less than the length of a call.");
858   assert((NumBytes - EncodedBytes) % 2 == 0 &&
859          "Invalid number of NOP bytes requested!");
860   while (EncodedBytes < NumBytes)
861     EncodedBytes += EmitNop(OutContext, *OutStreamer, NumBytes - EncodedBytes,
862                             getSubtargetInfo());
863 }
864 
865 void SystemZAsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(
866     const MachineInstr &MI, SystemZMCInstLower &Lower) {
867   // .begin:
868   //   j .end    # -> stmg    %r2, %r15, 16(%r15)
869   //   nop
870   //   llilf   %2, FuncID
871   //   brasl   %r14, __xray_FunctionEntry@GOT
872   // .end:
873   //
874   // Update compiler-rt/lib/xray/xray_s390x.cpp accordingly when number
875   // of instructions change.
876   bool HasVectorFeature =
877       TM.getMCSubtargetInfo()->hasFeature(SystemZ::FeatureVector) &&
878       !TM.getMCSubtargetInfo()->hasFeature(SystemZ::FeatureSoftFloat);
879   MCSymbol *FuncEntry = OutContext.getOrCreateSymbol(
880       HasVectorFeature ? "__xray_FunctionEntryVec" : "__xray_FunctionEntry");
881   MCSymbol *BeginOfSled = OutContext.createTempSymbol("xray_sled_", true);
882   MCSymbol *EndOfSled = OutContext.createTempSymbol();
883   OutStreamer->emitLabel(BeginOfSled);
884   EmitToStreamer(*OutStreamer,
885                  MCInstBuilder(SystemZ::J)
886                      .addExpr(MCSymbolRefExpr::create(EndOfSled, OutContext)));
887   EmitNop(OutContext, *OutStreamer, 2, getSubtargetInfo());
888   EmitToStreamer(*OutStreamer,
889                  MCInstBuilder(SystemZ::LLILF).addReg(SystemZ::R2D).addImm(0));
890   EmitToStreamer(*OutStreamer,
891                  MCInstBuilder(SystemZ::BRASL)
892                      .addReg(SystemZ::R14D)
893                      .addExpr(MCSymbolRefExpr::create(
894                          FuncEntry, MCSymbolRefExpr::VK_PLT, OutContext)));
895   OutStreamer->emitLabel(EndOfSled);
896   recordSled(BeginOfSled, MI, SledKind::FUNCTION_ENTER, 2);
897 }
898 
899 void SystemZAsmPrinter::LowerPATCHABLE_RET(const MachineInstr &MI,
900                                            SystemZMCInstLower &Lower) {
901   unsigned OpCode = MI.getOperand(0).getImm();
902   MCSymbol *FallthroughLabel = nullptr;
903   if (OpCode == SystemZ::CondReturn) {
904     FallthroughLabel = OutContext.createTempSymbol();
905     int64_t Cond0 = MI.getOperand(1).getImm();
906     int64_t Cond1 = MI.getOperand(2).getImm();
907     EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::BRC)
908                                      .addImm(Cond0)
909                                      .addImm(Cond1 ^ Cond0)
910                                      .addExpr(MCSymbolRefExpr::create(
911                                          FallthroughLabel, OutContext)));
912   }
913   // .begin:
914   //   br %r14    # -> stmg    %r2, %r15, 24(%r15)
915   //   nop
916   //   nop
917   //   llilf   %2,FuncID
918   //   j       __xray_FunctionExit@GOT
919   //
920   // Update compiler-rt/lib/xray/xray_s390x.cpp accordingly when number
921   // of instructions change.
922   bool HasVectorFeature =
923       TM.getMCSubtargetInfo()->hasFeature(SystemZ::FeatureVector) &&
924       !TM.getMCSubtargetInfo()->hasFeature(SystemZ::FeatureSoftFloat);
925   MCSymbol *FuncExit = OutContext.getOrCreateSymbol(
926       HasVectorFeature ? "__xray_FunctionExitVec" : "__xray_FunctionExit");
927   MCSymbol *BeginOfSled = OutContext.createTempSymbol("xray_sled_", true);
928   OutStreamer->emitLabel(BeginOfSled);
929   EmitToStreamer(*OutStreamer,
930                  MCInstBuilder(SystemZ::BR).addReg(SystemZ::R14D));
931   EmitNop(OutContext, *OutStreamer, 4, getSubtargetInfo());
932   EmitToStreamer(*OutStreamer,
933                  MCInstBuilder(SystemZ::LLILF).addReg(SystemZ::R2D).addImm(0));
934   EmitToStreamer(*OutStreamer,
935                  MCInstBuilder(SystemZ::J)
936                      .addExpr(MCSymbolRefExpr::create(
937                          FuncExit, MCSymbolRefExpr::VK_PLT, OutContext)));
938   if (FallthroughLabel)
939     OutStreamer->emitLabel(FallthroughLabel);
940   recordSled(BeginOfSled, MI, SledKind::FUNCTION_EXIT, 2);
941 }
942 
943 // The *alignment* of 128-bit vector types is different between the software
944 // and hardware vector ABIs. If the there is an externally visible use of a
945 // vector type in the module it should be annotated with an attribute.
946 void SystemZAsmPrinter::emitAttributes(Module &M) {
947   if (M.getModuleFlag("s390x-visible-vector-ABI")) {
948     bool HasVectorFeature =
949       TM.getMCSubtargetInfo()->hasFeature(SystemZ::FeatureVector);
950     OutStreamer->emitGNUAttribute(8, HasVectorFeature ? 2 : 1);
951   }
952 }
953 
954 // Convert a SystemZ-specific constant pool modifier into the associated
955 // MCSymbolRefExpr variant kind.
956 static MCSymbolRefExpr::VariantKind
957 getModifierVariantKind(SystemZCP::SystemZCPModifier Modifier) {
958   switch (Modifier) {
959   case SystemZCP::TLSGD: return MCSymbolRefExpr::VK_TLSGD;
960   case SystemZCP::TLSLDM: return MCSymbolRefExpr::VK_TLSLDM;
961   case SystemZCP::DTPOFF: return MCSymbolRefExpr::VK_DTPOFF;
962   case SystemZCP::NTPOFF: return MCSymbolRefExpr::VK_NTPOFF;
963   }
964   llvm_unreachable("Invalid SystemCPModifier!");
965 }
966 
967 void SystemZAsmPrinter::emitMachineConstantPoolValue(
968     MachineConstantPoolValue *MCPV) {
969   auto *ZCPV = static_cast<SystemZConstantPoolValue*>(MCPV);
970 
971   const MCExpr *Expr =
972     MCSymbolRefExpr::create(getSymbol(ZCPV->getGlobalValue()),
973                             getModifierVariantKind(ZCPV->getModifier()),
974                             OutContext);
975   uint64_t Size = getDataLayout().getTypeAllocSize(ZCPV->getType());
976 
977   OutStreamer->emitValue(Expr, Size);
978 }
979 
980 static void printFormattedRegName(const MCAsmInfo *MAI, unsigned RegNo,
981                                   raw_ostream &OS) {
982   const char *RegName;
983   if (MAI->getAssemblerDialect() == AD_HLASM) {
984     RegName = SystemZHLASMInstPrinter::getRegisterName(RegNo);
985     // Skip register prefix so that only register number is left
986     assert(isalpha(RegName[0]) && isdigit(RegName[1]));
987     OS << (RegName + 1);
988   } else {
989     RegName = SystemZGNUInstPrinter::getRegisterName(RegNo);
990     OS << '%' << RegName;
991   }
992 }
993 
994 static void printReg(unsigned Reg, const MCAsmInfo *MAI, raw_ostream &OS) {
995   if (!Reg)
996     OS << '0';
997   else
998     printFormattedRegName(MAI, Reg, OS);
999 }
1000 
1001 static void printOperand(const MCOperand &MCOp, const MCAsmInfo *MAI,
1002                          raw_ostream &OS) {
1003   if (MCOp.isReg())
1004     printReg(MCOp.getReg(), MAI, OS);
1005   else if (MCOp.isImm())
1006     OS << MCOp.getImm();
1007   else if (MCOp.isExpr())
1008     MCOp.getExpr()->print(OS, MAI);
1009   else
1010     llvm_unreachable("Invalid operand");
1011 }
1012 
1013 static void printAddress(const MCAsmInfo *MAI, unsigned Base,
1014                          const MCOperand &DispMO, unsigned Index,
1015                          raw_ostream &OS) {
1016   printOperand(DispMO, MAI, OS);
1017   if (Base || Index) {
1018     OS << '(';
1019     if (Index) {
1020       printFormattedRegName(MAI, Index, OS);
1021       if (Base)
1022         OS << ',';
1023     }
1024     if (Base)
1025       printFormattedRegName(MAI, Base, OS);
1026     OS << ')';
1027   }
1028 }
1029 
1030 bool SystemZAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
1031                                         const char *ExtraCode,
1032                                         raw_ostream &OS) {
1033   const MCRegisterInfo &MRI = *TM.getMCRegisterInfo();
1034   const MachineOperand &MO = MI->getOperand(OpNo);
1035   MCOperand MCOp;
1036   if (ExtraCode) {
1037     if (ExtraCode[0] == 'N' && !ExtraCode[1] && MO.isReg() &&
1038         SystemZ::GR128BitRegClass.contains(MO.getReg()))
1039       MCOp =
1040           MCOperand::createReg(MRI.getSubReg(MO.getReg(), SystemZ::subreg_l64));
1041     else
1042       return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, OS);
1043   } else {
1044     SystemZMCInstLower Lower(MF->getContext(), *this);
1045     MCOp = Lower.lowerOperand(MO);
1046   }
1047   printOperand(MCOp, MAI, OS);
1048   return false;
1049 }
1050 
1051 bool SystemZAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
1052                                               unsigned OpNo,
1053                                               const char *ExtraCode,
1054                                               raw_ostream &OS) {
1055   if (ExtraCode && ExtraCode[0] && !ExtraCode[1]) {
1056     switch (ExtraCode[0]) {
1057     case 'A':
1058       // Unlike EmitMachineNode(), EmitSpecialNode(INLINEASM) does not call
1059       // setMemRefs(), so MI->memoperands() is empty and the alignment
1060       // information is not available.
1061       return false;
1062     case 'O':
1063       OS << MI->getOperand(OpNo + 1).getImm();
1064       return false;
1065     case 'R':
1066       ::printReg(MI->getOperand(OpNo).getReg(), MAI, OS);
1067       return false;
1068     }
1069   }
1070   printAddress(MAI, MI->getOperand(OpNo).getReg(),
1071                MCOperand::createImm(MI->getOperand(OpNo + 1).getImm()),
1072                MI->getOperand(OpNo + 2).getReg(), OS);
1073   return false;
1074 }
1075 
1076 void SystemZAsmPrinter::emitEndOfAsmFile(Module &M) {
1077   auto TT = OutContext.getTargetTriple();
1078   if (TT.isOSzOS()) {
1079     emitADASection();
1080     emitIDRLSection(M);
1081   }
1082   emitAttributes(M);
1083 }
1084 
1085 void SystemZAsmPrinter::emitADASection() {
1086   OutStreamer->pushSection();
1087 
1088   const unsigned PointerSize = getDataLayout().getPointerSize();
1089   OutStreamer->switchSection(getObjFileLowering().getADASection());
1090 
1091   unsigned EmittedBytes = 0;
1092   for (auto &Entry : ADATable.getTable()) {
1093     const MCSymbol *Sym;
1094     unsigned SlotKind;
1095     std::tie(Sym, SlotKind) = Entry.first;
1096     unsigned Offset = Entry.second;
1097     assert(Offset == EmittedBytes && "Offset not as expected");
1098     (void)EmittedBytes;
1099 #define EMIT_COMMENT(Str)                                                      \
1100   OutStreamer->AddComment(Twine("Offset ")                                     \
1101                               .concat(utostr(Offset))                          \
1102                               .concat(" " Str " ")                             \
1103                               .concat(Sym->getName()));
1104     switch (SlotKind) {
1105     case SystemZII::MO_ADA_DIRECT_FUNC_DESC:
1106       // Language Environment DLL logic requires function descriptors, for
1107       // imported functions, that are placed in the ADA to be 8 byte aligned.
1108       EMIT_COMMENT("function descriptor of");
1109       OutStreamer->emitValue(
1110           SystemZMCExpr::create(SystemZMCExpr::VK_SystemZ_RCon,
1111                                 MCSymbolRefExpr::create(Sym, OutContext),
1112                                 OutContext),
1113           PointerSize);
1114       OutStreamer->emitValue(
1115           SystemZMCExpr::create(SystemZMCExpr::VK_SystemZ_VCon,
1116                                 MCSymbolRefExpr::create(Sym, OutContext),
1117                                 OutContext),
1118           PointerSize);
1119       EmittedBytes += PointerSize * 2;
1120       break;
1121     case SystemZII::MO_ADA_DATA_SYMBOL_ADDR:
1122       EMIT_COMMENT("pointer to data symbol");
1123       OutStreamer->emitValue(
1124           SystemZMCExpr::create(SystemZMCExpr::VK_SystemZ_None,
1125                                 MCSymbolRefExpr::create(Sym, OutContext),
1126                                 OutContext),
1127           PointerSize);
1128       EmittedBytes += PointerSize;
1129       break;
1130     case SystemZII::MO_ADA_INDIRECT_FUNC_DESC: {
1131       MCSymbol *Alias = OutContext.createTempSymbol(
1132           Twine(Sym->getName()).concat("@indirect"));
1133       OutStreamer->emitAssignment(Alias,
1134                                   MCSymbolRefExpr::create(Sym, OutContext));
1135       OutStreamer->emitSymbolAttribute(Alias, MCSA_IndirectSymbol);
1136 
1137       EMIT_COMMENT("pointer to function descriptor");
1138       OutStreamer->emitValue(
1139           SystemZMCExpr::create(SystemZMCExpr::VK_SystemZ_VCon,
1140                                 MCSymbolRefExpr::create(Alias, OutContext),
1141                                 OutContext),
1142           PointerSize);
1143       EmittedBytes += PointerSize;
1144       break;
1145     }
1146     default:
1147       llvm_unreachable("Unexpected slot kind");
1148     }
1149 #undef EMIT_COMMENT
1150   }
1151   OutStreamer->popSection();
1152 }
1153 
1154 static std::string getProductID(Module &M) {
1155   std::string ProductID;
1156   if (auto *MD = M.getModuleFlag("zos_product_id"))
1157     ProductID = cast<MDString>(MD)->getString().str();
1158   if (ProductID.empty())
1159     ProductID = "LLVM";
1160   return ProductID;
1161 }
1162 
1163 static uint32_t getProductVersion(Module &M) {
1164   if (auto *VersionVal = mdconst::extract_or_null<ConstantInt>(
1165           M.getModuleFlag("zos_product_major_version")))
1166     return VersionVal->getZExtValue();
1167   return LLVM_VERSION_MAJOR;
1168 }
1169 
1170 static uint32_t getProductRelease(Module &M) {
1171   if (auto *ReleaseVal = mdconst::extract_or_null<ConstantInt>(
1172           M.getModuleFlag("zos_product_minor_version")))
1173     return ReleaseVal->getZExtValue();
1174   return LLVM_VERSION_MINOR;
1175 }
1176 
1177 static uint32_t getProductPatch(Module &M) {
1178   if (auto *PatchVal = mdconst::extract_or_null<ConstantInt>(
1179           M.getModuleFlag("zos_product_patchlevel")))
1180     return PatchVal->getZExtValue();
1181   return LLVM_VERSION_PATCH;
1182 }
1183 
1184 static time_t getTranslationTime(Module &M) {
1185   std::time_t Time = 0;
1186   if (auto *Val = mdconst::extract_or_null<ConstantInt>(
1187           M.getModuleFlag("zos_translation_time"))) {
1188     long SecondsSinceEpoch = Val->getSExtValue();
1189     Time = static_cast<time_t>(SecondsSinceEpoch);
1190   }
1191   return Time;
1192 }
1193 
1194 void SystemZAsmPrinter::emitIDRLSection(Module &M) {
1195   OutStreamer->pushSection();
1196   OutStreamer->switchSection(getObjFileLowering().getIDRLSection());
1197   constexpr unsigned IDRLDataLength = 30;
1198   std::time_t Time = getTranslationTime(M);
1199 
1200   uint32_t ProductVersion = getProductVersion(M);
1201   uint32_t ProductRelease = getProductRelease(M);
1202 
1203   std::string ProductID = getProductID(M);
1204 
1205   SmallString<IDRLDataLength + 1> TempStr;
1206   raw_svector_ostream O(TempStr);
1207   O << formatv("{0,-10}{1,0-2:d}{2,0-2:d}{3:%Y%m%d%H%M%S}{4,0-2}",
1208                ProductID.substr(0, 10).c_str(), ProductVersion, ProductRelease,
1209                llvm::sys::toUtcTime(Time), "0");
1210   SmallString<IDRLDataLength> Data;
1211   ConverterEBCDIC::convertToEBCDIC(TempStr, Data);
1212 
1213   OutStreamer->emitInt8(0);               // Reserved.
1214   OutStreamer->emitInt8(3);               // Format.
1215   OutStreamer->emitInt16(IDRLDataLength); // Length.
1216   OutStreamer->emitBytes(Data.str());
1217   OutStreamer->popSection();
1218 }
1219 
1220 void SystemZAsmPrinter::emitFunctionBodyEnd() {
1221   if (TM.getTargetTriple().isOSzOS()) {
1222     // Emit symbol for the end of function if the z/OS target streamer
1223     // is used. This is needed to calculate the size of the function.
1224     MCSymbol *FnEndSym = createTempSymbol("func_end");
1225     OutStreamer->emitLabel(FnEndSym);
1226 
1227     OutStreamer->pushSection();
1228     OutStreamer->switchSection(getObjFileLowering().getPPA1Section());
1229     emitPPA1(FnEndSym);
1230     OutStreamer->popSection();
1231 
1232     CurrentFnPPA1Sym = nullptr;
1233     CurrentFnEPMarkerSym = nullptr;
1234   }
1235 }
1236 
1237 static void emitPPA1Flags(std::unique_ptr<MCStreamer> &OutStreamer, bool VarArg,
1238                           bool StackProtector, bool FPRMask, bool VRMask,
1239                           bool EHBlock, bool HasName) {
1240   enum class PPA1Flag1 : uint8_t {
1241     DSA64Bit = (0x80 >> 0),
1242     VarArg = (0x80 >> 7),
1243     LLVM_MARK_AS_BITMASK_ENUM(DSA64Bit)
1244   };
1245   enum class PPA1Flag2 : uint8_t {
1246     ExternalProcedure = (0x80 >> 0),
1247     STACKPROTECTOR = (0x80 >> 3),
1248     LLVM_MARK_AS_BITMASK_ENUM(ExternalProcedure)
1249   };
1250   enum class PPA1Flag3 : uint8_t {
1251     FPRMask = (0x80 >> 2),
1252     LLVM_MARK_AS_BITMASK_ENUM(FPRMask)
1253   };
1254   enum class PPA1Flag4 : uint8_t {
1255     EPMOffsetPresent = (0x80 >> 0),
1256     VRMask = (0x80 >> 2),
1257     EHBlock = (0x80 >> 3),
1258     ProcedureNamePresent = (0x80 >> 7),
1259     LLVM_MARK_AS_BITMASK_ENUM(EPMOffsetPresent)
1260   };
1261 
1262   // Declare optional section flags that can be modified.
1263   auto Flags1 = PPA1Flag1(0);
1264   auto Flags2 = PPA1Flag2::ExternalProcedure;
1265   auto Flags3 = PPA1Flag3(0);
1266   auto Flags4 = PPA1Flag4::EPMOffsetPresent;
1267 
1268   Flags1 |= PPA1Flag1::DSA64Bit;
1269 
1270   if (VarArg)
1271     Flags1 |= PPA1Flag1::VarArg;
1272 
1273   if (StackProtector)
1274     Flags2 |= PPA1Flag2::STACKPROTECTOR;
1275 
1276   // SavedGPRMask, SavedFPRMask, and SavedVRMask are precomputed in.
1277   if (FPRMask)
1278     Flags3 |= PPA1Flag3::FPRMask; // Add emit FPR mask flag.
1279 
1280   if (VRMask)
1281     Flags4 |= PPA1Flag4::VRMask; // Add emit VR mask flag.
1282 
1283   if (EHBlock)
1284     Flags4 |= PPA1Flag4::EHBlock; // Add optional EH block.
1285 
1286   if (HasName)
1287     Flags4 |= PPA1Flag4::ProcedureNamePresent; // Add optional name block.
1288 
1289   OutStreamer->AddComment("PPA1 Flags 1");
1290   if ((Flags1 & PPA1Flag1::DSA64Bit) == PPA1Flag1::DSA64Bit)
1291     OutStreamer->AddComment("  Bit 0: 1 = 64-bit DSA");
1292   else
1293     OutStreamer->AddComment("  Bit 0: 0 = 32-bit DSA");
1294   if ((Flags1 & PPA1Flag1::VarArg) == PPA1Flag1::VarArg)
1295     OutStreamer->AddComment("  Bit 7: 1 = Vararg function");
1296   OutStreamer->emitInt8(static_cast<uint8_t>(Flags1)); // Flags 1.
1297 
1298   OutStreamer->AddComment("PPA1 Flags 2");
1299   if ((Flags2 & PPA1Flag2::ExternalProcedure) == PPA1Flag2::ExternalProcedure)
1300     OutStreamer->AddComment("  Bit 0: 1 = External procedure");
1301   if ((Flags2 & PPA1Flag2::STACKPROTECTOR) == PPA1Flag2::STACKPROTECTOR)
1302     OutStreamer->AddComment("  Bit 3: 1 = STACKPROTECT is enabled");
1303   else
1304     OutStreamer->AddComment("  Bit 3: 0 = STACKPROTECT is not enabled");
1305   OutStreamer->emitInt8(static_cast<uint8_t>(Flags2)); // Flags 2.
1306 
1307   OutStreamer->AddComment("PPA1 Flags 3");
1308   if ((Flags3 & PPA1Flag3::FPRMask) == PPA1Flag3::FPRMask)
1309     OutStreamer->AddComment("  Bit 2: 1 = FP Reg Mask is in optional area");
1310   OutStreamer->emitInt8(
1311       static_cast<uint8_t>(Flags3)); // Flags 3 (optional sections).
1312 
1313   OutStreamer->AddComment("PPA1 Flags 4");
1314   if ((Flags4 & PPA1Flag4::VRMask) == PPA1Flag4::VRMask)
1315     OutStreamer->AddComment("  Bit 2: 1 = Vector Reg Mask is in optional area");
1316   if ((Flags4 & PPA1Flag4::EHBlock) == PPA1Flag4::EHBlock)
1317     OutStreamer->AddComment("  Bit 3: 1 = C++ EH block");
1318   if ((Flags4 & PPA1Flag4::ProcedureNamePresent) ==
1319       PPA1Flag4::ProcedureNamePresent)
1320     OutStreamer->AddComment("  Bit 7: 1 = Name Length and Name");
1321   OutStreamer->emitInt8(static_cast<uint8_t>(
1322       Flags4)); // Flags 4 (optional sections, always emit these).
1323 }
1324 
1325 static void emitPPA1Name(std::unique_ptr<MCStreamer> &OutStreamer,
1326                          StringRef OutName) {
1327   size_t NameSize = OutName.size();
1328   uint16_t OutSize;
1329   if (NameSize < UINT16_MAX) {
1330     OutSize = static_cast<uint16_t>(NameSize);
1331   } else {
1332     OutName = OutName.substr(0, UINT16_MAX);
1333     OutSize = UINT16_MAX;
1334   }
1335   // Emit padding to ensure that the next optional field word-aligned.
1336   uint8_t ExtraZeros = 4 - ((2 + OutSize) % 4);
1337 
1338   SmallString<512> OutnameConv;
1339   ConverterEBCDIC::convertToEBCDIC(OutName, OutnameConv);
1340   OutName = OutnameConv.str();
1341 
1342   OutStreamer->AddComment("Length of Name");
1343   OutStreamer->emitInt16(OutSize);
1344   OutStreamer->AddComment("Name of Function");
1345   OutStreamer->emitBytes(OutName);
1346   OutStreamer->emitZeros(ExtraZeros);
1347 }
1348 
1349 void SystemZAsmPrinter::emitPPA1(MCSymbol *FnEndSym) {
1350   assert(PPA2Sym != nullptr && "PPA2 Symbol not defined");
1351 
1352   const TargetRegisterInfo *TRI = MF->getRegInfo().getTargetRegisterInfo();
1353   const SystemZSubtarget &Subtarget = MF->getSubtarget<SystemZSubtarget>();
1354   const auto TargetHasVector = Subtarget.hasVector();
1355 
1356   const SystemZMachineFunctionInfo *ZFI =
1357       MF->getInfo<SystemZMachineFunctionInfo>();
1358   const auto *ZFL = static_cast<const SystemZXPLINKFrameLowering *>(
1359       Subtarget.getFrameLowering());
1360   const MachineFrameInfo &MFFrame = MF->getFrameInfo();
1361 
1362   // Get saved GPR/FPR/VPR masks.
1363   const std::vector<CalleeSavedInfo> &CSI = MFFrame.getCalleeSavedInfo();
1364   uint16_t SavedGPRMask = 0;
1365   uint16_t SavedFPRMask = 0;
1366   uint8_t SavedVRMask = 0;
1367   int64_t OffsetFPR = 0;
1368   int64_t OffsetVR = 0;
1369   const int64_t TopOfStack =
1370       MFFrame.getOffsetAdjustment() + MFFrame.getStackSize();
1371 
1372   // Loop over the spilled registers. The CalleeSavedInfo can't be used because
1373   // it does not contain all spilled registers.
1374   for (unsigned I = ZFI->getSpillGPRRegs().LowGPR,
1375                 E = ZFI->getSpillGPRRegs().HighGPR;
1376        I && E && I <= E; ++I) {
1377     unsigned V = TRI->getEncodingValue((Register)I);
1378     assert(V < 16 && "GPR index out of range");
1379     SavedGPRMask |= 1 << (15 - V);
1380   }
1381 
1382   for (auto &CS : CSI) {
1383     unsigned Reg = CS.getReg();
1384     unsigned I = TRI->getEncodingValue(Reg);
1385 
1386     if (SystemZ::FP64BitRegClass.contains(Reg)) {
1387       assert(I < 16 && "FPR index out of range");
1388       SavedFPRMask |= 1 << (15 - I);
1389       int64_t Temp = MFFrame.getObjectOffset(CS.getFrameIdx());
1390       if (Temp < OffsetFPR)
1391         OffsetFPR = Temp;
1392     } else if (SystemZ::VR128BitRegClass.contains(Reg)) {
1393       assert(I >= 16 && I <= 23 && "VPR index out of range");
1394       unsigned BitNum = I - 16;
1395       SavedVRMask |= 1 << (7 - BitNum);
1396       int64_t Temp = MFFrame.getObjectOffset(CS.getFrameIdx());
1397       if (Temp < OffsetVR)
1398         OffsetVR = Temp;
1399     }
1400   }
1401 
1402   // Adjust the offset.
1403   OffsetFPR += (OffsetFPR < 0) ? TopOfStack : 0;
1404   OffsetVR += (OffsetVR < 0) ? TopOfStack : 0;
1405 
1406   // Get alloca register.
1407   uint8_t FrameReg = TRI->getEncodingValue(TRI->getFrameRegister(*MF));
1408   uint8_t AllocaReg = ZFL->hasFP(*MF) ? FrameReg : 0;
1409   assert(AllocaReg < 16 && "Can't have alloca register larger than 15");
1410   (void)AllocaReg;
1411 
1412   // Build FPR save area offset.
1413   uint32_t FrameAndFPROffset = 0;
1414   if (SavedFPRMask) {
1415     uint64_t FPRSaveAreaOffset = OffsetFPR;
1416     assert(FPRSaveAreaOffset < 0x10000000 && "Offset out of range");
1417 
1418     FrameAndFPROffset = FPRSaveAreaOffset & 0x0FFFFFFF; // Lose top 4 bits.
1419     FrameAndFPROffset |= FrameReg << 28;                // Put into top 4 bits.
1420   }
1421 
1422   // Build VR save area offset.
1423   uint32_t FrameAndVROffset = 0;
1424   if (TargetHasVector && SavedVRMask) {
1425     uint64_t VRSaveAreaOffset = OffsetVR;
1426     assert(VRSaveAreaOffset < 0x10000000 && "Offset out of range");
1427 
1428     FrameAndVROffset = VRSaveAreaOffset & 0x0FFFFFFF; // Lose top 4 bits.
1429     FrameAndVROffset |= FrameReg << 28;               // Put into top 4 bits.
1430   }
1431 
1432   // Emit PPA1 section.
1433   OutStreamer->AddComment("PPA1");
1434   OutStreamer->emitLabel(CurrentFnPPA1Sym);
1435   OutStreamer->AddComment("Version");
1436   OutStreamer->emitInt8(0x02); // Version.
1437   OutStreamer->AddComment("LE Signature X'CE'");
1438   OutStreamer->emitInt8(0xCE); // CEL signature.
1439   OutStreamer->AddComment("Saved GPR Mask");
1440   OutStreamer->emitInt16(SavedGPRMask);
1441   OutStreamer->AddComment("Offset to PPA2");
1442   OutStreamer->emitAbsoluteSymbolDiff(PPA2Sym, CurrentFnPPA1Sym, 4);
1443 
1444   bool NeedEmitEHBlock = !MF->getLandingPads().empty();
1445 
1446   bool HasName =
1447       MF->getFunction().hasName() && MF->getFunction().getName().size() > 0;
1448 
1449   emitPPA1Flags(OutStreamer, MF->getFunction().isVarArg(),
1450                 MFFrame.hasStackProtectorIndex(), SavedFPRMask != 0,
1451                 TargetHasVector && SavedVRMask != 0, NeedEmitEHBlock, HasName);
1452 
1453   OutStreamer->AddComment("Length/4 of Parms");
1454   OutStreamer->emitInt16(
1455       static_cast<uint16_t>(ZFI->getSizeOfFnParams() / 4)); // Parms/4.
1456   OutStreamer->AddComment("Length of Code");
1457   OutStreamer->emitAbsoluteSymbolDiff(FnEndSym, CurrentFnEPMarkerSym, 4);
1458 
1459   // Emit saved FPR mask and offset to FPR save area (0x20 of flags 3).
1460   if (SavedFPRMask) {
1461     OutStreamer->AddComment("FPR mask");
1462     OutStreamer->emitInt16(SavedFPRMask);
1463     OutStreamer->AddComment("AR mask");
1464     OutStreamer->emitInt16(0); // AR Mask, unused currently.
1465     OutStreamer->AddComment("FPR Save Area Locator");
1466     OutStreamer->AddComment(Twine("  Bit 0-3: Register R")
1467                                 .concat(utostr(FrameAndFPROffset >> 28))
1468                                 .str());
1469     OutStreamer->AddComment(Twine("  Bit 4-31: Offset ")
1470                                 .concat(utostr(FrameAndFPROffset & 0x0FFFFFFF))
1471                                 .str());
1472     OutStreamer->emitInt32(FrameAndFPROffset); // Offset to FPR save area with
1473                                                // register to add value to
1474                                                // (alloca reg).
1475   }
1476 
1477   // Emit saved VR mask to VR save area.
1478   if (TargetHasVector && SavedVRMask) {
1479     OutStreamer->AddComment("VR mask");
1480     OutStreamer->emitInt8(SavedVRMask);
1481     OutStreamer->emitInt8(0);  // Reserved.
1482     OutStreamer->emitInt16(0); // Also reserved.
1483     OutStreamer->AddComment("VR Save Area Locator");
1484     OutStreamer->AddComment(Twine("  Bit 0-3: Register R")
1485                                 .concat(utostr(FrameAndVROffset >> 28))
1486                                 .str());
1487     OutStreamer->AddComment(Twine("  Bit 4-31: Offset ")
1488                                 .concat(utostr(FrameAndVROffset & 0x0FFFFFFF))
1489                                 .str());
1490     OutStreamer->emitInt32(FrameAndVROffset);
1491   }
1492 
1493   // Emit C++ EH information block
1494   const Function *Per = nullptr;
1495   if (NeedEmitEHBlock) {
1496     Per = dyn_cast<Function>(
1497         MF->getFunction().getPersonalityFn()->stripPointerCasts());
1498     MCSymbol *PersonalityRoutine =
1499         Per ? MF->getTarget().getSymbol(Per) : nullptr;
1500     assert(PersonalityRoutine && "Missing personality routine");
1501 
1502     OutStreamer->AddComment("Version");
1503     OutStreamer->emitInt32(1);
1504     OutStreamer->AddComment("Flags");
1505     OutStreamer->emitInt32(0); // LSDA field is a WAS offset
1506     OutStreamer->AddComment("Personality routine");
1507     OutStreamer->emitInt64(ADATable.insert(
1508         PersonalityRoutine, SystemZII::MO_ADA_INDIRECT_FUNC_DESC));
1509     OutStreamer->AddComment("LSDA location");
1510     MCSymbol *GCCEH = MF->getContext().getOrCreateSymbol(
1511         Twine("GCC_except_table") + Twine(MF->getFunctionNumber()));
1512     OutStreamer->emitInt64(
1513         ADATable.insert(GCCEH, SystemZII::MO_ADA_DATA_SYMBOL_ADDR));
1514   }
1515 
1516   // Emit name length and name optional section (0x01 of flags 4)
1517   if (HasName)
1518     emitPPA1Name(OutStreamer, MF->getFunction().getName());
1519 
1520   // Emit offset to entry point optional section (0x80 of flags 4).
1521   OutStreamer->emitAbsoluteSymbolDiff(CurrentFnEPMarkerSym, CurrentFnPPA1Sym,
1522                                       4);
1523 }
1524 
1525 void SystemZAsmPrinter::emitStartOfAsmFile(Module &M) {
1526   if (TM.getTargetTriple().isOSzOS())
1527     emitPPA2(M);
1528   AsmPrinter::emitStartOfAsmFile(M);
1529 }
1530 
1531 void SystemZAsmPrinter::emitPPA2(Module &M) {
1532   OutStreamer->pushSection();
1533   OutStreamer->switchSection(getObjFileLowering().getPPA2Section());
1534   MCContext &OutContext = OutStreamer->getContext();
1535   // Make CELQSTRT symbol.
1536   const char *StartSymbolName = "CELQSTRT";
1537   MCSymbol *CELQSTRT = OutContext.getOrCreateSymbol(StartSymbolName);
1538 
1539   // Create symbol and assign to class field for use in PPA1.
1540   PPA2Sym = OutContext.createTempSymbol("PPA2", false);
1541   MCSymbol *DateVersionSym = OutContext.createTempSymbol("DVS", false);
1542 
1543   std::time_t Time = getTranslationTime(M);
1544   SmallString<15> CompilationTime; // 14 + null
1545   raw_svector_ostream O(CompilationTime);
1546   O << formatv("{0:%Y%m%d%H%M%S}", llvm::sys::toUtcTime(Time));
1547 
1548   uint32_t ProductVersion = getProductVersion(M),
1549            ProductRelease = getProductRelease(M),
1550            ProductPatch = getProductPatch(M);
1551 
1552   SmallString<7> Version; // 6 + null
1553   raw_svector_ostream ostr(Version);
1554   ostr << formatv("{0,0-2:d}{1,0-2:d}{2,0-2:d}", ProductVersion, ProductRelease,
1555                   ProductPatch);
1556 
1557   // Drop 0 during conversion.
1558   SmallString<sizeof(CompilationTime) - 1> CompilationTimeStr;
1559   SmallString<sizeof(Version) - 1> VersionStr;
1560 
1561   ConverterEBCDIC::convertToEBCDIC(CompilationTime, CompilationTimeStr);
1562   ConverterEBCDIC::convertToEBCDIC(Version, VersionStr);
1563 
1564   enum class PPA2MemberId : uint8_t {
1565     // See z/OS Language Environment Vendor Interfaces v2r5, p.23, for
1566     // complete list. Only the C runtime is supported by this backend.
1567     LE_C_Runtime = 3,
1568   };
1569   enum class PPA2MemberSubId : uint8_t {
1570     // List of languages using the LE C runtime implementation.
1571     C = 0x00,
1572     CXX = 0x01,
1573     Swift = 0x03,
1574     Go = 0x60,
1575     LLVMBasedLang = 0xe7,
1576   };
1577   // PPA2 Flags
1578   enum class PPA2Flags : uint8_t {
1579     CompileForBinaryFloatingPoint = 0x80,
1580     CompiledWithXPLink = 0x01,
1581     CompiledUnitASCII = 0x04,
1582     HasServiceInfo = 0x20,
1583   };
1584 
1585   PPA2MemberSubId MemberSubId = PPA2MemberSubId::LLVMBasedLang;
1586   if (auto *MD = M.getModuleFlag("zos_cu_language")) {
1587     StringRef Language = cast<MDString>(MD)->getString();
1588     MemberSubId = StringSwitch<PPA2MemberSubId>(Language)
1589                       .Case("C", PPA2MemberSubId::C)
1590                       .Case("C++", PPA2MemberSubId::CXX)
1591                       .Case("Swift", PPA2MemberSubId::Swift)
1592                       .Case("Go", PPA2MemberSubId::Go)
1593                       .Default(PPA2MemberSubId::LLVMBasedLang);
1594   }
1595 
1596   // Emit PPA2 section.
1597   OutStreamer->emitLabel(PPA2Sym);
1598   OutStreamer->emitInt8(static_cast<uint8_t>(PPA2MemberId::LE_C_Runtime));
1599   OutStreamer->emitInt8(static_cast<uint8_t>(MemberSubId));
1600   OutStreamer->emitInt8(0x22); // Member defined, c370_plist+c370_env
1601   OutStreamer->emitInt8(0x04); // Control level 4 (XPLink)
1602   OutStreamer->emitAbsoluteSymbolDiff(CELQSTRT, PPA2Sym, 4);
1603   OutStreamer->emitInt32(0x00000000);
1604   OutStreamer->emitAbsoluteSymbolDiff(DateVersionSym, PPA2Sym, 4);
1605   OutStreamer->emitInt32(
1606       0x00000000); // Offset to main entry point, always 0 (so says TR).
1607   uint8_t Flgs = static_cast<uint8_t>(PPA2Flags::CompileForBinaryFloatingPoint);
1608   Flgs |= static_cast<uint8_t>(PPA2Flags::CompiledWithXPLink);
1609 
1610   if (auto *MD = M.getModuleFlag("zos_le_char_mode")) {
1611     const StringRef &CharMode = cast<MDString>(MD)->getString();
1612     if (CharMode == "ascii") {
1613       Flgs |= static_cast<uint8_t>(
1614           PPA2Flags::CompiledUnitASCII); // Setting bit for ASCII char. mode.
1615     } else if (CharMode != "ebcdic") {
1616       report_fatal_error(
1617           "Only ascii or ebcdic are valid values for zos_le_char_mode "
1618           "metadata");
1619     }
1620   }
1621 
1622   OutStreamer->emitInt8(Flgs);
1623   OutStreamer->emitInt8(0x00);    // Reserved.
1624                                   // No MD5 signature before timestamp.
1625                                   // No FLOAT(AFP(VOLATILE)).
1626                                   // Remaining 5 flag bits reserved.
1627   OutStreamer->emitInt16(0x0000); // 16 Reserved flag bits.
1628 
1629   // Emit date and version section.
1630   OutStreamer->emitLabel(DateVersionSym);
1631   OutStreamer->emitBytes(CompilationTimeStr.str());
1632   OutStreamer->emitBytes(VersionStr.str());
1633 
1634   OutStreamer->emitInt16(0x0000); // Service level string length.
1635 
1636   // The binder requires that the offset to the PPA2 be emitted in a different,
1637   // specially-named section.
1638   OutStreamer->switchSection(getObjFileLowering().getPPA2ListSection());
1639   // Emit 8 byte alignment.
1640   // Emit pointer to PPA2 label.
1641   OutStreamer->AddComment("A(PPA2-CELQSTRT)");
1642   OutStreamer->emitAbsoluteSymbolDiff(PPA2Sym, CELQSTRT, 8);
1643   OutStreamer->popSection();
1644 }
1645 
1646 void SystemZAsmPrinter::emitFunctionEntryLabel() {
1647   const SystemZSubtarget &Subtarget = MF->getSubtarget<SystemZSubtarget>();
1648 
1649   if (Subtarget.getTargetTriple().isOSzOS()) {
1650     MCContext &OutContext = OutStreamer->getContext();
1651 
1652     // Save information for later use.
1653     std::string N(MF->getFunction().hasName()
1654                       ? Twine(MF->getFunction().getName()).concat("_").str()
1655                       : "");
1656 
1657     CurrentFnEPMarkerSym =
1658         OutContext.createTempSymbol(Twine("EPM_").concat(N).str(), true);
1659     CurrentFnPPA1Sym =
1660         OutContext.createTempSymbol(Twine("PPA1_").concat(N).str(), true);
1661 
1662     // EntryPoint Marker
1663     const MachineFrameInfo &MFFrame = MF->getFrameInfo();
1664     bool IsUsingAlloca = MFFrame.hasVarSizedObjects();
1665     uint32_t DSASize = MFFrame.getStackSize();
1666     bool IsLeaf = DSASize == 0 && MFFrame.getCalleeSavedInfo().empty();
1667 
1668     // Set Flags.
1669     uint8_t Flags = 0;
1670     if (IsLeaf)
1671       Flags |= 0x08;
1672     if (IsUsingAlloca)
1673       Flags |= 0x04;
1674 
1675     // Combine into top 27 bits of DSASize and bottom 5 bits of Flags.
1676     uint32_t DSAAndFlags = DSASize & 0xFFFFFFE0; // (x/32) << 5
1677     DSAAndFlags |= Flags;
1678 
1679     // Emit entry point marker section.
1680     OutStreamer->AddComment("XPLINK Routine Layout Entry");
1681     OutStreamer->emitLabel(CurrentFnEPMarkerSym);
1682     OutStreamer->AddComment("Eyecatcher 0x00C300C500C500");
1683     OutStreamer->emitIntValueInHex(0x00C300C500C500, 7); // Eyecatcher.
1684     OutStreamer->AddComment("Mark Type C'1'");
1685     OutStreamer->emitInt8(0xF1); // Mark Type.
1686     OutStreamer->AddComment("Offset to PPA1");
1687     OutStreamer->emitAbsoluteSymbolDiff(CurrentFnPPA1Sym, CurrentFnEPMarkerSym,
1688                                         4);
1689     if (OutStreamer->isVerboseAsm()) {
1690       OutStreamer->AddComment("DSA Size 0x" + Twine::utohexstr(DSASize));
1691       OutStreamer->AddComment("Entry Flags");
1692       if (Flags & 0x08)
1693         OutStreamer->AddComment("  Bit 1: 1 = Leaf function");
1694       else
1695         OutStreamer->AddComment("  Bit 1: 0 = Non-leaf function");
1696       if (Flags & 0x04)
1697         OutStreamer->AddComment("  Bit 2: 1 = Uses alloca");
1698       else
1699         OutStreamer->AddComment("  Bit 2: 0 = Does not use alloca");
1700     }
1701     OutStreamer->emitInt32(DSAAndFlags);
1702   }
1703 
1704   AsmPrinter::emitFunctionEntryLabel();
1705 }
1706 
1707 // Force static initialization.
1708 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZAsmPrinter() {
1709   RegisterAsmPrinter<SystemZAsmPrinter> X(getTheSystemZTarget());
1710 }
1711