xref: /llvm-project/llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.cpp (revision 708a478d6739aea20a8834cea45490f05b07ca10)
129463612SCraig Topper //=- RISCVMachineFunctionInfo.cpp - RISC-V machine function info --*- C++ -*-=//
2690085c9SKito Cheng //
3690085c9SKito Cheng // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4690085c9SKito Cheng // See https://llvm.org/LICENSE.txt for license information.
5690085c9SKito Cheng // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6690085c9SKito Cheng //
7690085c9SKito Cheng //===----------------------------------------------------------------------===//
8690085c9SKito Cheng //
9690085c9SKito Cheng // This file declares RISCV-specific per-machine-function information.
10690085c9SKito Cheng //
11690085c9SKito Cheng //===----------------------------------------------------------------------===//
12690085c9SKito Cheng 
13690085c9SKito Cheng #include "RISCVMachineFunctionInfo.h"
14*708a478dSRaphael Moreira Zinsly #include "llvm/IR/Module.h"
15690085c9SKito Cheng 
16690085c9SKito Cheng using namespace llvm;
17690085c9SKito Cheng 
18690085c9SKito Cheng yaml::RISCVMachineFunctionInfo::RISCVMachineFunctionInfo(
19690085c9SKito Cheng     const llvm::RISCVMachineFunctionInfo &MFI)
20690085c9SKito Cheng     : VarArgsFrameIndex(MFI.getVarArgsFrameIndex()),
21690085c9SKito Cheng       VarArgsSaveSize(MFI.getVarArgsSaveSize()) {}
22690085c9SKito Cheng 
23cc5a1b3dSMatt Arsenault MachineFunctionInfo *RISCVMachineFunctionInfo::clone(
24cc5a1b3dSMatt Arsenault     BumpPtrAllocator &Allocator, MachineFunction &DestMF,
25cc5a1b3dSMatt Arsenault     const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
26cc5a1b3dSMatt Arsenault     const {
27cc5a1b3dSMatt Arsenault   return DestMF.cloneInfo<RISCVMachineFunctionInfo>(*this);
28cc5a1b3dSMatt Arsenault }
29cc5a1b3dSMatt Arsenault 
30*708a478dSRaphael Moreira Zinsly RISCVMachineFunctionInfo::RISCVMachineFunctionInfo(const Function &F,
31*708a478dSRaphael Moreira Zinsly                                                    const RISCVSubtarget *STI) {
32*708a478dSRaphael Moreira Zinsly 
33*708a478dSRaphael Moreira Zinsly   // The default stack probe size is 4096 if the function has no
34*708a478dSRaphael Moreira Zinsly   // stack-probe-size attribute. This is a safe default because it is the
35*708a478dSRaphael Moreira Zinsly   // smallest possible guard page size.
36*708a478dSRaphael Moreira Zinsly   uint64_t ProbeSize = 4096;
37*708a478dSRaphael Moreira Zinsly   if (F.hasFnAttribute("stack-probe-size"))
38*708a478dSRaphael Moreira Zinsly     ProbeSize = F.getFnAttributeAsParsedInteger("stack-probe-size");
39*708a478dSRaphael Moreira Zinsly   else if (const auto *PS = mdconst::extract_or_null<ConstantInt>(
40*708a478dSRaphael Moreira Zinsly                F.getParent()->getModuleFlag("stack-probe-size")))
41*708a478dSRaphael Moreira Zinsly     ProbeSize = PS->getZExtValue();
42*708a478dSRaphael Moreira Zinsly   assert(int64_t(ProbeSize) > 0 && "Invalid stack probe size");
43*708a478dSRaphael Moreira Zinsly 
44*708a478dSRaphael Moreira Zinsly   // Round down to the stack alignment.
45*708a478dSRaphael Moreira Zinsly   uint64_t StackAlign =
46*708a478dSRaphael Moreira Zinsly       STI->getFrameLowering()->getTransientStackAlign().value();
47*708a478dSRaphael Moreira Zinsly   ProbeSize = std::max(StackAlign, alignDown(ProbeSize, StackAlign));
48*708a478dSRaphael Moreira Zinsly   StringRef ProbeKind;
49*708a478dSRaphael Moreira Zinsly   if (F.hasFnAttribute("probe-stack"))
50*708a478dSRaphael Moreira Zinsly     ProbeKind = F.getFnAttribute("probe-stack").getValueAsString();
51*708a478dSRaphael Moreira Zinsly   else if (const auto *PS = dyn_cast_or_null<MDString>(
52*708a478dSRaphael Moreira Zinsly                F.getParent()->getModuleFlag("probe-stack")))
53*708a478dSRaphael Moreira Zinsly     ProbeKind = PS->getString();
54*708a478dSRaphael Moreira Zinsly   if (ProbeKind.size()) {
55*708a478dSRaphael Moreira Zinsly     StackProbeSize = ProbeSize;
56*708a478dSRaphael Moreira Zinsly   }
57*708a478dSRaphael Moreira Zinsly }
58*708a478dSRaphael Moreira Zinsly 
59690085c9SKito Cheng void yaml::RISCVMachineFunctionInfo::mappingImpl(yaml::IO &YamlIO) {
60690085c9SKito Cheng   MappingTraits<RISCVMachineFunctionInfo>::mapping(YamlIO, *this);
61690085c9SKito Cheng }
62690085c9SKito Cheng 
63690085c9SKito Cheng void RISCVMachineFunctionInfo::initializeBaseYamlFields(
64690085c9SKito Cheng     const yaml::RISCVMachineFunctionInfo &YamlMFI) {
65690085c9SKito Cheng   VarArgsFrameIndex = YamlMFI.VarArgsFrameIndex;
66690085c9SKito Cheng   VarArgsSaveSize = YamlMFI.VarArgsSaveSize;
67690085c9SKito Cheng }
68ece4bb5aSCraig Topper 
69ece4bb5aSCraig Topper void RISCVMachineFunctionInfo::addSExt32Register(Register Reg) {
70ece4bb5aSCraig Topper   SExt32Registers.push_back(Reg);
71ece4bb5aSCraig Topper }
72ece4bb5aSCraig Topper 
73ece4bb5aSCraig Topper bool RISCVMachineFunctionInfo::isSExt32Register(Register Reg) const {
74ece4bb5aSCraig Topper   return is_contained(SExt32Registers, Reg);
75ece4bb5aSCraig Topper }
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