1 //===---------- PPCTLSDynamicCall.cpp - TLS Dynamic Call Fixup ------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This pass expands ADDItls{ld,gd}LADDR[32] machine instructions into 11 // separate ADDItls[gd]L[32] and GETtlsADDR[32] instructions, both of 12 // which define GPR3. A copy is added from GPR3 to the target virtual 13 // register of the original instruction. The GETtlsADDR[32] is really 14 // a call instruction, so its target register is constrained to be GPR3. 15 // This is not true of ADDItls[gd]L[32], but there is a legacy linker 16 // optimization bug that requires the target register of the addi of 17 // a local- or general-dynamic TLS access sequence to be GPR3. 18 // 19 // This is done in a late pass so that TLS variable accesses can be 20 // fully commoned by MachineCSE. 21 // 22 //===----------------------------------------------------------------------===// 23 24 #include "PPCInstrInfo.h" 25 #include "PPC.h" 26 #include "PPCInstrBuilder.h" 27 #include "PPCTargetMachine.h" 28 #include "llvm/CodeGen/LiveIntervalAnalysis.h" 29 #include "llvm/CodeGen/MachineFunctionPass.h" 30 #include "llvm/CodeGen/MachineInstrBuilder.h" 31 #include "llvm/Support/Debug.h" 32 #include "llvm/Support/raw_ostream.h" 33 34 using namespace llvm; 35 36 #define DEBUG_TYPE "ppc-tls-dynamic-call" 37 38 namespace llvm { 39 void initializePPCTLSDynamicCallPass(PassRegistry&); 40 } 41 42 namespace { 43 struct PPCTLSDynamicCall : public MachineFunctionPass { 44 static char ID; 45 PPCTLSDynamicCall() : MachineFunctionPass(ID) { 46 initializePPCTLSDynamicCallPass(*PassRegistry::getPassRegistry()); 47 } 48 49 const PPCInstrInfo *TII; 50 LiveIntervals *LIS; 51 52 protected: 53 bool processBlock(MachineBasicBlock &MBB) { 54 bool Changed = false; 55 bool Is64Bit = MBB.getParent()->getSubtarget<PPCSubtarget>().isPPC64(); 56 57 for (MachineBasicBlock::iterator I = MBB.begin(), IE = MBB.end(); 58 I != IE;) { 59 MachineInstr *MI = I; 60 61 if (MI->getOpcode() != PPC::ADDItlsgdLADDR && 62 MI->getOpcode() != PPC::ADDItlsldLADDR && 63 MI->getOpcode() != PPC::ADDItlsgdLADDR32 && 64 MI->getOpcode() != PPC::ADDItlsldLADDR32) { 65 ++I; 66 continue; 67 } 68 69 DEBUG(dbgs() << "TLS Dynamic Call Fixup:\n " << *MI;); 70 71 unsigned OutReg = MI->getOperand(0).getReg(); 72 unsigned InReg = MI->getOperand(1).getReg(); 73 DebugLoc DL = MI->getDebugLoc(); 74 unsigned GPR3 = Is64Bit ? PPC::X3 : PPC::R3; 75 unsigned Opc1, Opc2; 76 SmallVector<unsigned, 4> OrigRegs; 77 OrigRegs.push_back(OutReg); 78 OrigRegs.push_back(InReg); 79 OrigRegs.push_back(GPR3); 80 81 switch (MI->getOpcode()) { 82 default: 83 llvm_unreachable("Opcode inconsistency error"); 84 case PPC::ADDItlsgdLADDR: 85 Opc1 = PPC::ADDItlsgdL; 86 Opc2 = PPC::GETtlsADDR; 87 break; 88 case PPC::ADDItlsldLADDR: 89 Opc1 = PPC::ADDItlsldL; 90 Opc2 = PPC::GETtlsldADDR; 91 break; 92 case PPC::ADDItlsgdLADDR32: 93 Opc1 = PPC::ADDItlsgdL32; 94 Opc2 = PPC::GETtlsADDR32; 95 break; 96 case PPC::ADDItlsldLADDR32: 97 Opc1 = PPC::ADDItlsldL32; 98 Opc2 = PPC::GETtlsldADDR32; 99 break; 100 } 101 102 // Don't really need to save data to the stack - the clobbered 103 // registers are already saved when the SDNode (e.g. PPCaddiTlsgdLAddr) 104 // gets translated to the pseudo instruction (e.g. ADDItlsgdLADDR). 105 BuildMI(MBB, I, DL, TII->get(PPC::ADJCALLSTACKDOWN)).addImm(0); 106 107 // Expand into two ops built prior to the existing instruction. 108 MachineInstr *Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3) 109 .addReg(InReg); 110 Addi->addOperand(MI->getOperand(2)); 111 112 // The ADDItls* instruction is the first instruction in the 113 // repair range. 114 MachineBasicBlock::iterator First = I; 115 --First; 116 117 MachineInstr *Call = (BuildMI(MBB, I, DL, TII->get(Opc2), GPR3) 118 .addReg(GPR3)); 119 Call->addOperand(MI->getOperand(3)); 120 121 BuildMI(MBB, I, DL, TII->get(PPC::ADJCALLSTACKUP)).addImm(0).addImm(0); 122 123 BuildMI(MBB, I, DL, TII->get(TargetOpcode::COPY), OutReg) 124 .addReg(GPR3); 125 126 // The COPY is the last instruction in the repair range. 127 MachineBasicBlock::iterator Last = I; 128 --Last; 129 130 // Move past the original instruction and remove it. 131 ++I; 132 MI->removeFromParent(); 133 134 // Repair the live intervals. 135 LIS->repairIntervalsInRange(&MBB, First, Last, OrigRegs); 136 Changed = true; 137 } 138 139 return Changed; 140 } 141 142 public: 143 bool runOnMachineFunction(MachineFunction &MF) override { 144 TII = MF.getSubtarget<PPCSubtarget>().getInstrInfo(); 145 LIS = &getAnalysis<LiveIntervals>(); 146 147 bool Changed = false; 148 149 for (MachineFunction::iterator I = MF.begin(); I != MF.end();) { 150 MachineBasicBlock &B = *I++; 151 if (processBlock(B)) 152 Changed = true; 153 } 154 155 return Changed; 156 } 157 158 void getAnalysisUsage(AnalysisUsage &AU) const override { 159 AU.addRequired<LiveIntervals>(); 160 AU.addPreserved<LiveIntervals>(); 161 AU.addRequired<SlotIndexes>(); 162 AU.addPreserved<SlotIndexes>(); 163 MachineFunctionPass::getAnalysisUsage(AU); 164 } 165 }; 166 } 167 168 INITIALIZE_PASS_BEGIN(PPCTLSDynamicCall, DEBUG_TYPE, 169 "PowerPC TLS Dynamic Call Fixup", false, false) 170 INITIALIZE_PASS_DEPENDENCY(LiveIntervals) 171 INITIALIZE_PASS_DEPENDENCY(SlotIndexes) 172 INITIALIZE_PASS_END(PPCTLSDynamicCall, DEBUG_TYPE, 173 "PowerPC TLS Dynamic Call Fixup", false, false) 174 175 char PPCTLSDynamicCall::ID = 0; 176 FunctionPass* 177 llvm::createPPCTLSDynamicCallPass() { return new PPCTLSDynamicCall(); } 178