xref: /llvm-project/llvm/lib/Target/PowerPC/PPCMachineScheduler.cpp (revision 449bfdd1b02bf441f6862dac1169bb5208eaccbc)
1 //===- PPCMachineScheduler.cpp - MI Scheduler for PowerPC -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 #include "PPC.h"
9 #include "PPCMachineScheduler.h"
10 using namespace llvm;
11 
12 static cl::opt<bool>
13 DisableAddiLoadHeuristic("disable-ppc-sched-addi-load",
14                          cl::desc("Disable scheduling addi instruction before"
15                                   "load for ppc"), cl::Hidden);
16 
17 bool PPCPreRASchedStrategy::biasAddiLoadCandidate(SchedCandidate &Cand,
18                                                   SchedCandidate &TryCand,
19                                                   SchedBoundary &Zone) const {
20   if (DisableAddiLoadHeuristic)
21     return false;
22 
23   auto isADDIInstr = [&] (const MachineInstr &Inst) {
24     return Inst.getOpcode() == PPC::ADDI || Inst.getOpcode() == PPC::ADDI8;
25   };
26 
27   SchedCandidate &FirstCand = Zone.isTop() ? TryCand : Cand;
28   SchedCandidate &SecondCand = Zone.isTop() ? Cand : TryCand;
29   if (isADDIInstr(*FirstCand.SU->getInstr()) &&
30       SecondCand.SU->getInstr()->mayLoad()) {
31     TryCand.Reason = Stall;
32     return true;
33   }
34   if (FirstCand.SU->getInstr()->mayLoad() &&
35       isADDIInstr(*SecondCand.SU->getInstr())) {
36     TryCand.Reason = NoCand;
37     return true;
38   }
39 
40   return false;
41 }
42 
43 void PPCPreRASchedStrategy::tryCandidate(SchedCandidate &Cand,
44                                          SchedCandidate &TryCand,
45                                          SchedBoundary *Zone) const {
46   GenericScheduler::tryCandidate(Cand, TryCand, Zone);
47 
48   if (!Cand.isValid() || !Zone)
49     return;
50 
51   // Add powerpc specific heuristic only when TryCand isn't selected or
52   // selected as node order.
53   if (TryCand.Reason != NodeOrder && TryCand.Reason != NoCand)
54     return;
55 
56   // There are some benefits to schedule the ADDI before the load to hide the
57   // latency, as RA may create a true dependency between the load and addi.
58   if (biasAddiLoadCandidate(Cand, TryCand, *Zone))
59     return;
60 }
61 
62 void PPCPostRASchedStrategy::enterMBB(MachineBasicBlock *MBB) {
63   // Custom PPC PostRA specific behavior here.
64   PostGenericScheduler::enterMBB(MBB);
65 }
66 
67 void PPCPostRASchedStrategy::leaveMBB() {
68   // Custom PPC PostRA specific behavior here.
69   PostGenericScheduler::leaveMBB();
70 }
71 
72 void PPCPostRASchedStrategy::initialize(ScheduleDAGMI *Dag) {
73   // Custom PPC PostRA specific initialization here.
74   PostGenericScheduler::initialize(Dag);
75 }
76 
77 SUnit *PPCPostRASchedStrategy::pickNode(bool &IsTopNode) {
78   // Custom PPC PostRA specific scheduling here.
79   return PostGenericScheduler::pickNode(IsTopNode);
80 }
81 
82