xref: /llvm-project/llvm/lib/Target/PowerPC/PPCGenRegisterBankInfo.def (revision c4821073cdba29c747c50e818cf39c269f88e4fd)
1a617ff0bSBenjamin Kramer//===- PPCGenRegisterBankInfo.def -------------------------------*- C++ -*-==//
2a617ff0bSBenjamin Kramer//
3a617ff0bSBenjamin Kramer// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4a617ff0bSBenjamin Kramer// See https://llvm.org/LICENSE.txt for license information.
5a617ff0bSBenjamin Kramer// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6a617ff0bSBenjamin Kramer//
7a617ff0bSBenjamin Kramer//===----------------------------------------------------------------------===//
8a617ff0bSBenjamin Kramer/// \file
9a617ff0bSBenjamin Kramer/// This file defines all the static objects used by PPCRegisterBankInfo.
10a617ff0bSBenjamin Kramer/// \todo This should be generated by TableGen, because the logic here can be
11a617ff0bSBenjamin Kramer///  derived from register bank definition. Not yet implemented.
12a617ff0bSBenjamin Kramer//===----------------------------------------------------------------------===//
13a617ff0bSBenjamin Kramer
14a617ff0bSBenjamin Kramernamespace llvm {
15*c4821073SCraig Topperconst RegisterBankInfo::PartialMapping PPCGenRegisterBankInfo::PartMappings[]{
16a617ff0bSBenjamin Kramer    /* StartIdx, Length, RegBank */
17b41d22dbSChen Zheng    // 0: GPR 32-bit value.
18b41d22dbSChen Zheng    {0, 32, PPC::GPRRegBank},
19b41d22dbSChen Zheng    // 1: GPR 64-bit value.
20a617ff0bSBenjamin Kramer    {0, 64, PPC::GPRRegBank},
21b41d22dbSChen Zheng    // 2: FPR 32-bit value
22d9143ce3SChen Zheng    {0, 32, PPC::FPRRegBank},
23b41d22dbSChen Zheng    // 3: FPR 64-bit value
24d9143ce3SChen Zheng    {0, 64, PPC::FPRRegBank},
253508f123SAmy Kwan    // 4: 128-bit vector (VSX, Altivec)
263508f123SAmy Kwan    {0, 128, PPC::VECRegBank},
273508f123SAmy Kwan    // 5: CR 4-bit value
28ac93a4e7SChen Zheng    {0, 4, PPC::CRRegBank},
29a617ff0bSBenjamin Kramer};
30a617ff0bSBenjamin Kramer
31a617ff0bSBenjamin Kramer// ValueMappings.
32a617ff0bSBenjamin Kramer// Pointers to the entries in this array are returned by getValueMapping() and
33a617ff0bSBenjamin Kramer// getCopyMapping().
34a617ff0bSBenjamin Kramer//
35a617ff0bSBenjamin Kramer// The array has the following structure:
36a617ff0bSBenjamin Kramer// - At index 0 is the invalid entry.
37a617ff0bSBenjamin Kramer// - After that, the mappings for the register types from PartialMappingIdx
38a617ff0bSBenjamin Kramer//   follow. Each mapping consists of 3 entries, which is needed to cover
39a617ff0bSBenjamin Kramer//   3-operands instructions.
40a617ff0bSBenjamin Kramer// - Last, mappings for cross-register bank moves follow. Since COPY has only
41a617ff0bSBenjamin Kramer//   2 operands, a mapping consists of 2 entries.
42*c4821073SCraig Topperconst RegisterBankInfo::ValueMapping PPCGenRegisterBankInfo::ValMappings[]{
43a617ff0bSBenjamin Kramer    /* BreakDown, NumBreakDowns */
44a617ff0bSBenjamin Kramer    // 0: invalid
45a617ff0bSBenjamin Kramer    {nullptr, 0},
46b41d22dbSChen Zheng    // 1: GPR 32-bit value.
47b41d22dbSChen Zheng    {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR32 - PMI_Min], 1},
48b41d22dbSChen Zheng    {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR32 - PMI_Min], 1},
49b41d22dbSChen Zheng    {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR32 - PMI_Min], 1},
50b41d22dbSChen Zheng    // 4: GPR 64-bit value.
51a617ff0bSBenjamin Kramer    {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR64 - PMI_Min], 1},
52a617ff0bSBenjamin Kramer    {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR64 - PMI_Min], 1},
53a617ff0bSBenjamin Kramer    {&PPCGenRegisterBankInfo::PartMappings[PMI_GPR64 - PMI_Min], 1},
54b41d22dbSChen Zheng    // 7: FPR 32-bit value.
55d9143ce3SChen Zheng    {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR32 - PMI_Min], 1},
56d9143ce3SChen Zheng    {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR32 - PMI_Min], 1},
57d9143ce3SChen Zheng    {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR32 - PMI_Min], 1},
58b41d22dbSChen Zheng    // 10: FPR 64-bit value.
59d9143ce3SChen Zheng    {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR64 - PMI_Min], 1},
60d9143ce3SChen Zheng    {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR64 - PMI_Min], 1},
61d9143ce3SChen Zheng    {&PPCGenRegisterBankInfo::PartMappings[PMI_FPR64 - PMI_Min], 1},
623508f123SAmy Kwan    // 13: 128-bit vector.
633508f123SAmy Kwan    {&PPCGenRegisterBankInfo::PartMappings[PMI_VEC128 - PMI_Min], 1},
643508f123SAmy Kwan    {&PPCGenRegisterBankInfo::PartMappings[PMI_VEC128 - PMI_Min], 1},
653508f123SAmy Kwan    {&PPCGenRegisterBankInfo::PartMappings[PMI_VEC128 - PMI_Min], 1},
663508f123SAmy Kwan    // 16: CR 4-bit value.
67ac93a4e7SChen Zheng    {&PPCGenRegisterBankInfo::PartMappings[PMI_CR - PMI_Min], 1},
68a617ff0bSBenjamin Kramer};
69a617ff0bSBenjamin Kramer
70a617ff0bSBenjamin Kramer// TODO Too simple!
71a617ff0bSBenjamin Kramerconst RegisterBankInfo::ValueMapping *
72a617ff0bSBenjamin KramerPPCGenRegisterBankInfo::getValueMapping(PartialMappingIdx RBIdx) {
73a617ff0bSBenjamin Kramer  assert(RBIdx != PartialMappingIdx::PMI_None && "No mapping needed for that");
74a617ff0bSBenjamin Kramer
75a617ff0bSBenjamin Kramer  unsigned ValMappingIdx = RBIdx - PMI_Min;
76a617ff0bSBenjamin Kramer
77a617ff0bSBenjamin Kramer  return &ValMappings[1 + 3 * ValMappingIdx];
78a617ff0bSBenjamin Kramer}
79a617ff0bSBenjamin Kramer
80*c4821073SCraig Topperconst PPCGenRegisterBankInfo::PartialMappingIdx
813508f123SAmy Kwan  PPCGenRegisterBankInfo::BankIDToCopyMapIdx[]{
823508f123SAmy Kwan    PMI_None,
833508f123SAmy Kwan    PMI_FPR64,  // FPR
843508f123SAmy Kwan    PMI_GPR64,  // GPR
853508f123SAmy Kwan    PMI_VEC128, // VEC
863508f123SAmy Kwan};
873508f123SAmy Kwan
88a617ff0bSBenjamin Kramer// TODO Too simple!
89a617ff0bSBenjamin Kramerconst RegisterBankInfo::ValueMapping *
90a617ff0bSBenjamin KramerPPCGenRegisterBankInfo::getCopyMapping(unsigned DstBankID, unsigned SrcBankID,
91a617ff0bSBenjamin Kramer                                       unsigned Size) {
92a617ff0bSBenjamin Kramer  assert(DstBankID < PPC::NumRegisterBanks && "Invalid bank ID");
93a617ff0bSBenjamin Kramer  assert(SrcBankID < PPC::NumRegisterBanks && "Invalid bank ID");
943508f123SAmy Kwan  PartialMappingIdx DstRBIdx = BankIDToCopyMapIdx[DstBankID];
953508f123SAmy Kwan  PartialMappingIdx SrcRBIdx = BankIDToCopyMapIdx[SrcBankID];
963508f123SAmy Kwan  assert(DstRBIdx != PMI_None && "No such mapping");
973508f123SAmy Kwan  assert(SrcRBIdx != PMI_None && "No such mapping");
98a617ff0bSBenjamin Kramer
993508f123SAmy Kwan  if (DstRBIdx == SrcRBIdx)
1003508f123SAmy Kwan    return getValueMapping(DstRBIdx);
1013508f123SAmy Kwan
1023508f123SAmy Kwan  assert(Size <= 128 && "Can currently handle types up to 128 bits (vectors)!");
1033508f123SAmy Kwan  // TODO: This function needs to be updated to handle all cases for
1043508f123SAmy Kwan  //       GPRs, FPRs and vectors. It currently only handles bitcasting to
1053508f123SAmy Kwan  //       the same type and has only mainly been tested for bitcasting
1063508f123SAmy Kwan  //       between different vector types.
1073508f123SAmy Kwan  unsigned ValMappingIdx = DstRBIdx - PMI_Min;
1083508f123SAmy Kwan
1093508f123SAmy Kwan  return &ValMappings[1 + 3 * ValMappingIdx];
110a617ff0bSBenjamin Kramer}
111a617ff0bSBenjamin Kramer
112a617ff0bSBenjamin Kramer} // namespace llvm
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