xref: /llvm-project/llvm/lib/Target/Mips/MipsMachineFunction.cpp (revision 2020e27d6dbaad6eeab8116ec7b343ef5426d14a)
1 //===-- MipsMachineFunctionInfo.cpp - Private data used for Mips ----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #include "MipsMachineFunction.h"
11 #include "MipsInstrInfo.h"
12 #include "MipsSubtarget.h"
13 #include "MCTargetDesc/MipsBaseInfo.h"
14 #include "llvm/Function.h"
15 #include "llvm/CodeGen/MachineInstrBuilder.h"
16 #include "llvm/CodeGen/MachineRegisterInfo.h"
17 #include "llvm/Support/CommandLine.h"
18 
19 using namespace llvm;
20 
21 static cl::opt<bool>
22 FixGlobalBaseReg("mips-fix-global-base-reg", cl::Hidden, cl::init(true),
23                  cl::desc("Always use $gp as the global base register."));
24 
25 bool MipsFunctionInfo::globalBaseRegFixed() const {
26   return FixGlobalBaseReg;
27 }
28 
29 bool MipsFunctionInfo::globalBaseRegSet() const {
30   return GlobalBaseReg;
31 }
32 
33 unsigned MipsFunctionInfo::getGlobalBaseReg() {
34   // Return if it has already been initialized.
35   if (GlobalBaseReg)
36     return GlobalBaseReg;
37 
38   const MipsSubtarget &ST = MF.getTarget().getSubtarget<MipsSubtarget>();
39 
40   if (FixGlobalBaseReg && ST.isABI_O32()) // $gp is the global base register.
41     return GlobalBaseReg = Mips::GP;
42 
43   const TargetRegisterClass *RC = ST.isABI_N64() ?
44     (const TargetRegisterClass*)&Mips::CPU64RegsRegClass :
45     (const TargetRegisterClass*)&Mips::CPURegsRegClass;
46 
47   return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
48 }
49 
50 void MipsFunctionInfo::anchor() { }
51