1 //===-- MipsELFObjectWriter.cpp - Mips ELF Writer -------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "MCTargetDesc/MipsFixupKinds.h" 10 #include "MCTargetDesc/MipsMCTargetDesc.h" 11 #include "llvm/ADT/STLExtras.h" 12 #include "llvm/BinaryFormat/ELF.h" 13 #include "llvm/MC/MCContext.h" 14 #include "llvm/MC/MCELFObjectWriter.h" 15 #include "llvm/MC/MCFixup.h" 16 #include "llvm/MC/MCObjectWriter.h" 17 #include "llvm/MC/MCSymbolELF.h" 18 #include "llvm/Support/Casting.h" 19 #include "llvm/Support/Compiler.h" 20 #include "llvm/Support/Debug.h" 21 #include "llvm/Support/ErrorHandling.h" 22 #include "llvm/Support/MathExtras.h" 23 #include "llvm/Support/raw_ostream.h" 24 #include <algorithm> 25 #include <cassert> 26 #include <cstdint> 27 #include <iterator> 28 #include <list> 29 #include <utility> 30 31 #define DEBUG_TYPE "mips-elf-object-writer" 32 33 using namespace llvm; 34 35 namespace { 36 37 /// Holds additional information needed by the relocation ordering algorithm. 38 struct MipsRelocationEntry { 39 const ELFRelocationEntry R; ///< The relocation. 40 bool Matched = false; ///< Is this relocation part of a match. 41 42 MipsRelocationEntry(const ELFRelocationEntry &R) : R(R) {} 43 }; 44 45 class MipsELFObjectWriter : public MCELFObjectTargetWriter { 46 public: 47 MipsELFObjectWriter(uint8_t OSABI, bool HasRelocationAddend, bool Is64); 48 49 ~MipsELFObjectWriter() override = default; 50 51 unsigned getRelocType(MCContext &Ctx, const MCValue &Target, 52 const MCFixup &Fixup, bool IsPCRel) const override; 53 bool needsRelocateWithSymbol(const MCValue &Val, const MCSymbol &Sym, 54 unsigned Type) const override; 55 void sortRelocs(const MCAssembler &Asm, 56 std::vector<ELFRelocationEntry> &Relocs) override; 57 }; 58 59 /// The possible results of the Predicate function used by find_best. 60 enum FindBestPredicateResult { 61 FindBest_NoMatch = 0, ///< The current element is not a match. 62 FindBest_Match, ///< The current element is a match but better ones are 63 /// possible. 64 FindBest_PerfectMatch, ///< The current element is an unbeatable match. 65 }; 66 67 } // end anonymous namespace 68 69 /// Copy elements in the range [First, Last) to d1 when the predicate is true or 70 /// d2 when the predicate is false. This is essentially both std::copy_if and 71 /// std::remove_copy_if combined into a single pass. 72 template <class InputIt, class OutputIt1, class OutputIt2, class UnaryPredicate> 73 static std::pair<OutputIt1, OutputIt2> copy_if_else(InputIt First, InputIt Last, 74 OutputIt1 d1, OutputIt2 d2, 75 UnaryPredicate Predicate) { 76 for (InputIt I = First; I != Last; ++I) { 77 if (Predicate(*I)) { 78 *d1 = *I; 79 d1++; 80 } else { 81 *d2 = *I; 82 d2++; 83 } 84 } 85 86 return std::make_pair(d1, d2); 87 } 88 89 /// Find the best match in the range [First, Last). 90 /// 91 /// An element matches when Predicate(X) returns FindBest_Match or 92 /// FindBest_PerfectMatch. A value of FindBest_PerfectMatch also terminates 93 /// the search. BetterThan(A, B) is a comparator that returns true when A is a 94 /// better match than B. The return value is the position of the best match. 95 /// 96 /// This is similar to std::find_if but finds the best of multiple possible 97 /// matches. 98 template <class InputIt, class UnaryPredicate, class Comparator> 99 static InputIt find_best(InputIt First, InputIt Last, UnaryPredicate Predicate, 100 Comparator BetterThan) { 101 InputIt Best = Last; 102 103 for (InputIt I = First; I != Last; ++I) { 104 unsigned Matched = Predicate(*I); 105 if (Matched != FindBest_NoMatch) { 106 if (Best == Last || BetterThan(*I, *Best)) 107 Best = I; 108 } 109 if (Matched == FindBest_PerfectMatch) 110 break; 111 } 112 113 return Best; 114 } 115 116 /// Determine the low relocation that matches the given relocation. 117 /// If the relocation does not need a low relocation then the return value 118 /// is ELF::R_MIPS_NONE. 119 /// 120 /// The relocations that need a matching low part are 121 /// R_(MIPS|MICROMIPS|MIPS16)_HI16 for all symbols and 122 /// R_(MIPS|MICROMIPS|MIPS16)_GOT16 for local symbols only. 123 static unsigned getMatchingLoType(const ELFRelocationEntry &Reloc) { 124 unsigned Type = Reloc.Type; 125 if (Type == ELF::R_MIPS_HI16) 126 return ELF::R_MIPS_LO16; 127 if (Type == ELF::R_MICROMIPS_HI16) 128 return ELF::R_MICROMIPS_LO16; 129 if (Type == ELF::R_MIPS16_HI16) 130 return ELF::R_MIPS16_LO16; 131 132 if (Reloc.Symbol && Reloc.Symbol->getBinding() != ELF::STB_LOCAL) 133 return ELF::R_MIPS_NONE; 134 135 if (Type == ELF::R_MIPS_GOT16) 136 return ELF::R_MIPS_LO16; 137 if (Type == ELF::R_MICROMIPS_GOT16) 138 return ELF::R_MICROMIPS_LO16; 139 if (Type == ELF::R_MIPS16_GOT16) 140 return ELF::R_MIPS16_LO16; 141 142 return ELF::R_MIPS_NONE; 143 } 144 145 // Determine whether a relocation X is a low-part and matches the high-part R 146 // perfectly by symbol and addend. 147 static bool isMatchingReloc(unsigned MatchingType, const ELFRelocationEntry &R, 148 const ELFRelocationEntry &X) { 149 return X.Type == MatchingType && X.Symbol == R.Symbol && X.Addend == R.Addend; 150 } 151 152 MipsELFObjectWriter::MipsELFObjectWriter(uint8_t OSABI, 153 bool HasRelocationAddend, bool Is64) 154 : MCELFObjectTargetWriter(Is64, OSABI, ELF::EM_MIPS, HasRelocationAddend) {} 155 156 unsigned MipsELFObjectWriter::getRelocType(MCContext &Ctx, 157 const MCValue &Target, 158 const MCFixup &Fixup, 159 bool IsPCRel) const { 160 // Determine the type of the relocation. 161 unsigned Kind = Fixup.getTargetKind(); 162 if (Kind >= FirstLiteralRelocationKind) 163 return Kind - FirstLiteralRelocationKind; 164 165 switch (Kind) { 166 case FK_NONE: 167 return ELF::R_MIPS_NONE; 168 case FK_Data_1: 169 Ctx.reportError(Fixup.getLoc(), 170 "MIPS does not support one byte relocations"); 171 return ELF::R_MIPS_NONE; 172 case Mips::fixup_Mips_16: 173 case FK_Data_2: 174 return IsPCRel ? ELF::R_MIPS_PC16 : ELF::R_MIPS_16; 175 case Mips::fixup_Mips_32: 176 case FK_Data_4: 177 return IsPCRel ? ELF::R_MIPS_PC32 : ELF::R_MIPS_32; 178 case Mips::fixup_Mips_64: 179 case FK_Data_8: 180 return IsPCRel 181 ? setRTypes(ELF::R_MIPS_PC32, ELF::R_MIPS_64, ELF::R_MIPS_NONE) 182 : (unsigned)ELF::R_MIPS_64; 183 } 184 185 if (IsPCRel) { 186 switch (Kind) { 187 case Mips::fixup_Mips_Branch_PCRel: 188 case Mips::fixup_Mips_PC16: 189 return ELF::R_MIPS_PC16; 190 case Mips::fixup_MICROMIPS_PC7_S1: 191 return ELF::R_MICROMIPS_PC7_S1; 192 case Mips::fixup_MICROMIPS_PC10_S1: 193 return ELF::R_MICROMIPS_PC10_S1; 194 case Mips::fixup_MICROMIPS_PC16_S1: 195 return ELF::R_MICROMIPS_PC16_S1; 196 case Mips::fixup_MICROMIPS_PC26_S1: 197 return ELF::R_MICROMIPS_PC26_S1; 198 case Mips::fixup_MICROMIPS_PC19_S2: 199 return ELF::R_MICROMIPS_PC19_S2; 200 case Mips::fixup_MICROMIPS_PC18_S3: 201 return ELF::R_MICROMIPS_PC18_S3; 202 case Mips::fixup_MICROMIPS_PC21_S1: 203 return ELF::R_MICROMIPS_PC21_S1; 204 case Mips::fixup_MIPS_PC19_S2: 205 return ELF::R_MIPS_PC19_S2; 206 case Mips::fixup_MIPS_PC18_S3: 207 return ELF::R_MIPS_PC18_S3; 208 case Mips::fixup_MIPS_PC21_S2: 209 return ELF::R_MIPS_PC21_S2; 210 case Mips::fixup_MIPS_PC26_S2: 211 return ELF::R_MIPS_PC26_S2; 212 case Mips::fixup_MIPS_PCHI16: 213 return ELF::R_MIPS_PCHI16; 214 case Mips::fixup_MIPS_PCLO16: 215 return ELF::R_MIPS_PCLO16; 216 } 217 218 llvm_unreachable("invalid PC-relative fixup kind!"); 219 } 220 221 switch (Kind) { 222 case FK_DTPRel_4: 223 return ELF::R_MIPS_TLS_DTPREL32; 224 case FK_DTPRel_8: 225 return ELF::R_MIPS_TLS_DTPREL64; 226 case FK_TPRel_4: 227 return ELF::R_MIPS_TLS_TPREL32; 228 case FK_TPRel_8: 229 return ELF::R_MIPS_TLS_TPREL64; 230 case FK_GPRel_4: 231 return setRTypes(ELF::R_MIPS_GPREL32, 232 is64Bit() ? ELF::R_MIPS_64 : ELF::R_MIPS_NONE, 233 ELF::R_MIPS_NONE); 234 case Mips::fixup_Mips_GPREL16: 235 return ELF::R_MIPS_GPREL16; 236 case Mips::fixup_Mips_26: 237 return ELF::R_MIPS_26; 238 case Mips::fixup_Mips_CALL16: 239 return ELF::R_MIPS_CALL16; 240 case Mips::fixup_Mips_GOT: 241 return ELF::R_MIPS_GOT16; 242 case Mips::fixup_Mips_HI16: 243 return ELF::R_MIPS_HI16; 244 case Mips::fixup_Mips_LO16: 245 return ELF::R_MIPS_LO16; 246 case Mips::fixup_Mips_TLSGD: 247 return ELF::R_MIPS_TLS_GD; 248 case Mips::fixup_Mips_GOTTPREL: 249 return ELF::R_MIPS_TLS_GOTTPREL; 250 case Mips::fixup_Mips_TPREL_HI: 251 return ELF::R_MIPS_TLS_TPREL_HI16; 252 case Mips::fixup_Mips_TPREL_LO: 253 return ELF::R_MIPS_TLS_TPREL_LO16; 254 case Mips::fixup_Mips_TLSLDM: 255 return ELF::R_MIPS_TLS_LDM; 256 case Mips::fixup_Mips_DTPREL_HI: 257 return ELF::R_MIPS_TLS_DTPREL_HI16; 258 case Mips::fixup_Mips_DTPREL_LO: 259 return ELF::R_MIPS_TLS_DTPREL_LO16; 260 case Mips::fixup_Mips_GOT_PAGE: 261 return ELF::R_MIPS_GOT_PAGE; 262 case Mips::fixup_Mips_GOT_OFST: 263 return ELF::R_MIPS_GOT_OFST; 264 case Mips::fixup_Mips_GOT_DISP: 265 return ELF::R_MIPS_GOT_DISP; 266 case Mips::fixup_Mips_GPOFF_HI: 267 return setRTypes(ELF::R_MIPS_GPREL16, ELF::R_MIPS_SUB, ELF::R_MIPS_HI16); 268 case Mips::fixup_MICROMIPS_GPOFF_HI: 269 return setRTypes(ELF::R_MICROMIPS_GPREL16, ELF::R_MICROMIPS_SUB, 270 ELF::R_MICROMIPS_HI16); 271 case Mips::fixup_Mips_GPOFF_LO: 272 return setRTypes(ELF::R_MIPS_GPREL16, ELF::R_MIPS_SUB, ELF::R_MIPS_LO16); 273 case Mips::fixup_MICROMIPS_GPOFF_LO: 274 return setRTypes(ELF::R_MICROMIPS_GPREL16, ELF::R_MICROMIPS_SUB, 275 ELF::R_MICROMIPS_LO16); 276 case Mips::fixup_Mips_HIGHER: 277 return ELF::R_MIPS_HIGHER; 278 case Mips::fixup_Mips_HIGHEST: 279 return ELF::R_MIPS_HIGHEST; 280 case Mips::fixup_Mips_SUB: 281 return ELF::R_MIPS_SUB; 282 case Mips::fixup_Mips_GOT_HI16: 283 return ELF::R_MIPS_GOT_HI16; 284 case Mips::fixup_Mips_GOT_LO16: 285 return ELF::R_MIPS_GOT_LO16; 286 case Mips::fixup_Mips_CALL_HI16: 287 return ELF::R_MIPS_CALL_HI16; 288 case Mips::fixup_Mips_CALL_LO16: 289 return ELF::R_MIPS_CALL_LO16; 290 case Mips::fixup_MICROMIPS_26_S1: 291 return ELF::R_MICROMIPS_26_S1; 292 case Mips::fixup_MICROMIPS_HI16: 293 return ELF::R_MICROMIPS_HI16; 294 case Mips::fixup_MICROMIPS_LO16: 295 return ELF::R_MICROMIPS_LO16; 296 case Mips::fixup_MICROMIPS_GOT16: 297 return ELF::R_MICROMIPS_GOT16; 298 case Mips::fixup_MICROMIPS_CALL16: 299 return ELF::R_MICROMIPS_CALL16; 300 case Mips::fixup_MICROMIPS_GOT_DISP: 301 return ELF::R_MICROMIPS_GOT_DISP; 302 case Mips::fixup_MICROMIPS_GOT_PAGE: 303 return ELF::R_MICROMIPS_GOT_PAGE; 304 case Mips::fixup_MICROMIPS_GOT_OFST: 305 return ELF::R_MICROMIPS_GOT_OFST; 306 case Mips::fixup_MICROMIPS_TLS_GD: 307 return ELF::R_MICROMIPS_TLS_GD; 308 case Mips::fixup_MICROMIPS_TLS_LDM: 309 return ELF::R_MICROMIPS_TLS_LDM; 310 case Mips::fixup_MICROMIPS_TLS_DTPREL_HI16: 311 return ELF::R_MICROMIPS_TLS_DTPREL_HI16; 312 case Mips::fixup_MICROMIPS_TLS_DTPREL_LO16: 313 return ELF::R_MICROMIPS_TLS_DTPREL_LO16; 314 case Mips::fixup_MICROMIPS_GOTTPREL: 315 return ELF::R_MICROMIPS_TLS_GOTTPREL; 316 case Mips::fixup_MICROMIPS_TLS_TPREL_HI16: 317 return ELF::R_MICROMIPS_TLS_TPREL_HI16; 318 case Mips::fixup_MICROMIPS_TLS_TPREL_LO16: 319 return ELF::R_MICROMIPS_TLS_TPREL_LO16; 320 case Mips::fixup_MICROMIPS_SUB: 321 return ELF::R_MICROMIPS_SUB; 322 case Mips::fixup_MICROMIPS_HIGHER: 323 return ELF::R_MICROMIPS_HIGHER; 324 case Mips::fixup_MICROMIPS_HIGHEST: 325 return ELF::R_MICROMIPS_HIGHEST; 326 case Mips::fixup_Mips_JALR: 327 return ELF::R_MIPS_JALR; 328 case Mips::fixup_MICROMIPS_JALR: 329 return ELF::R_MICROMIPS_JALR; 330 } 331 332 llvm_unreachable("invalid fixup kind!"); 333 } 334 335 /// Sort relocation table entries by offset except where another order is 336 /// required by the MIPS ABI. 337 /// 338 /// MIPS has a few relocations that have an AHL component in the expression used 339 /// to evaluate them. This AHL component is an addend with the same number of 340 /// bits as a symbol value but not all of our ABI's are able to supply a 341 /// sufficiently sized addend in a single relocation. 342 /// 343 /// The O32 ABI for example, uses REL relocations which store the addend in the 344 /// section data. All the relocations with AHL components affect 16-bit fields 345 /// so the addend for a single relocation is limited to 16-bit. This ABI 346 /// resolves the limitation by linking relocations (e.g. R_MIPS_HI16 and 347 /// R_MIPS_LO16) and distributing the addend between the linked relocations. The 348 /// ABI mandates that such relocations must be next to each other in a 349 /// particular order (e.g. R_MIPS_HI16 must be immediately followed by a 350 /// matching R_MIPS_LO16) but the rule is less strict in practice. 351 /// 352 /// The de facto standard is lenient in the following ways: 353 /// - 'Immediately following' does not refer to the next relocation entry but 354 /// the next matching relocation. 355 /// - There may be multiple high parts relocations for one low part relocation. 356 /// - There may be multiple low part relocations for one high part relocation. 357 /// - The AHL addend in each part does not have to be exactly equal as long as 358 /// the difference does not affect the carry bit from bit 15 into 16. This is 359 /// to allow, for example, the use of %lo(foo) and %lo(foo+4) when loading 360 /// both halves of a long long. 361 /// 362 /// See getMatchingLoType() for a description of which high part relocations 363 /// match which low part relocations. One particular thing to note is that 364 /// R_MIPS_GOT16 and similar only have AHL addends if they refer to local 365 /// symbols. 366 /// 367 /// It should also be noted that this function is not affected by whether 368 /// the symbol was kept or rewritten into a section-relative equivalent. We 369 /// always match using the expressions from the source. 370 void MipsELFObjectWriter::sortRelocs(const MCAssembler &Asm, 371 std::vector<ELFRelocationEntry> &Relocs) { 372 // We do not need to sort the relocation table for RELA relocations which 373 // N32/N64 uses as the relocation addend contains the value we require, 374 // rather than it being split across a pair of relocations. 375 if (hasRelocationAddend()) 376 return; 377 378 // Sort relocations by the address they are applied to. 379 llvm::sort(Relocs, 380 [](const ELFRelocationEntry &A, const ELFRelocationEntry &B) { 381 return A.Offset < B.Offset; 382 }); 383 384 // Place relocations in a list for reorder convenience. Hi16 contains the 385 // iterators of high-part relocations. 386 std::list<MipsRelocationEntry> Sorted; 387 SmallVector<std::list<MipsRelocationEntry>::iterator, 0> Hi16; 388 for (auto &R : Relocs) { 389 Sorted.push_back(R); 390 if (getMatchingLoType(R) != ELF::R_MIPS_NONE) 391 Hi16.push_back(std::prev(Sorted.end())); 392 } 393 394 for (auto I : Hi16) { 395 auto &R = I->R; 396 unsigned MatchingType = getMatchingLoType(R); 397 // If the next relocation is a perfect match, continue; 398 if (std::next(I) != Sorted.end() && 399 isMatchingReloc(MatchingType, R, std::next(I)->R)) 400 continue; 401 // Otherwise, find the best matching low-part relocation with the following 402 // criteria. It must have the same symbol and its addend is no lower than 403 // that of the current high-part. 404 // 405 // (1) %lo with a smaller offset is preferred. 406 // (2) %lo with the same offset that is unmatched is preferred. 407 // (3) later %lo is preferred. 408 auto Best = Sorted.end(); 409 for (auto J = Sorted.begin(); J != Sorted.end(); ++J) { 410 auto &R1 = J->R; 411 if (R1.Type == MatchingType && R.Symbol == R1.Symbol && 412 R.Addend <= R1.Addend && 413 (Best == Sorted.end() || R1.Addend < Best->R.Addend || 414 (!Best->Matched && R1.Addend == Best->R.Addend))) 415 Best = J; 416 } 417 if (Best != Sorted.end() && R.Addend == Best->R.Addend) 418 Best->Matched = true; 419 420 // Move the high-part before the low-part, or if not found, the end of the 421 // list. The unmatched high-part will lead to a linker warning/error. 422 Sorted.splice(Best, Sorted, I); 423 } 424 425 assert(Relocs.size() == Sorted.size() && "Some relocs were not consumed"); 426 427 // Overwrite the original vector with the sorted elements. 428 unsigned CopyTo = 0; 429 for (const auto &R : Sorted) 430 Relocs[CopyTo++] = R.R; 431 } 432 433 bool MipsELFObjectWriter::needsRelocateWithSymbol(const MCValue &Val, 434 const MCSymbol &Sym, 435 unsigned Type) const { 436 // If it's a compound relocation for N64 then we need the relocation if any 437 // sub-relocation needs it. 438 if (!isUInt<8>(Type)) 439 return needsRelocateWithSymbol(Val, Sym, Type & 0xff) || 440 needsRelocateWithSymbol(Val, Sym, (Type >> 8) & 0xff) || 441 needsRelocateWithSymbol(Val, Sym, (Type >> 16) & 0xff); 442 443 switch (Type) { 444 default: 445 errs() << Type << "\n"; 446 llvm_unreachable("Unexpected relocation"); 447 return true; 448 449 // This relocation doesn't affect the section data. 450 case ELF::R_MIPS_NONE: 451 return false; 452 453 // On REL ABI's (e.g. O32), these relocations form pairs. The pairing is done 454 // by the static linker by matching the symbol and offset. 455 // We only see one relocation at a time but it's still safe to relocate with 456 // the section so long as both relocations make the same decision. 457 // 458 // Some older linkers may require the symbol for particular cases. Such cases 459 // are not supported yet but can be added as required. 460 case ELF::R_MIPS_GOT16: 461 case ELF::R_MIPS16_GOT16: 462 case ELF::R_MICROMIPS_GOT16: 463 case ELF::R_MIPS_HIGHER: 464 case ELF::R_MIPS_HIGHEST: 465 case ELF::R_MIPS_HI16: 466 case ELF::R_MIPS16_HI16: 467 case ELF::R_MICROMIPS_HI16: 468 case ELF::R_MIPS_LO16: 469 case ELF::R_MIPS16_LO16: 470 case ELF::R_MICROMIPS_LO16: 471 // FIXME: It should be safe to return false for the STO_MIPS_MICROMIPS but 472 // we neglect to handle the adjustment to the LSB of the addend that 473 // it causes in applyFixup() and similar. 474 if (cast<MCSymbolELF>(Sym).getOther() & ELF::STO_MIPS_MICROMIPS) 475 return true; 476 return false; 477 478 case ELF::R_MIPS_GOT_PAGE: 479 case ELF::R_MICROMIPS_GOT_PAGE: 480 case ELF::R_MIPS_GOT_OFST: 481 case ELF::R_MICROMIPS_GOT_OFST: 482 case ELF::R_MIPS_16: 483 case ELF::R_MIPS_32: 484 case ELF::R_MIPS_GPREL32: 485 if (cast<MCSymbolELF>(Sym).getOther() & ELF::STO_MIPS_MICROMIPS) 486 return true; 487 [[fallthrough]]; 488 case ELF::R_MIPS_26: 489 case ELF::R_MIPS_64: 490 case ELF::R_MIPS_GPREL16: 491 case ELF::R_MIPS_PC16: 492 case ELF::R_MIPS_SUB: 493 return false; 494 495 // FIXME: Many of these relocations should probably return false but this 496 // hasn't been confirmed to be safe yet. 497 case ELF::R_MIPS_REL32: 498 case ELF::R_MIPS_LITERAL: 499 case ELF::R_MIPS_CALL16: 500 case ELF::R_MIPS_SHIFT5: 501 case ELF::R_MIPS_SHIFT6: 502 case ELF::R_MIPS_GOT_DISP: 503 case ELF::R_MIPS_GOT_HI16: 504 case ELF::R_MIPS_GOT_LO16: 505 case ELF::R_MIPS_INSERT_A: 506 case ELF::R_MIPS_INSERT_B: 507 case ELF::R_MIPS_DELETE: 508 case ELF::R_MIPS_CALL_HI16: 509 case ELF::R_MIPS_CALL_LO16: 510 case ELF::R_MIPS_SCN_DISP: 511 case ELF::R_MIPS_REL16: 512 case ELF::R_MIPS_ADD_IMMEDIATE: 513 case ELF::R_MIPS_PJUMP: 514 case ELF::R_MIPS_RELGOT: 515 case ELF::R_MIPS_JALR: 516 case ELF::R_MIPS_TLS_DTPMOD32: 517 case ELF::R_MIPS_TLS_DTPREL32: 518 case ELF::R_MIPS_TLS_DTPMOD64: 519 case ELF::R_MIPS_TLS_DTPREL64: 520 case ELF::R_MIPS_TLS_GD: 521 case ELF::R_MIPS_TLS_LDM: 522 case ELF::R_MIPS_TLS_DTPREL_HI16: 523 case ELF::R_MIPS_TLS_DTPREL_LO16: 524 case ELF::R_MIPS_TLS_GOTTPREL: 525 case ELF::R_MIPS_TLS_TPREL32: 526 case ELF::R_MIPS_TLS_TPREL64: 527 case ELF::R_MIPS_TLS_TPREL_HI16: 528 case ELF::R_MIPS_TLS_TPREL_LO16: 529 case ELF::R_MIPS_GLOB_DAT: 530 case ELF::R_MIPS_PC21_S2: 531 case ELF::R_MIPS_PC26_S2: 532 case ELF::R_MIPS_PC18_S3: 533 case ELF::R_MIPS_PC19_S2: 534 case ELF::R_MIPS_PCHI16: 535 case ELF::R_MIPS_PCLO16: 536 case ELF::R_MIPS_COPY: 537 case ELF::R_MIPS_JUMP_SLOT: 538 case ELF::R_MIPS_NUM: 539 case ELF::R_MIPS_PC32: 540 case ELF::R_MIPS_EH: 541 case ELF::R_MICROMIPS_26_S1: 542 case ELF::R_MICROMIPS_GPREL16: 543 case ELF::R_MICROMIPS_LITERAL: 544 case ELF::R_MICROMIPS_PC7_S1: 545 case ELF::R_MICROMIPS_PC10_S1: 546 case ELF::R_MICROMIPS_PC16_S1: 547 case ELF::R_MICROMIPS_CALL16: 548 case ELF::R_MICROMIPS_GOT_DISP: 549 case ELF::R_MICROMIPS_GOT_HI16: 550 case ELF::R_MICROMIPS_GOT_LO16: 551 case ELF::R_MICROMIPS_SUB: 552 case ELF::R_MICROMIPS_HIGHER: 553 case ELF::R_MICROMIPS_HIGHEST: 554 case ELF::R_MICROMIPS_CALL_HI16: 555 case ELF::R_MICROMIPS_CALL_LO16: 556 case ELF::R_MICROMIPS_SCN_DISP: 557 case ELF::R_MICROMIPS_JALR: 558 case ELF::R_MICROMIPS_HI0_LO16: 559 case ELF::R_MICROMIPS_TLS_GD: 560 case ELF::R_MICROMIPS_TLS_LDM: 561 case ELF::R_MICROMIPS_TLS_DTPREL_HI16: 562 case ELF::R_MICROMIPS_TLS_DTPREL_LO16: 563 case ELF::R_MICROMIPS_TLS_GOTTPREL: 564 case ELF::R_MICROMIPS_TLS_TPREL_HI16: 565 case ELF::R_MICROMIPS_TLS_TPREL_LO16: 566 case ELF::R_MICROMIPS_GPREL7_S2: 567 case ELF::R_MICROMIPS_PC23_S2: 568 case ELF::R_MICROMIPS_PC21_S1: 569 case ELF::R_MICROMIPS_PC26_S1: 570 case ELF::R_MICROMIPS_PC18_S3: 571 case ELF::R_MICROMIPS_PC19_S2: 572 return true; 573 574 // FIXME: Many of these should probably return false but MIPS16 isn't 575 // supported by the integrated assembler. 576 case ELF::R_MIPS16_26: 577 case ELF::R_MIPS16_GPREL: 578 case ELF::R_MIPS16_CALL16: 579 case ELF::R_MIPS16_TLS_GD: 580 case ELF::R_MIPS16_TLS_LDM: 581 case ELF::R_MIPS16_TLS_DTPREL_HI16: 582 case ELF::R_MIPS16_TLS_DTPREL_LO16: 583 case ELF::R_MIPS16_TLS_GOTTPREL: 584 case ELF::R_MIPS16_TLS_TPREL_HI16: 585 case ELF::R_MIPS16_TLS_TPREL_LO16: 586 llvm_unreachable("Unsupported MIPS16 relocation"); 587 return true; 588 } 589 } 590 591 std::unique_ptr<MCObjectTargetWriter> 592 llvm::createMipsELFObjectWriter(const Triple &TT, bool IsN32) { 593 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS()); 594 bool IsN64 = TT.isArch64Bit() && !IsN32; 595 bool HasRelocationAddend = TT.isArch64Bit(); 596 return std::make_unique<MipsELFObjectWriter>(OSABI, HasRelocationAddend, 597 IsN64); 598 } 599