1 //===-- CSKYDisassembler.cpp - Disassembler for CSKY ----------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements the CSKYDisassembler class. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "MCTargetDesc/CSKYBaseInfo.h" 14 #include "MCTargetDesc/CSKYMCTargetDesc.h" 15 #include "TargetInfo/CSKYTargetInfo.h" 16 #include "llvm/ADT/DenseMap.h" 17 #include "llvm/MC/MCContext.h" 18 #include "llvm/MC/MCDisassembler/MCDisassembler.h" 19 #include "llvm/MC/MCFixedLenDisassembler.h" 20 #include "llvm/MC/MCInst.h" 21 #include "llvm/MC/MCInstrInfo.h" 22 #include "llvm/MC/MCRegisterInfo.h" 23 #include "llvm/MC/MCSubtargetInfo.h" 24 #include "llvm/MC/TargetRegistry.h" 25 #include "llvm/Support/Endian.h" 26 27 using namespace llvm; 28 29 #define DEBUG_TYPE "csky-disassembler" 30 31 typedef MCDisassembler::DecodeStatus DecodeStatus; 32 33 namespace { 34 class CSKYDisassembler : public MCDisassembler { 35 std::unique_ptr<MCInstrInfo const> const MCII; 36 mutable bool inDataRegion = false; 37 mutable StringRef symbolName; 38 39 DecodeStatus handleCROperand(MCInst &Instr) const; 40 41 public: 42 CSKYDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, 43 MCInstrInfo const *MCII); 44 45 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size, 46 ArrayRef<uint8_t> Bytes, uint64_t Address, 47 raw_ostream &CStream) const override; 48 }; 49 } // end anonymous namespace 50 51 CSKYDisassembler::CSKYDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, 52 MCInstrInfo const *MCII) 53 : MCDisassembler(STI, Ctx), MCII(MCII) {} 54 55 static MCDisassembler *createCSKYDisassembler(const Target &T, 56 const MCSubtargetInfo &STI, 57 MCContext &Ctx) { 58 return new CSKYDisassembler(STI, Ctx, T.createMCInstrInfo()); 59 } 60 61 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeCSKYDisassembler() { 62 TargetRegistry::RegisterMCDisassembler(getTheCSKYTarget(), 63 createCSKYDisassembler); 64 } 65 66 static const uint16_t GPRDecoderTable[] = { 67 CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3, CSKY::R4, CSKY::R5, CSKY::R6, 68 CSKY::R7, CSKY::R8, CSKY::R9, CSKY::R10, CSKY::R11, CSKY::R12, CSKY::R13, 69 CSKY::R14, CSKY::R15, CSKY::R16, CSKY::R17, CSKY::R18, CSKY::R19, CSKY::R20, 70 CSKY::R21, CSKY::R22, CSKY::R23, CSKY::R24, CSKY::R25, CSKY::R26, CSKY::R27, 71 CSKY::R28, CSKY::R29, CSKY::R30, CSKY::R31}; 72 73 static const uint16_t GPRPairDecoderTable[] = { 74 CSKY::R0_R1, CSKY::R1_R2, CSKY::R2_R3, CSKY::R3_R4, CSKY::R4_R5, 75 CSKY::R5_R6, CSKY::R6_R7, CSKY::R7_R8, CSKY::R8_R9, CSKY::R9_R10, 76 CSKY::R10_R11, CSKY::R11_R12, CSKY::R12_R13, CSKY::R13_R14, CSKY::R14_R15, 77 CSKY::R15_R16, CSKY::R16_R17, CSKY::R17_R18, CSKY::R18_R19, CSKY::R19_R20, 78 CSKY::R20_R21, CSKY::R21_R22, CSKY::R22_R23, CSKY::R23_R24, CSKY::R24_R25, 79 CSKY::R25_R26, CSKY::R26_R27, CSKY::R27_R28, CSKY::R28_R29, CSKY::R29_R30, 80 CSKY::R30_R31, CSKY::R31_R32}; 81 82 static const uint16_t FPR32DecoderTable[] = { 83 CSKY::F0_32, CSKY::F1_32, CSKY::F2_32, CSKY::F3_32, CSKY::F4_32, 84 CSKY::F5_32, CSKY::F6_32, CSKY::F7_32, CSKY::F8_32, CSKY::F9_32, 85 CSKY::F10_32, CSKY::F11_32, CSKY::F12_32, CSKY::F13_32, CSKY::F14_32, 86 CSKY::F15_32, CSKY::F16_32, CSKY::F17_32, CSKY::F18_32, CSKY::F19_32, 87 CSKY::F20_32, CSKY::F21_32, CSKY::F22_32, CSKY::F23_32, CSKY::F24_32, 88 CSKY::F25_32, CSKY::F26_32, CSKY::F27_32, CSKY::F28_32, CSKY::F29_32, 89 CSKY::F30_32, CSKY::F31_32}; 90 91 static const uint16_t FPR64DecoderTable[] = { 92 CSKY::F0_64, CSKY::F1_64, CSKY::F2_64, CSKY::F3_64, CSKY::F4_64, 93 CSKY::F5_64, CSKY::F6_64, CSKY::F7_64, CSKY::F8_64, CSKY::F9_64, 94 CSKY::F10_64, CSKY::F11_64, CSKY::F12_64, CSKY::F13_64, CSKY::F14_64, 95 CSKY::F15_64, CSKY::F16_64, CSKY::F17_64, CSKY::F18_64, CSKY::F19_64, 96 CSKY::F20_64, CSKY::F21_64, CSKY::F22_64, CSKY::F23_64, CSKY::F24_64, 97 CSKY::F25_64, CSKY::F26_64, CSKY::F27_64, CSKY::F28_64, CSKY::F29_64, 98 CSKY::F30_64, CSKY::F31_64}; 99 100 static const uint16_t FPR128DecoderTable[] = { 101 CSKY::F0_128, CSKY::F1_128, CSKY::F2_128, CSKY::F3_128, CSKY::F4_128, 102 CSKY::F5_128, CSKY::F6_128, CSKY::F7_128, CSKY::F8_128, CSKY::F9_128, 103 CSKY::F10_128, CSKY::F11_128, CSKY::F12_128, CSKY::F13_128, CSKY::F14_128, 104 CSKY::F15_128, CSKY::F16_128, CSKY::F17_128, CSKY::F18_128, CSKY::F19_128, 105 CSKY::F20_128, CSKY::F21_128, CSKY::F22_128, CSKY::F23_128, CSKY::F24_128, 106 CSKY::F25_128, CSKY::F26_128, CSKY::F27_128, CSKY::F28_128, CSKY::F29_128, 107 CSKY::F30_128, CSKY::F31_128}; 108 109 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo, 110 uint64_t Address, 111 const void *Decoder) { 112 if (RegNo >= 32) 113 return MCDisassembler::Fail; 114 115 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); 116 return MCDisassembler::Success; 117 } 118 119 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, 120 uint64_t Address, 121 const void *Decoder) { 122 if (RegNo >= 32) 123 return MCDisassembler::Fail; 124 125 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[RegNo])); 126 return MCDisassembler::Success; 127 } 128 129 static DecodeStatus DecodesFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, 130 uint64_t Address, 131 const void *Decoder) { 132 if (RegNo >= 16) 133 return MCDisassembler::Fail; 134 135 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[RegNo])); 136 return MCDisassembler::Success; 137 } 138 139 static DecodeStatus DecodesFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, 140 uint64_t Address, 141 const void *Decoder) { 142 if (RegNo >= 16) 143 return MCDisassembler::Fail; 144 145 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo])); 146 return MCDisassembler::Success; 147 } 148 149 static DecodeStatus DecodesFPR64_VRegisterClass(MCInst &Inst, uint64_t RegNo, 150 uint64_t Address, 151 const void *Decoder) { 152 if (RegNo >= 16) 153 return MCDisassembler::Fail; 154 155 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo])); 156 return MCDisassembler::Success; 157 } 158 159 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, 160 uint64_t Address, 161 const void *Decoder) { 162 if (RegNo >= 32) 163 return MCDisassembler::Fail; 164 165 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo])); 166 return MCDisassembler::Success; 167 } 168 169 static DecodeStatus DecodesFPR128RegisterClass(MCInst &Inst, uint64_t RegNo, 170 uint64_t Address, 171 const void *Decoder) { 172 if (RegNo >= 16) 173 return MCDisassembler::Fail; 174 175 Inst.addOperand(MCOperand::createReg(FPR128DecoderTable[RegNo])); 176 return MCDisassembler::Success; 177 } 178 179 static DecodeStatus DecodesGPRRegisterClass(MCInst &Inst, uint64_t RegNo, 180 uint64_t Address, 181 const void *Decoder) { 182 if (RegNo >= 16) 183 return MCDisassembler::Fail; 184 185 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); 186 return MCDisassembler::Success; 187 } 188 189 static DecodeStatus DecodemGPRRegisterClass(MCInst &Inst, uint64_t RegNo, 190 uint64_t Address, 191 const void *Decoder) { 192 if (RegNo >= 8) 193 return MCDisassembler::Fail; 194 195 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); 196 return MCDisassembler::Success; 197 } 198 199 static DecodeStatus DecodeGPRSPRegisterClass(MCInst &Inst, uint64_t RegNo, 200 uint64_t Address, 201 const void *Decoder) { 202 if (RegNo != 14) 203 return MCDisassembler::Fail; 204 205 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); 206 return MCDisassembler::Success; 207 } 208 209 static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, uint64_t RegNo, 210 uint64_t Address, 211 const void *Decoder) { 212 const FeatureBitset &FeatureBits = 213 static_cast<const MCDisassembler *>(Decoder) 214 ->getSubtargetInfo() 215 .getFeatureBits(); 216 bool hasHighReg = FeatureBits[CSKY::FeatureHighreg]; 217 218 if (RegNo >= 32 || (!hasHighReg && RegNo >= 16)) 219 return MCDisassembler::Fail; 220 221 Inst.addOperand(MCOperand::createReg(GPRPairDecoderTable[RegNo])); 222 return MCDisassembler::Success; 223 } 224 225 template <unsigned N, unsigned S> 226 static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm, 227 int64_t Address, const void *Decoder) { 228 assert(isUInt<N>(Imm) && "Invalid immediate"); 229 Inst.addOperand(MCOperand::createImm(Imm << S)); 230 return MCDisassembler::Success; 231 } 232 233 template <unsigned N> 234 static DecodeStatus decodeOImmOperand(MCInst &Inst, uint64_t Imm, 235 int64_t Address, const void *Decoder) { 236 assert(isUInt<N>(Imm) && "Invalid immediate"); 237 Inst.addOperand(MCOperand::createImm(Imm + 1)); 238 return MCDisassembler::Success; 239 } 240 241 static DecodeStatus decodeLRW16Imm8(MCInst &Inst, uint64_t Imm, int64_t Address, 242 const void *Decoder) { 243 assert(isUInt<8>(Imm) && "Invalid immediate"); 244 if ((Imm >> 7) & 0x1) { 245 Inst.addOperand(MCOperand::createImm((Imm & 0x7F) << 2)); 246 } else { 247 uint64_t V = ((Imm ^ 0xFFFFFFFF) & 0xFF); 248 Inst.addOperand(MCOperand::createImm(V << 2)); 249 } 250 251 return MCDisassembler::Success; 252 } 253 254 static DecodeStatus decodeJMPIXImmOperand(MCInst &Inst, uint64_t Imm, 255 int64_t Address, 256 const void *Decoder) { 257 assert(isUInt<2>(Imm) && "Invalid immediate"); 258 259 if (Imm == 0) 260 Inst.addOperand(MCOperand::createImm(16)); 261 else if (Imm == 1) 262 Inst.addOperand(MCOperand::createImm(24)); 263 else if (Imm == 2) 264 Inst.addOperand(MCOperand::createImm(32)); 265 else if (Imm == 3) 266 Inst.addOperand(MCOperand::createImm(40)); 267 else 268 return MCDisassembler::Fail; 269 270 return MCDisassembler::Success; 271 } 272 273 static DecodeStatus DecodeRegSeqOperand(MCInst &Inst, uint64_t Imm, 274 int64_t Address, const void *Decoder) { 275 assert(isUInt<10>(Imm) && "Invalid immediate"); 276 277 auto Imm5 = Imm & 0x1f; 278 auto Ry = (Imm >> 5) & 0x1f; 279 280 if (DecodeGPRRegisterClass(Inst, Ry, Address, Decoder) == 281 MCDisassembler::Fail) 282 return MCDisassembler::Fail; 283 284 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Ry + Imm5])); 285 286 return MCDisassembler::Success; 287 } 288 289 static DecodeStatus DecodeRegSeqOperandF1(MCInst &Inst, uint64_t Imm, 290 int64_t Address, 291 const void *Decoder) { 292 assert(isUInt<10>(Imm) && "Invalid immediate"); 293 294 auto Imm5 = Imm & 0x1f; 295 auto Ry = (Imm >> 5) & 0x1f; 296 297 if (DecodesFPR32RegisterClass(Inst, Ry, Address, Decoder) == 298 MCDisassembler::Fail) 299 return MCDisassembler::Fail; 300 301 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[Ry + Imm5])); 302 303 return MCDisassembler::Success; 304 } 305 306 static DecodeStatus DecodeRegSeqOperandD1(MCInst &Inst, uint64_t Imm, 307 int64_t Address, 308 const void *Decoder) { 309 assert(isUInt<10>(Imm) && "Invalid immediate"); 310 311 auto Imm5 = Imm & 0x1f; 312 auto Ry = (Imm >> 5) & 0x1f; 313 314 if (DecodesFPR64RegisterClass(Inst, Ry, Address, Decoder) == 315 MCDisassembler::Fail) 316 return MCDisassembler::Fail; 317 318 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[Ry + Imm5])); 319 320 return MCDisassembler::Success; 321 } 322 323 static DecodeStatus DecodeRegSeqOperandF2(MCInst &Inst, uint64_t Imm, 324 int64_t Address, 325 const void *Decoder) { 326 assert(isUInt<10>(Imm) && "Invalid immediate"); 327 328 auto Imm5 = Imm & 0x1f; 329 auto Ry = (Imm >> 5) & 0x1f; 330 331 if (DecodeFPR32RegisterClass(Inst, Ry, Address, Decoder) == 332 MCDisassembler::Fail) 333 return MCDisassembler::Fail; 334 335 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[Ry + Imm5])); 336 337 return MCDisassembler::Success; 338 } 339 340 static DecodeStatus DecodeRegSeqOperandD2(MCInst &Inst, uint64_t Imm, 341 int64_t Address, 342 const void *Decoder) { 343 assert(isUInt<10>(Imm) && "Invalid immediate"); 344 345 auto Imm5 = Imm & 0x1f; 346 auto Ry = (Imm >> 5) & 0x1f; 347 348 if (DecodeFPR64RegisterClass(Inst, Ry, Address, Decoder) == 349 MCDisassembler::Fail) 350 return MCDisassembler::Fail; 351 352 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[Ry + Imm5])); 353 354 return MCDisassembler::Success; 355 } 356 357 static DecodeStatus decodeImmShiftOpValue(MCInst &Inst, uint64_t Imm, 358 int64_t Address, 359 const void *Decoder) { 360 Inst.addOperand(MCOperand::createImm(Log2(Imm))); 361 return MCDisassembler::Success; 362 } 363 364 template <unsigned N, unsigned S> 365 static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm, 366 int64_t Address, const void *Decoder) { 367 assert(isUInt<N>(Imm) && "Invalid immediate"); 368 // Sign-extend the number in the bottom N bits of Imm 369 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm) << S)); 370 return MCDisassembler::Success; 371 } 372 373 #include "CSKYGenDisassemblerTables.inc" 374 375 DecodeStatus CSKYDisassembler::handleCROperand(MCInst &MI) const { 376 377 // FIXME: To query instruction info from td file or a table inc file 378 switch (MI.getOpcode()) { 379 default: 380 return MCDisassembler::Success; 381 case CSKY::LD16WSP: 382 case CSKY::ST16WSP: 383 case CSKY::ADDI16ZSP: 384 MI.insert(std::next(MI.begin()), MCOperand::createReg(CSKY::R14)); 385 return MCDisassembler::Success; 386 case CSKY::ADDI16SPSP: 387 case CSKY::SUBI16SPSP: 388 MI.insert(MI.begin(), MCOperand::createReg(CSKY::R14)); 389 MI.insert(MI.begin(), MCOperand::createReg(CSKY::R14)); 390 return MCDisassembler::Success; 391 case CSKY::FCMPHS_S: 392 case CSKY::FCMPHS_D: 393 case CSKY::FCMPLT_S: 394 case CSKY::FCMPLT_D: 395 case CSKY::FCMPNE_S: 396 case CSKY::FCMPNE_D: 397 case CSKY::FCMPUO_S: 398 case CSKY::FCMPUO_D: 399 case CSKY::FCMPZHS_S: 400 case CSKY::FCMPZHS_D: 401 case CSKY::FCMPZLS_S: 402 case CSKY::FCMPZLS_D: 403 case CSKY::FCMPZNE_S: 404 case CSKY::FCMPZNE_D: 405 case CSKY::FCMPZUO_S: 406 case CSKY::FCMPZUO_D: 407 case CSKY::f2FCMPHS_S: 408 case CSKY::f2FCMPHS_D: 409 case CSKY::f2FCMPLT_S: 410 case CSKY::f2FCMPLT_D: 411 case CSKY::f2FCMPNE_S: 412 case CSKY::f2FCMPNE_D: 413 case CSKY::f2FCMPUO_S: 414 case CSKY::f2FCMPUO_D: 415 case CSKY::f2FCMPHSZ_S: 416 case CSKY::f2FCMPHSZ_D: 417 case CSKY::f2FCMPHZ_S: 418 case CSKY::f2FCMPHZ_D: 419 case CSKY::f2FCMPLSZ_S: 420 case CSKY::f2FCMPLSZ_D: 421 case CSKY::f2FCMPLTZ_S: 422 case CSKY::f2FCMPLTZ_D: 423 case CSKY::f2FCMPNEZ_S: 424 case CSKY::f2FCMPNEZ_D: 425 case CSKY::f2FCMPUOZ_S: 426 case CSKY::f2FCMPUOZ_D: 427 428 case CSKY::BT32: 429 case CSKY::BF32: 430 case CSKY::BT16: 431 case CSKY::BF16: 432 case CSKY::CMPNEI32: 433 case CSKY::CMPNEI16: 434 case CSKY::CMPNE32: 435 case CSKY::CMPNE16: 436 case CSKY::CMPHSI32: 437 case CSKY::CMPHSI16: 438 case CSKY::CMPHS32: 439 case CSKY::CMPHS16: 440 case CSKY::CMPLTI32: 441 case CSKY::CMPLTI16: 442 case CSKY::CMPLT32: 443 case CSKY::CMPLT16: 444 case CSKY::BTSTI32: 445 case CSKY::BTSTI16: 446 case CSKY::TSTNBZ32: 447 case CSKY::TSTNBZ16: 448 case CSKY::TST32: 449 case CSKY::TST16: 450 MI.insert(MI.begin(), MCOperand::createReg(CSKY::C)); 451 return MCDisassembler::Success; 452 case CSKY::LSLC32: 453 case CSKY::LSRC32: 454 case CSKY::ASRC32: 455 MI.insert(std::next(MI.begin()), MCOperand::createReg(CSKY::C)); 456 return MCDisassembler::Success; 457 case CSKY::MOVF32: 458 case CSKY::MOVT32: 459 case CSKY::MVC32: 460 case CSKY::MVCV32: 461 case CSKY::MVCV16: 462 case CSKY::INCT32: 463 case CSKY::INCF32: 464 case CSKY::DECT32: 465 case CSKY::DECF32: 466 case CSKY::DECGT32: 467 case CSKY::DECLT32: 468 case CSKY::DECNE32: 469 case CSKY::CLRF32: 470 case CSKY::CLRT32: 471 case CSKY::f2FSEL_S: 472 case CSKY::f2FSEL_D: 473 MI.insert(std::next(MI.begin()), MCOperand::createReg(CSKY::C)); 474 return MCDisassembler::Success; 475 case CSKY::ADDC32: 476 case CSKY::ADDC16: 477 case CSKY::SUBC32: 478 case CSKY::SUBC16: 479 case CSKY::XSR32: 480 MI.insert(std::next(MI.begin()), MCOperand::createReg(CSKY::C)); 481 MI.insert(MI.end(), MCOperand::createReg(CSKY::C)); 482 return MCDisassembler::Success; 483 case CSKY::INS32: 484 MI.getOperand(3).setImm(MI.getOperand(3).getImm() + 485 MI.getOperand(4).getImm()); 486 return MCDisassembler::Success; 487 } 488 } 489 490 static bool decodeFPUV3Instruction(MCInst &MI, uint32_t insn, uint64_t Address, 491 const void *DisAsm, 492 const MCSubtargetInfo &STI) { 493 LLVM_DEBUG(dbgs() << "Trying CSKY 32-bit fpuv3 table :\n"); 494 if (!STI.getFeatureBits()[CSKY::FeatureFPUV3_HF] && 495 !STI.getFeatureBits()[CSKY::FeatureFPUV3_SF] && 496 !STI.getFeatureBits()[CSKY::FeatureFPUV3_DF]) 497 return false; 498 499 DecodeStatus Result = 500 decodeInstruction(DecoderTableFPUV332, MI, insn, Address, DisAsm, STI); 501 502 if (Result == MCDisassembler::Fail) { 503 MI.clear(); 504 return false; 505 } 506 507 return true; 508 } 509 510 DecodeStatus CSKYDisassembler::getInstruction(MCInst &MI, uint64_t &Size, 511 ArrayRef<uint8_t> Bytes, 512 uint64_t Address, 513 raw_ostream &CS) const { 514 515 uint32_t Insn; 516 DecodeStatus Result = MCDisassembler::Fail; 517 518 Insn = support::endian::read16le(Bytes.data()); 519 520 if ((Insn >> 14) == 0x3) { 521 if (Bytes.size() < 4) { 522 Size = 0; 523 return MCDisassembler::Fail; 524 } 525 Insn = (Insn << 16) | support::endian::read16le(&Bytes[2]); 526 527 if (decodeFPUV3Instruction(MI, Insn, Address, this, STI)) 528 Result = MCDisassembler::Success; 529 else { 530 LLVM_DEBUG(dbgs() << "Trying CSKY 32-bit table :\n"); 531 Result = decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI); 532 } 533 534 Size = 4; 535 } else { 536 if (Bytes.size() < 2) { 537 Size = 0; 538 return MCDisassembler::Fail; 539 } 540 LLVM_DEBUG(dbgs() << "Trying CSKY 16-bit table :\n"); 541 Result = decodeInstruction(DecoderTable16, MI, Insn, Address, this, STI); 542 Size = 2; 543 } 544 545 handleCROperand(MI); 546 547 return Result; 548 } 549