1 //===-- CSKYDisassembler.cpp - Disassembler for CSKY ----------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements the CSKYDisassembler class. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "MCTargetDesc/CSKYBaseInfo.h" 14 #include "MCTargetDesc/CSKYMCTargetDesc.h" 15 #include "TargetInfo/CSKYTargetInfo.h" 16 #include "llvm/ADT/DenseMap.h" 17 #include "llvm/MC/MCContext.h" 18 #include "llvm/MC/MCDisassembler/MCDisassembler.h" 19 #include "llvm/MC/MCFixedLenDisassembler.h" 20 #include "llvm/MC/MCInst.h" 21 #include "llvm/MC/MCInstrInfo.h" 22 #include "llvm/MC/MCRegisterInfo.h" 23 #include "llvm/MC/MCSubtargetInfo.h" 24 #include "llvm/MC/TargetRegistry.h" 25 #include "llvm/Support/Endian.h" 26 27 using namespace llvm; 28 29 #define DEBUG_TYPE "csky-disassembler" 30 31 typedef MCDisassembler::DecodeStatus DecodeStatus; 32 33 namespace { 34 class CSKYDisassembler : public MCDisassembler { 35 std::unique_ptr<MCInstrInfo const> const MCII; 36 mutable bool inDataRegion = false; 37 mutable StringRef symbolName; 38 39 DecodeStatus handleCROperand(MCInst &Instr) const; 40 41 public: 42 CSKYDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, 43 MCInstrInfo const *MCII); 44 45 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size, 46 ArrayRef<uint8_t> Bytes, uint64_t Address, 47 raw_ostream &CStream) const override; 48 }; 49 } // end anonymous namespace 50 51 CSKYDisassembler::CSKYDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx, 52 MCInstrInfo const *MCII) 53 : MCDisassembler(STI, Ctx), MCII(MCII) {} 54 55 static MCDisassembler *createCSKYDisassembler(const Target &T, 56 const MCSubtargetInfo &STI, 57 MCContext &Ctx) { 58 return new CSKYDisassembler(STI, Ctx, T.createMCInstrInfo()); 59 } 60 61 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeCSKYDisassembler() { 62 TargetRegistry::RegisterMCDisassembler(getTheCSKYTarget(), 63 createCSKYDisassembler); 64 } 65 66 static const uint16_t GPRDecoderTable[] = { 67 CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3, CSKY::R4, CSKY::R5, CSKY::R6, 68 CSKY::R7, CSKY::R8, CSKY::R9, CSKY::R10, CSKY::R11, CSKY::R12, CSKY::R13, 69 CSKY::R14, CSKY::R15, CSKY::R16, CSKY::R17, CSKY::R18, CSKY::R19, CSKY::R20, 70 CSKY::R21, CSKY::R22, CSKY::R23, CSKY::R24, CSKY::R25, CSKY::R26, CSKY::R27, 71 CSKY::R28, CSKY::R29, CSKY::R30, CSKY::R31}; 72 73 static const uint16_t GPRPairDecoderTable[] = { 74 CSKY::R0_R1, CSKY::R1_R2, CSKY::R2_R3, CSKY::R3_R4, CSKY::R4_R5, 75 CSKY::R5_R6, CSKY::R6_R7, CSKY::R7_R8, CSKY::R8_R9, CSKY::R9_R10, 76 CSKY::R10_R11, CSKY::R11_R12, CSKY::R12_R13, CSKY::R13_R14, CSKY::R14_R15, 77 CSKY::R15_R16, CSKY::R16_R17, CSKY::R17_R18, CSKY::R18_R19, CSKY::R19_R20, 78 CSKY::R20_R21, CSKY::R21_R22, CSKY::R22_R23, CSKY::R23_R24, CSKY::R24_R25, 79 CSKY::R25_R26, CSKY::R26_R27, CSKY::R27_R28, CSKY::R28_R29, CSKY::R29_R30, 80 CSKY::R30_R31, CSKY::R31_R32}; 81 82 static const uint16_t FPR32DecoderTable[] = { 83 CSKY::F0_32, CSKY::F1_32, CSKY::F2_32, CSKY::F3_32, CSKY::F4_32, 84 CSKY::F5_32, CSKY::F6_32, CSKY::F7_32, CSKY::F8_32, CSKY::F9_32, 85 CSKY::F10_32, CSKY::F11_32, CSKY::F12_32, CSKY::F13_32, CSKY::F14_32, 86 CSKY::F15_32, CSKY::F16_32, CSKY::F17_32, CSKY::F18_32, CSKY::F19_32, 87 CSKY::F20_32, CSKY::F21_32, CSKY::F22_32, CSKY::F23_32, CSKY::F24_32, 88 CSKY::F25_32, CSKY::F26_32, CSKY::F27_32, CSKY::F28_32, CSKY::F29_32, 89 CSKY::F30_32, CSKY::F31_32}; 90 91 static const uint16_t FPR64DecoderTable[] = { 92 CSKY::F0_64, CSKY::F1_64, CSKY::F2_64, CSKY::F3_64, CSKY::F4_64, 93 CSKY::F5_64, CSKY::F6_64, CSKY::F7_64, CSKY::F8_64, CSKY::F9_64, 94 CSKY::F10_64, CSKY::F11_64, CSKY::F12_64, CSKY::F13_64, CSKY::F14_64, 95 CSKY::F15_64, CSKY::F16_64, CSKY::F17_64, CSKY::F18_64, CSKY::F19_64, 96 CSKY::F20_64, CSKY::F21_64, CSKY::F22_64, CSKY::F23_64, CSKY::F24_64, 97 CSKY::F25_64, CSKY::F26_64, CSKY::F27_64, CSKY::F28_64, CSKY::F29_64, 98 CSKY::F30_64, CSKY::F31_64}; 99 100 static const uint16_t FPR128DecoderTable[] = { 101 CSKY::F0_128, CSKY::F1_128, CSKY::F2_128, CSKY::F3_128, CSKY::F4_128, 102 CSKY::F5_128, CSKY::F6_128, CSKY::F7_128, CSKY::F8_128, CSKY::F9_128, 103 CSKY::F10_128, CSKY::F11_128, CSKY::F12_128, CSKY::F13_128, CSKY::F14_128, 104 CSKY::F15_128, CSKY::F16_128, CSKY::F17_128, CSKY::F18_128, CSKY::F19_128, 105 CSKY::F20_128, CSKY::F21_128, CSKY::F22_128, CSKY::F23_128, CSKY::F24_128, 106 CSKY::F25_128, CSKY::F26_128, CSKY::F27_128, CSKY::F28_128, CSKY::F29_128, 107 CSKY::F30_128, CSKY::F31_128}; 108 109 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo, 110 uint64_t Address, 111 const MCDisassembler *Decoder) { 112 if (RegNo >= 32) 113 return MCDisassembler::Fail; 114 115 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); 116 return MCDisassembler::Success; 117 } 118 119 static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, 120 uint64_t Address, 121 const MCDisassembler *Decoder) { 122 if (RegNo >= 32) 123 return MCDisassembler::Fail; 124 125 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[RegNo])); 126 return MCDisassembler::Success; 127 } 128 129 static DecodeStatus DecodesFPR32RegisterClass(MCInst &Inst, uint64_t RegNo, 130 uint64_t Address, 131 const MCDisassembler *Decoder) { 132 if (RegNo >= 16) 133 return MCDisassembler::Fail; 134 135 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[RegNo])); 136 return MCDisassembler::Success; 137 } 138 139 static DecodeStatus DecodesFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, 140 uint64_t Address, 141 const MCDisassembler *Decoder) { 142 if (RegNo >= 16) 143 return MCDisassembler::Fail; 144 145 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo])); 146 return MCDisassembler::Success; 147 } 148 149 static DecodeStatus DecodesFPR64_VRegisterClass(MCInst &Inst, uint64_t RegNo, 150 uint64_t Address, 151 const MCDisassembler *Decoder) { 152 if (RegNo >= 16) 153 return MCDisassembler::Fail; 154 155 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo])); 156 return MCDisassembler::Success; 157 } 158 159 static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo, 160 uint64_t Address, 161 const MCDisassembler *Decoder) { 162 if (RegNo >= 32) 163 return MCDisassembler::Fail; 164 165 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo])); 166 return MCDisassembler::Success; 167 } 168 169 static DecodeStatus DecodesFPR128RegisterClass(MCInst &Inst, uint64_t RegNo, 170 uint64_t Address, 171 const MCDisassembler *Decoder) { 172 if (RegNo >= 16) 173 return MCDisassembler::Fail; 174 175 Inst.addOperand(MCOperand::createReg(FPR128DecoderTable[RegNo])); 176 return MCDisassembler::Success; 177 } 178 179 static DecodeStatus DecodesGPRRegisterClass(MCInst &Inst, uint64_t RegNo, 180 uint64_t Address, 181 const MCDisassembler *Decoder) { 182 if (RegNo >= 16) 183 return MCDisassembler::Fail; 184 185 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); 186 return MCDisassembler::Success; 187 } 188 189 static DecodeStatus DecodemGPRRegisterClass(MCInst &Inst, uint64_t RegNo, 190 uint64_t Address, 191 const MCDisassembler *Decoder) { 192 if (RegNo >= 8) 193 return MCDisassembler::Fail; 194 195 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); 196 return MCDisassembler::Success; 197 } 198 199 static DecodeStatus DecodeGPRSPRegisterClass(MCInst &Inst, uint64_t RegNo, 200 uint64_t Address, 201 const MCDisassembler *Decoder) { 202 if (RegNo != 14) 203 return MCDisassembler::Fail; 204 205 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo])); 206 return MCDisassembler::Success; 207 } 208 209 static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, uint64_t RegNo, 210 uint64_t Address, 211 const MCDisassembler *Decoder) { 212 const FeatureBitset &FeatureBits = 213 Decoder->getSubtargetInfo().getFeatureBits(); 214 bool hasHighReg = FeatureBits[CSKY::FeatureHighreg]; 215 216 if (RegNo >= 32 || (!hasHighReg && RegNo >= 16)) 217 return MCDisassembler::Fail; 218 219 Inst.addOperand(MCOperand::createReg(GPRPairDecoderTable[RegNo])); 220 return MCDisassembler::Success; 221 } 222 223 template <unsigned N, unsigned S> 224 static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm, 225 int64_t Address, 226 const MCDisassembler *Decoder) { 227 assert(isUInt<N>(Imm) && "Invalid immediate"); 228 Inst.addOperand(MCOperand::createImm(Imm << S)); 229 return MCDisassembler::Success; 230 } 231 232 template <unsigned N> 233 static DecodeStatus decodeOImmOperand(MCInst &Inst, uint64_t Imm, 234 int64_t Address, 235 const MCDisassembler *Decoder) { 236 assert(isUInt<N>(Imm) && "Invalid immediate"); 237 Inst.addOperand(MCOperand::createImm(Imm + 1)); 238 return MCDisassembler::Success; 239 } 240 241 static DecodeStatus decodeLRW16Imm8(MCInst &Inst, uint64_t Imm, int64_t Address, 242 const MCDisassembler *Decoder) { 243 assert(isUInt<8>(Imm) && "Invalid immediate"); 244 if ((Imm >> 7) & 0x1) { 245 Inst.addOperand(MCOperand::createImm((Imm & 0x7F) << 2)); 246 } else { 247 uint64_t V = ((Imm ^ 0xFFFFFFFF) & 0xFF); 248 Inst.addOperand(MCOperand::createImm(V << 2)); 249 } 250 251 return MCDisassembler::Success; 252 } 253 254 static DecodeStatus decodeJMPIXImmOperand(MCInst &Inst, uint64_t Imm, 255 int64_t Address, 256 const MCDisassembler *Decoder) { 257 assert(isUInt<2>(Imm) && "Invalid immediate"); 258 259 if (Imm == 0) 260 Inst.addOperand(MCOperand::createImm(16)); 261 else if (Imm == 1) 262 Inst.addOperand(MCOperand::createImm(24)); 263 else if (Imm == 2) 264 Inst.addOperand(MCOperand::createImm(32)); 265 else if (Imm == 3) 266 Inst.addOperand(MCOperand::createImm(40)); 267 else 268 return MCDisassembler::Fail; 269 270 return MCDisassembler::Success; 271 } 272 273 static DecodeStatus DecodeRegSeqOperand(MCInst &Inst, uint64_t Imm, 274 int64_t Address, 275 const MCDisassembler *Decoder) { 276 assert(isUInt<10>(Imm) && "Invalid immediate"); 277 278 auto Imm5 = Imm & 0x1f; 279 auto Ry = (Imm >> 5) & 0x1f; 280 281 if (DecodeGPRRegisterClass(Inst, Ry, Address, Decoder) == 282 MCDisassembler::Fail) 283 return MCDisassembler::Fail; 284 285 Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Ry + Imm5])); 286 287 return MCDisassembler::Success; 288 } 289 290 static DecodeStatus DecodeRegSeqOperandF1(MCInst &Inst, uint64_t Imm, 291 int64_t Address, 292 const MCDisassembler *Decoder) { 293 assert(isUInt<10>(Imm) && "Invalid immediate"); 294 295 auto Imm5 = Imm & 0x1f; 296 auto Ry = (Imm >> 5) & 0x1f; 297 298 if (DecodesFPR32RegisterClass(Inst, Ry, Address, Decoder) == 299 MCDisassembler::Fail) 300 return MCDisassembler::Fail; 301 302 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[Ry + Imm5])); 303 304 return MCDisassembler::Success; 305 } 306 307 static DecodeStatus DecodeRegSeqOperandD1(MCInst &Inst, uint64_t Imm, 308 int64_t Address, 309 const MCDisassembler *Decoder) { 310 assert(isUInt<10>(Imm) && "Invalid immediate"); 311 312 auto Imm5 = Imm & 0x1f; 313 auto Ry = (Imm >> 5) & 0x1f; 314 315 if (DecodesFPR64RegisterClass(Inst, Ry, Address, Decoder) == 316 MCDisassembler::Fail) 317 return MCDisassembler::Fail; 318 319 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[Ry + Imm5])); 320 321 return MCDisassembler::Success; 322 } 323 324 static DecodeStatus DecodeRegSeqOperandF2(MCInst &Inst, uint64_t Imm, 325 int64_t Address, 326 const MCDisassembler *Decoder) { 327 assert(isUInt<10>(Imm) && "Invalid immediate"); 328 329 auto Imm5 = Imm & 0x1f; 330 auto Ry = (Imm >> 5) & 0x1f; 331 332 if (DecodeFPR32RegisterClass(Inst, Ry, Address, Decoder) == 333 MCDisassembler::Fail) 334 return MCDisassembler::Fail; 335 336 Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[Ry + Imm5])); 337 338 return MCDisassembler::Success; 339 } 340 341 static DecodeStatus DecodeRegSeqOperandD2(MCInst &Inst, uint64_t Imm, 342 int64_t Address, 343 const MCDisassembler *Decoder) { 344 assert(isUInt<10>(Imm) && "Invalid immediate"); 345 346 auto Imm5 = Imm & 0x1f; 347 auto Ry = (Imm >> 5) & 0x1f; 348 349 if (DecodeFPR64RegisterClass(Inst, Ry, Address, Decoder) == 350 MCDisassembler::Fail) 351 return MCDisassembler::Fail; 352 353 Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[Ry + Imm5])); 354 355 return MCDisassembler::Success; 356 } 357 358 static DecodeStatus decodeImmShiftOpValue(MCInst &Inst, uint64_t Imm, 359 int64_t Address, 360 const MCDisassembler *Decoder) { 361 Inst.addOperand(MCOperand::createImm(Log2(Imm))); 362 return MCDisassembler::Success; 363 } 364 365 template <unsigned N, unsigned S> 366 static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm, 367 int64_t Address, 368 const MCDisassembler *Decoder) { 369 assert(isUInt<N>(Imm) && "Invalid immediate"); 370 // Sign-extend the number in the bottom N bits of Imm 371 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm) << S)); 372 return MCDisassembler::Success; 373 } 374 375 #include "CSKYGenDisassemblerTables.inc" 376 377 DecodeStatus CSKYDisassembler::handleCROperand(MCInst &MI) const { 378 379 // FIXME: To query instruction info from td file or a table inc file 380 switch (MI.getOpcode()) { 381 default: 382 return MCDisassembler::Success; 383 case CSKY::LD16WSP: 384 case CSKY::ST16WSP: 385 case CSKY::ADDI16ZSP: 386 MI.insert(std::next(MI.begin()), MCOperand::createReg(CSKY::R14)); 387 return MCDisassembler::Success; 388 case CSKY::ADDI16SPSP: 389 case CSKY::SUBI16SPSP: 390 MI.insert(MI.begin(), MCOperand::createReg(CSKY::R14)); 391 MI.insert(MI.begin(), MCOperand::createReg(CSKY::R14)); 392 return MCDisassembler::Success; 393 case CSKY::FCMPHS_S: 394 case CSKY::FCMPHS_D: 395 case CSKY::FCMPLT_S: 396 case CSKY::FCMPLT_D: 397 case CSKY::FCMPNE_S: 398 case CSKY::FCMPNE_D: 399 case CSKY::FCMPUO_S: 400 case CSKY::FCMPUO_D: 401 case CSKY::FCMPZHS_S: 402 case CSKY::FCMPZHS_D: 403 case CSKY::FCMPZLS_S: 404 case CSKY::FCMPZLS_D: 405 case CSKY::FCMPZNE_S: 406 case CSKY::FCMPZNE_D: 407 case CSKY::FCMPZUO_S: 408 case CSKY::FCMPZUO_D: 409 case CSKY::f2FCMPHS_S: 410 case CSKY::f2FCMPHS_D: 411 case CSKY::f2FCMPLT_S: 412 case CSKY::f2FCMPLT_D: 413 case CSKY::f2FCMPNE_S: 414 case CSKY::f2FCMPNE_D: 415 case CSKY::f2FCMPUO_S: 416 case CSKY::f2FCMPUO_D: 417 case CSKY::f2FCMPHSZ_S: 418 case CSKY::f2FCMPHSZ_D: 419 case CSKY::f2FCMPHZ_S: 420 case CSKY::f2FCMPHZ_D: 421 case CSKY::f2FCMPLSZ_S: 422 case CSKY::f2FCMPLSZ_D: 423 case CSKY::f2FCMPLTZ_S: 424 case CSKY::f2FCMPLTZ_D: 425 case CSKY::f2FCMPNEZ_S: 426 case CSKY::f2FCMPNEZ_D: 427 case CSKY::f2FCMPUOZ_S: 428 case CSKY::f2FCMPUOZ_D: 429 430 case CSKY::BT32: 431 case CSKY::BF32: 432 case CSKY::BT16: 433 case CSKY::BF16: 434 case CSKY::CMPNEI32: 435 case CSKY::CMPNEI16: 436 case CSKY::CMPNE32: 437 case CSKY::CMPNE16: 438 case CSKY::CMPHSI32: 439 case CSKY::CMPHSI16: 440 case CSKY::CMPHS32: 441 case CSKY::CMPHS16: 442 case CSKY::CMPLTI32: 443 case CSKY::CMPLTI16: 444 case CSKY::CMPLT32: 445 case CSKY::CMPLT16: 446 case CSKY::BTSTI32: 447 case CSKY::BTSTI16: 448 case CSKY::TSTNBZ32: 449 case CSKY::TSTNBZ16: 450 case CSKY::TST32: 451 case CSKY::TST16: 452 MI.insert(MI.begin(), MCOperand::createReg(CSKY::C)); 453 return MCDisassembler::Success; 454 case CSKY::LSLC32: 455 case CSKY::LSRC32: 456 case CSKY::ASRC32: 457 MI.insert(std::next(MI.begin()), MCOperand::createReg(CSKY::C)); 458 return MCDisassembler::Success; 459 case CSKY::MOVF32: 460 case CSKY::MOVT32: 461 case CSKY::MVC32: 462 case CSKY::MVCV32: 463 case CSKY::MVCV16: 464 case CSKY::INCT32: 465 case CSKY::INCF32: 466 case CSKY::DECT32: 467 case CSKY::DECF32: 468 case CSKY::DECGT32: 469 case CSKY::DECLT32: 470 case CSKY::DECNE32: 471 case CSKY::CLRF32: 472 case CSKY::CLRT32: 473 case CSKY::f2FSEL_S: 474 case CSKY::f2FSEL_D: 475 MI.insert(std::next(MI.begin()), MCOperand::createReg(CSKY::C)); 476 return MCDisassembler::Success; 477 case CSKY::ADDC32: 478 case CSKY::ADDC16: 479 case CSKY::SUBC32: 480 case CSKY::SUBC16: 481 case CSKY::XSR32: 482 MI.insert(std::next(MI.begin()), MCOperand::createReg(CSKY::C)); 483 MI.insert(MI.end(), MCOperand::createReg(CSKY::C)); 484 return MCDisassembler::Success; 485 case CSKY::INS32: 486 MI.getOperand(3).setImm(MI.getOperand(3).getImm() + 487 MI.getOperand(4).getImm()); 488 return MCDisassembler::Success; 489 } 490 } 491 492 static bool decodeFPUV3Instruction(MCInst &MI, uint32_t insn, uint64_t Address, 493 const MCDisassembler *DisAsm, 494 const MCSubtargetInfo &STI) { 495 LLVM_DEBUG(dbgs() << "Trying CSKY 32-bit fpuv3 table :\n"); 496 if (!STI.getFeatureBits()[CSKY::FeatureFPUV3_HF] && 497 !STI.getFeatureBits()[CSKY::FeatureFPUV3_SF] && 498 !STI.getFeatureBits()[CSKY::FeatureFPUV3_DF]) 499 return false; 500 501 DecodeStatus Result = 502 decodeInstruction(DecoderTableFPUV332, MI, insn, Address, DisAsm, STI); 503 504 if (Result == MCDisassembler::Fail) { 505 MI.clear(); 506 return false; 507 } 508 509 return true; 510 } 511 512 DecodeStatus CSKYDisassembler::getInstruction(MCInst &MI, uint64_t &Size, 513 ArrayRef<uint8_t> Bytes, 514 uint64_t Address, 515 raw_ostream &CS) const { 516 517 uint32_t Insn; 518 DecodeStatus Result = MCDisassembler::Fail; 519 520 Insn = support::endian::read16le(Bytes.data()); 521 522 if ((Insn >> 14) == 0x3) { 523 if (Bytes.size() < 4) { 524 Size = 0; 525 return MCDisassembler::Fail; 526 } 527 Insn = (Insn << 16) | support::endian::read16le(&Bytes[2]); 528 529 if (decodeFPUV3Instruction(MI, Insn, Address, this, STI)) 530 Result = MCDisassembler::Success; 531 else { 532 LLVM_DEBUG(dbgs() << "Trying CSKY 32-bit table :\n"); 533 Result = decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI); 534 } 535 536 Size = 4; 537 } else { 538 if (Bytes.size() < 2) { 539 Size = 0; 540 return MCDisassembler::Fail; 541 } 542 LLVM_DEBUG(dbgs() << "Trying CSKY 16-bit table :\n"); 543 Result = decodeInstruction(DecoderTable16, MI, Insn, Address, this, STI); 544 Size = 2; 545 } 546 547 handleCROperand(MI); 548 549 return Result; 550 } 551