xref: /llvm-project/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp (revision 22274934f43681dc37d5bf39f99308ce443308d9)
1 //===- ARMRegisterBankInfo.cpp -----------------------------------*- C++ -*-==//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file implements the targeting of the RegisterBankInfo class for ARM.
11 /// \todo This should be generated by TableGen.
12 //===----------------------------------------------------------------------===//
13 
14 #include "ARMRegisterBankInfo.h"
15 #include "llvm/CodeGen/GlobalISel/RegisterBank.h"
16 #include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
17 #include "llvm/CodeGen/MachineRegisterInfo.h"
18 #include "llvm/Target/TargetRegisterInfo.h"
19 
20 using namespace llvm;
21 
22 #ifndef LLVM_BUILD_GLOBAL_ISEL
23 #error "You shouldn't build this"
24 #endif
25 
26 ARMRegisterBankInfo::ARMRegisterBankInfo(const TargetRegisterInfo &TRI)
27     : RegisterBankInfo(nullptr, 0) {}
28