1 //===- ARMLegalizerInfo.cpp --------------------------------------*- C++ -*-==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// \file 10 /// This file implements the targeting of the Machinelegalizer class for ARM. 11 /// \todo This should be generated by TableGen. 12 //===----------------------------------------------------------------------===// 13 14 #include "ARMLegalizerInfo.h" 15 #include "ARMSubtarget.h" 16 #include "llvm/CodeGen/ValueTypes.h" 17 #include "llvm/IR/DerivedTypes.h" 18 #include "llvm/IR/Type.h" 19 #include "llvm/Target/TargetOpcodes.h" 20 21 using namespace llvm; 22 23 #ifndef LLVM_BUILD_GLOBAL_ISEL 24 #error "You shouldn't build this" 25 #endif 26 27 ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) { 28 using namespace TargetOpcode; 29 30 const LLT p0 = LLT::pointer(0, 32); 31 32 const LLT s1 = LLT::scalar(1); 33 const LLT s8 = LLT::scalar(8); 34 const LLT s16 = LLT::scalar(16); 35 const LLT s32 = LLT::scalar(32); 36 const LLT s64 = LLT::scalar(64); 37 38 setAction({G_FRAME_INDEX, p0}, Legal); 39 40 for (unsigned Op : {G_LOAD, G_STORE}) { 41 for (auto Ty : {s1, s8, s16, s32, p0}) 42 setAction({Op, Ty}, Legal); 43 setAction({Op, 1, p0}, Legal); 44 } 45 46 for (auto Ty : {s1, s8, s16, s32}) 47 setAction({G_ADD, Ty}, Legal); 48 49 for (unsigned Op : {G_SEXT, G_ZEXT}) { 50 setAction({Op, s32}, Legal); 51 for (auto Ty : {s1, s8, s16}) 52 setAction({Op, 1, Ty}, Legal); 53 } 54 55 if (ST.hasVFP2()) { 56 setAction({G_FADD, s32}, Legal); 57 setAction({G_FADD, s64}, Legal); 58 59 setAction({G_LOAD, s64}, Legal); 60 } 61 62 computeTables(); 63 } 64