1 //===--------------------- SIFrameLowering.h --------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H 10 #define LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H 11 12 #include "AMDGPUFrameLowering.h" 13 14 namespace llvm { 15 16 class SIInstrInfo; 17 class SIMachineFunctionInfo; 18 class SIRegisterInfo; 19 class GCNSubtarget; 20 21 class SIFrameLowering final : public AMDGPUFrameLowering { 22 public: 23 SIFrameLowering(StackDirection D, unsigned StackAl, int LAO, 24 unsigned TransAl = 1) : 25 AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {} 26 ~SIFrameLowering() override = default; 27 28 void emitEntryFunctionPrologue(MachineFunction &MF, 29 MachineBasicBlock &MBB) const; 30 void emitPrologue(MachineFunction &MF, 31 MachineBasicBlock &MBB) const override; 32 void emitEpilogue(MachineFunction &MF, 33 MachineBasicBlock &MBB) const override; 34 int getFrameIndexReference(const MachineFunction &MF, int FI, 35 unsigned &FrameReg) const override; 36 37 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, 38 RegScavenger *RS = nullptr) const override; 39 40 bool isSupportedStackID(TargetStackID::Value ID) const override; 41 42 void processFunctionBeforeFrameFinalized( 43 MachineFunction &MF, 44 RegScavenger *RS = nullptr) const override; 45 46 MachineBasicBlock::iterator 47 eliminateCallFramePseudoInstr(MachineFunction &MF, 48 MachineBasicBlock &MBB, 49 MachineBasicBlock::iterator MI) const override; 50 51 private: 52 void emitFlatScratchInit(const GCNSubtarget &ST, 53 MachineFunction &MF, 54 MachineBasicBlock &MBB) const; 55 56 unsigned getReservedPrivateSegmentBufferReg( 57 const GCNSubtarget &ST, 58 const SIInstrInfo *TII, 59 const SIRegisterInfo *TRI, 60 SIMachineFunctionInfo *MFI, 61 MachineFunction &MF) const; 62 63 unsigned getReservedPrivateSegmentWaveByteOffsetReg( 64 const GCNSubtarget &ST, const SIInstrInfo *TII, const SIRegisterInfo *TRI, 65 SIMachineFunctionInfo *MFI, MachineFunction &MF) const; 66 67 // Emit scratch setup code for AMDPAL or Mesa, assuming ResourceRegUsed is set. 68 void emitEntryFunctionScratchSetup(const GCNSubtarget &ST, MachineFunction &MF, 69 MachineBasicBlock &MBB, SIMachineFunctionInfo *MFI, 70 MachineBasicBlock::iterator I, unsigned PreloadedPrivateBufferReg, 71 unsigned ScratchRsrcReg) const; 72 73 public: 74 bool hasFP(const MachineFunction &MF) const override; 75 }; 76 77 } // end namespace llvm 78 79 #endif // LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H 80