1 //===- AMDGPUELFObjectWriter.cpp - AMDGPU ELF Writer ----------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "AMDGPUMCTargetDesc.h" 10 #include "llvm/BinaryFormat/ELF.h" 11 #include "llvm/MC/MCELFObjectWriter.h" 12 #include "llvm/MC/MCExpr.h" 13 #include "llvm/MC/MCFixup.h" 14 #include "llvm/MC/MCObjectWriter.h" 15 #include "llvm/MC/MCSymbol.h" 16 #include "llvm/MC/MCValue.h" 17 #include "llvm/Support/ErrorHandling.h" 18 19 using namespace llvm; 20 21 namespace { 22 23 class AMDGPUELFObjectWriter : public MCELFObjectTargetWriter { 24 public: 25 AMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, bool HasRelocationAddend); 26 27 protected: 28 unsigned getRelocType(MCContext &Ctx, const MCValue &Target, 29 const MCFixup &Fixup, bool IsPCRel) const override; 30 }; 31 32 33 } // end anonymous namespace 34 35 AMDGPUELFObjectWriter::AMDGPUELFObjectWriter(bool Is64Bit, 36 uint8_t OSABI, 37 bool HasRelocationAddend) 38 : MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_AMDGPU, 39 HasRelocationAddend) {} 40 41 unsigned AMDGPUELFObjectWriter::getRelocType(MCContext &Ctx, 42 const MCValue &Target, 43 const MCFixup &Fixup, 44 bool IsPCRel) const { 45 if (const auto *SymA = Target.getSymA()) { 46 // SCRATCH_RSRC_DWORD[01] is a special global variable that represents 47 // the scratch buffer. 48 if (SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD0" || 49 SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD1") 50 return ELF::R_AMDGPU_ABS32_LO; 51 } 52 53 switch (Target.getAccessVariant()) { 54 default: 55 break; 56 case MCSymbolRefExpr::VK_GOTPCREL: 57 return ELF::R_AMDGPU_GOTPCREL; 58 case MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_LO: 59 return ELF::R_AMDGPU_GOTPCREL32_LO; 60 case MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_HI: 61 return ELF::R_AMDGPU_GOTPCREL32_HI; 62 case MCSymbolRefExpr::VK_AMDGPU_REL32_LO: 63 return ELF::R_AMDGPU_REL32_LO; 64 case MCSymbolRefExpr::VK_AMDGPU_REL32_HI: 65 return ELF::R_AMDGPU_REL32_HI; 66 case MCSymbolRefExpr::VK_AMDGPU_REL64: 67 return ELF::R_AMDGPU_REL64; 68 } 69 70 switch (Fixup.getKind()) { 71 default: break; 72 case FK_PCRel_4: 73 return ELF::R_AMDGPU_REL32; 74 case FK_Data_4: 75 case FK_SecRel_4: 76 return ELF::R_AMDGPU_ABS32; 77 case FK_Data_8: 78 return ELF::R_AMDGPU_ABS64; 79 } 80 81 llvm_unreachable("unhandled relocation type"); 82 } 83 84 std::unique_ptr<MCObjectTargetWriter> 85 llvm::createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, 86 bool HasRelocationAddend) { 87 return llvm::make_unique<AMDGPUELFObjectWriter>(Is64Bit, OSABI, 88 HasRelocationAddend); 89 } 90