1 //===-- AMDGPUMachineFunctionInfo.cpp ---------------------------------------=// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "AMDGPUMachineFunction.h" 11 #include "AMDGPUSubtarget.h" 12 13 using namespace llvm; 14 15 static bool isEntryFunctionCC(CallingConv::ID CC) { 16 switch (CC) { 17 case CallingConv::AMDGPU_KERNEL: 18 case CallingConv::SPIR_KERNEL: 19 case CallingConv::AMDGPU_VS: 20 case CallingConv::AMDGPU_GS: 21 case CallingConv::AMDGPU_PS: 22 case CallingConv::AMDGPU_CS: 23 return true; 24 default: 25 return false; 26 } 27 } 28 29 AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) : 30 MachineFunctionInfo(), 31 LocalMemoryObjects(), 32 KernArgSize(0), 33 MaxKernArgAlign(0), 34 LDSSize(0), 35 ABIArgOffset(0), 36 IsEntryFunction(isEntryFunctionCC(MF.getFunction()->getCallingConv())), 37 NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath) { 38 // FIXME: Should initialize KernArgSize based on ExplicitKernelArgOffset, 39 // except reserved size is not correctly aligned. 40 } 41 42 unsigned AMDGPUMachineFunction::allocateLDSGlobal(const DataLayout &DL, 43 const GlobalValue &GV) { 44 auto Entry = LocalMemoryObjects.insert(std::make_pair(&GV, 0)); 45 if (!Entry.second) 46 return Entry.first->second; 47 48 unsigned Align = GV.getAlignment(); 49 if (Align == 0) 50 Align = DL.getABITypeAlignment(GV.getValueType()); 51 52 /// TODO: We should sort these to minimize wasted space due to alignment 53 /// padding. Currently the padding is decided by the first encountered use 54 /// during lowering. 55 unsigned Offset = LDSSize = alignTo(LDSSize, Align); 56 57 Entry.first->second = Offset; 58 LDSSize += DL.getTypeAllocSize(GV.getValueType()); 59 60 return Offset; 61 } 62